| Commit message (Collapse) | Author | Age | Lines |
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change the imx7d arm2 nand rootfs partition index from 3 to 4 since the
weim nor was enabled by default and took the first mtd partition.
Signed-off-by: Han Xu <b45815@freescale.com>
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Windows DeviceIoControl SCSI_PASSTHROUGH is not stable when report media is
not ready.
Use dummy fat file to workaround this issue and avoid windows popup
format dialog.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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The current 36M offset will conflict with NAND FCB firmware2 when the
nand chip block is 1MB size. This patch change it to 36M + 1M offset,
so the redundant u-boot at firmware2 will not be broken.
Signed-off-by: Ye.Li <B37916@freescale.com>
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The previous 8M address for NAND env might conflict with other boot
parameters as the NAND block size increasing, change it to 36M to avoid
it.
Signed-off-by: Han Xu <b45815@freescale.com>
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In current design, if any peripheral was assigned to both A7 and M4,
it will receive ipg_stop or ipg_wait when any of the 2 platforms
enter low power mode. We will have a risk that, if A7 enter wait,
M4 enter stop, peripheral will have chance to get ipg_stop and ipg_wait
asserted same time.
There are 26 peripherals impacted by this IC issue:
SIM2(sim2/emvsim2)
SIM1(sim1/emvsim1)
UART1/UART2/UART3/UART4/UART5/UART6/UART7
SAI1/SAI2/SAI3
WDOG1/WDOG2/WDOG3/WDOG4
GPT1/GPT2/GPT3/GPT4
PWM1/PWM2/PWM3/PWM4
ENET1/ENET2
Software Workaround:
The solution is set M4 to a different domain with A core.
So the peripherals are not shared by them. This way requires
the uboot implemented the RDC driver and set the 26 IPs above to domain 0 only.
CM4 image will set the M4 to domain 1 only.
This patch enables the CONFIG_MXC_RDC for mx7d SABRESD board and ARM2 boards, and
setup the 26 IP resources to domain 0.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Abstracted the CSF size in imximage from a hardcoded value to a config
setting CONFIG_CSF_SIZE. This configuration is only enabled for secure
boot.
Increased the size of the CSF default allocation to 0x4000. This size
covers the event the worst case of 4906-bits keys.
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For nand boot, the mtdpart info are needs to load kernel and rootfs.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Since the flash blocks are locked at default , need to set
"CONFIG_SYS_FLASH_PROTECTION" to unlock them before write/erase.
The patch also add the pinmux for LBA (ADV) pin and set eimnor enabled at
default.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add the default TSOP NAND support and build target.
New build target for nand boot: mx7d_19x19_lpddr3_arm2_nand_config
Signed-off-by: Ye.Li <B37916@freescale.com>
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* Add mx7d_19x19_lpddr3_arm2 target board supprt
* Enable i2c, spinor, usb, usdhc, qspi, enet, uart
* Build targets
mx7d_19x19_lpddr3_arm2_defconfig
mx7d_19x19_lpddr3_arm2_eimnor_defconfig
- Set EIMNOR settings for Intel Sibley Asynchronous mode
- Set flash sector size for 256kb (erase block size)
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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* Allow to override mtest settings for target board
variants that differs on physical sdram memory size
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 6173a3954b83ce22e24c62bc8ee922007b0929a6)
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add this parameter in u-boot as a temporary workaround.
Signed-off-by: Han Xu <b45815@freescale.com>
(cherry picked from commit f0beee980914360c8783406ef8694974467eb07b)
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To enable the EPDC feature:
1. Uncomments CONFIG_SPLASH_SCREEN and CONFIG_MXC_EPDC settings
in mx7d_12x12_lpddr3_arm2.h
2. cd <kernel_dir>/firmware/imx
3. python ihex2bin.py -i epdc_ED060XD4C1_TC.fw.ihex -o epdc_splash.bin
4. cp epdc_splash.bin to [FAT partition on SD card]
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 414824dcb77a067213849d340cf92777e6546810)
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Add thermal driver for mx7
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Add mx7d_arm2.h for common part of all i.MX7D arm2 boards
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 6cc15cf8c4e1f9a08130c5e232f23af75407fa50)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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