| Commit message (Collapse) | Author | Age | Lines |
|
|
|
|
|
| |
Add DDR3 support for MX6SL
Signed-off-by: Grace Si <b18730@freescale.com>
|
|
|
|
|
|
|
| |
move LDO bypass code and one PFUZE1.0 workaround code to kernel. Remove
CONFIG_MX6_INTER_LDO_BYPASS in u-boot
Signed-off-by: Robin Gong <b38343@freescale.com>
|
|
|
|
|
|
|
|
| |
add cpu serial number tag, kernel will read this
number and put it in /proc/cpuinfo, as 'Serial' part
it can be used as a UUID source in software.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
There is a problem that a too long command line parameter in U-Boot
console will actually be truncated and not properly truncated to the
kernel.
The root cause is that the command line in the U-Boot console is read
into a buffer --- console_buffer[CONFIG_SYS_CBSIZE]. Currently the
CONFIG_SYS_CBSIZE is set as 256. Command line parameter larger than it
will not be recorded. On the other hand, max length of boot parameter of
linux kernel is set to 1024, which means it can accept parameter size as
large as 1024.
So we need to align these 2 values. Enlarge CONFIG_SYS_CBSIZE to 1024 as
well.
Signed-off-by: Eric Sun <jian.sun@freescale.com>
|
|
|
|
|
|
|
| |
To validate LDO bypass function fully, enable CONFIG_MX6_INTER_LDO_BYPASS
on u-boot and kernel, only for mx6sl.
Signed-off-by: Robin Gong <B38343@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
With the secure boot patch. MX6 NAND Boot is not functional. The root
cause is that, the original secure boot patch fills "0xFF' to spacing
regions, due to a issue in ROM code, read pages of all "0xff" will be
treated as a critical error. Thus prevent the U-Boot from booting
normally.
The fix adjust image copy size in IVT so that when secure boot is not
enabled, no unuseful data is copied by ROM code. Also the secure boot
option is default disabled. The end user won't enable it unless they
know what they are doing.
These prevent the ROM code from copied pages of "0xff" data, and fix the
issue.
Signed-off-by: Eric Sun <jian.sun@freescale.com>
|
|
|
|
|
|
|
|
| |
Move the secure boot related implementation code from mx6q_arm2.c to
mx6/generic.c. In this way the HAB feature can be shared by all MX6
platforms
Signed-off-by: Eric Sun <jian.sun@freescale.com>
|
|
|
|
|
|
| |
1.enable I2C and I2C bus recovery support on mx6sl_arm2
2.enable LDO bypass on u-boot, by configuring 'CONFIG_MX6_INTER_LDO_BYPASS'
Signed-off-by: Robin Gong <B38343@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
issue:
SD1 connector on ARM2 is an MS-SD combo one which can not make
good contact with DAT4~DAT7 of 8bit mmc cards. It is an hw limitation
which will cause boot failure from 8bit mmc.
solution:
disable SD1 8bit mode on MX6SL arm2 board.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
|
|
|
|
|
|
|
|
|
|
| |
- add android build config for mx6sl_arm2 board.
- add gpio support for mx6sl
- add boot image support
- add android recovery support
- add fastboot support, but fastboot cannot transfer file.
Signed-off-by Zhang Jiejing <jiejing.zhang@freescale.com>
|
|
This patch is to add the initial support for i.mx6sl ARM2 board, the patch does:
- implemention of LPDDR2 init script
- Plug-in/DCD mode support to do DDR initialization
- Debug UART(UART1) support
- SPI-NOR(M25P32, 4MB) flash support
- FEC support, PHY(LAN8720A, RMII mode)
- SD/MMC card support, SD1/SD2/SD3
Signed-off-by: Danny Nold <dannynold@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
Signed-off-by: Eric Sun <jian.sun@freescale.com>
|