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path: root/include/configs/mx6q_sabresd.h
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* ENGR00233366-5 Anatop PFUZE: move LDO bypass code to kernelRobin Gong2012-11-19-1/+0
| | | | | | | move LDO bypass code and one PFUZE1.0 workaround code to kernel. Remove CONFIG_MX6_INTER_LDO_BYPASS in u-boot Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00223794 MX6 SabreSD:Enable LVDS panel pwm backlightLiu Ying2012-09-27-0/+4
| | | | | | | | | | | | | This patch enables pwm backlight for LVDS panel and stops using gpio backlight to align with kernel to avoid unstable backlight when booting into kernel, as kernel usually uses pwm backlight instead of gpio backlight. Following items are done to support this: 1) Add PWM1 and PWM2 controller base addresses. 2) Change PIN SD1_DAT3 mux from GPIO to PWM1_PWMO. 3) Set default backlight density to 50%. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00221503-2 imx6: add cpu serial number support.Zhang Jiejing2012-08-31-0/+1
| | | | | | | | add cpu serial number tag, kernel will read this number and put it in /proc/cpuinfo, as 'Serial' part it can be used as a UUID source in software. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00219636 MX6 UBOOT : Enlarge command line buffer sizeEric Sun2012-08-07-1/+1
| | | | | | | | | | | | | | | | | | There is a problem that a too long command line parameter in U-Boot console will actually be truncated and not properly truncated to the kernel. The root cause is that the command line in the U-Boot console is read into a buffer --- console_buffer[CONFIG_SYS_CBSIZE]. Currently the CONFIG_SYS_CBSIZE is set as 256. Command line parameter larger than it will not be recorded. On the other hand, max length of boot parameter of linux kernel is set to 1024, which means it can accept parameter size as large as 1024. So we need to align these 2 values. Enlarge CONFIG_SYS_CBSIZE to 1024 as well. Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00218583-2 MX6Q SabreSD:Enable splashimage by defaultLiu Ying2012-07-31-0/+1
| | | | | | | This patch adds CONFIG_SPLASH_SCREEN definition to board config file to enable splashimage by default. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00209899-1 mx6x: add generic gpio interface.Zhang Jiejing2012-05-21-0/+1
| | | | | | | | | | | | | | | | | | | | | | Add generic gpio interface in uboot. Seems more and more gpio operation invoke in uboot, without RAW register operation, we should use generic gpio interface. you should define the CONFIG_MXC_GPIO use generic gpio interface: gpio_request, gpio_direction_output, gpio_direction_input, gpio_set_value, gpio_get_value, etc. Test on MX6Q, MX6DL. Other MX6X should also define this config. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00181348 pfuze sabresd: pfuze support in u-bootRobin Gong2012-05-04-2/+3
| | | | | | add pfuze and I2C support, support cpu internal LDO bypass which can be enabled by CONFIG_MX6_INTER_LDO_BYPASS Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00177909: mx6q/mx6dl SabreSD: SPI-NOR flash not probed as expectedJason Liu2012-03-26-1/+1
| | | | | | | | | | | | SPI NOR flash(m25p32-vmw6tg) not probed and function as expected, this due to the lack of iomux pad config and incorrect CS line. This patch fix the above issue and also fix the mfg config file (For the code readable, I intent to omit the following checkpatch warning: in the iomux/mx6_pins.h WARNING: line over 80 characters) Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00177905 : i.mx6q sabresd: add fec auto discover phy configuration.Fugang Duan2012-03-26-1/+2
| | | | | | | | - i.mx6q sabresd revA ethernet phy addr is 0 (PHYADDRESS1-PHYADDRESS0:00) , but revB ethernet phy address is 0x1 (PHYADDRESS1-PHYADDRESS0:01). To avoid to change hardware, add auto discover phy address configuration. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00139213: Add read and change voltage support for mx6Terry Lv2012-02-16-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dd read and change voltage support for mx6. For help, pls type "help regul" Detail command info: regul list - List all regulators' name regul show all - Display all regulators' voltage regul show core - Show core voltage in mV regul show periph - Show peripheral voltage in mV regul show <regulator name> - Show regulator's voltage in mV regul set core <voltage value> - Set core voltage in mV regul set periph <voltage value> - Set periph voltage in mV regul set <regulator name> <voltage value> - Set regulator's voltage in mV Example: MX6Q ARM2 U-Boot > regul list Name Voltage vddpu vddcore vddsoc vdd2p5 vdd1p1 vdd3p0 MX6Q ARM2 U-Boot > regul show all Name Voltage vddpu 1100000 vddcore 1100000 vddsoc 1200000 vdd2p5 2400000 vdd1p1 1100000 vdd3p0 3000000 MX6Q ARM2 U-Boot > regul show periph Name Voltage periph: 1100000 MX6Q ARM2 U-Boot > regul show core Name Voltage core: 1100000 MX6Q ARM2 U-Boot > regul set core 1100000 Set voltage succeed! Name Voltage core: 1100000 Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00174326 MX6Q_SABRESD: add android related function and config.Zhang Jiejing2012-02-15-1/+1
| | | | | | | | | | enable mfg profile. enable recovery mode. mx6q_sabresd board's usb otg have HW issue, disable it in android profile. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00174230: Move partition command from nand to sata in mx6Terry Lv2012-02-13-4/+4
| | | | | | | Move partition command from nand to sata in mx6 for nand don't need these partition command. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00173659 MX6Q_UART Change Phyisical to Virtural Port MappingEric Sun2012-02-03-1/+1
| | | | | | | For ARM2 and Sabreauto, change TTY0 to TTY3 (which is physical UART4) For SabreSD, Change TTY3 to TTY0 (which is physical UART1) Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00172343 Add suport for i.MX 6Q Sabre Smart DeviceNancy Chen2012-01-24-0/+334
Add suport for i.MX 6Quad SABRE Smart Device. Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com> Signed-off-by: Tony Lin <tony.lin@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com>
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