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* mmc: move CONFIG_GENERIC_MMC to KconfigMasahiro Yamada2017-01-31-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now, CONFIG_GENERIC_MMC seems equivalent to CONFIG_MMC. Let's create an entry for "config GENERIC_MMC" with "default MMC", then convert all macro defines in headers to Kconfig. Almost all of the defines will go away. I see only two exceptions: configs/blanche_defconfig configs/sandbox_noblk_defconfig They define CONFIG_GENERIC_MMC, but not CONFIG_MMC. Something might be wrong with these two boards, so should be checked later. Anyway, this is the output of the moveconfig tool. This commit was created as follows: [1] create a config entry in drivers/mmc/Kconfig [2] tools/moveconfig.py -r HEAD GENERIC_MMC [3] manual clean-up of garbage comments in doc/README.* and include/configs/*.h Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* disk: convert CONFIG_DOS_PARTITION to KconfigPatrick Delaunay2017-01-28-1/+0
| | | | | Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
* Convert CONFIG_BOARD_EARLY_INIT_F to KconfigSimon Glass2017-01-25-1/+0
| | | | | | | This converts the following to Kconfig: CONFIG_BOARD_EARLY_INIT_F Signed-off-by: Simon Glass <sjg@chromium.org>
* Convert CONFIG_ARCH_EARLY_INIT_R to KconfigSimon Glass2017-01-25-1/+0
| | | | | | | This converts the following to Kconfig: CONFIG_ARCH_EARLY_INIT_R Signed-off-by: Simon Glass <sjg@chromium.org>
* config: Move CONFIG_BOARD_LATE_INIT to defconfigsJagan Teki2017-01-21-1/+0
| | | | | Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
* armv8/fsl-lsch2: refactor the clock system initializationHou Zhiqiang2017-01-18-2/+1
| | | | | | | | | | | | | | | | | | | Up to now, there are 3 kind of SoCs under Layerscape Chassis 2, like LS1043A, LS1046A and LS1012A. But the clocks tree has a lot of differences, for instance, the IP modules have different dividers to derive its clock from Platform PLL. And the core cluster PLL and platform PLL maybe have different reference clocks, such as LS1012A. Another problem is which clock/PLL should be described by sys_info->freq_systembus, it is confused in Layerscape Chissis 2. This patch is to bind the sys_info->freq_systembus to the Platform PLL, and handle the different divider of IP modules separately between different SoCs, and separate reference clocks of core cluster PLL and platform PLL. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* mmc: complete unfinished move of CONFIG_MMCMasahiro Yamada2016-12-29-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Commit 7a777f6d6f35 ("mmc: Add generic Kconfig option") created a Kconfig entry for this option without any actual moves, then commit 44c798799f66 ("sunxi: Use Kconfig CONFIG_MMC") moved instances only for SUNXI. We generally do not like such partial moves. This kind of work is automated by tools/moveconfig.py, so it is pretty easy to complete this move. I am adding "default ARM || PPC || SANDBOX" (suggested by Tom). This shortens the configs and will ease new board porting. This commit was created as follows: [1] Edit Kconfig (remove the "depends on", add the "default", copy the prompt and help message from Linux) [2] Run 'tools/moveconfig.py -y -s -r HEAD MMC' Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* spl: Remove CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORSSemen Protsenko2016-11-18-1/+0
| | | | | | This option isn't used for anything, so get rid of it. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
* spl: Convert CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to KconfigSemen Protsenko2016-11-18-1/+0
| | | | | | Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> [trini: Fix sniper and kc1 migration] Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Move SYS_FSL_SRDS_* and SYS_HAS_SERDES to KconfigYork Sun2016-10-06-3/+0
| | | | | | | Move these options to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* arm: Move FSL_LSCH2 FSL_LSCH3 to KconfigYork Sun2016-10-06-1/+0
| | | | | | | | Move these options to Kconfig and create a sub-menu to avoid name conflict with other architectures. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig option ARCH_LS1046AYork Sun2016-09-26-1/+0
| | | | | | | | | Move this option to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> CC: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* armv8: ls1046aqds: Add LS1046AQDS board supportShaohui Xie2016-09-14-1/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS1046AQDS Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports PCIe: supports Gen 1 and Gen 2 SATA 3.0: one SATA 3.0 port USB 3.0: two micro AB connector and one type A connector UART: supports two UARTs up to 115200 bps for console Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1046ardb: Add LS1046ARDB board supportMingkai Hu2016-09-14-0/+175
LS1046ARDB Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 512 Mbyte NAND flash * Two 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card * On-board 4G eMMC Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports PCIe: * PCIe1 (SerDes2 Lane0) to miniPCIe slot * PCIe2 (SerDes2 Lane1) to x2 PCIe slot * PCIe3 (SerDes2 Lane2) to x4 PCIe slot SATA: * SerDes2 Lane3 to SATA port USB 3.0: one super speed USB 3.0 type A port one Micro-AB port UART: supports two UARTs up to 115200 bps for console Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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