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path: root/include/configs/dra7xx_evm.h
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* qspi: dra7x: enable quad mode read for ti-qspi driverRavi Babu2015-03-30-0/+1
| | | | | | | | This patch enables QUAD read mode for qspi to improve the read performace while loading the binaries from qspi. Signed-off-by: Ravi Babu <ravibabu@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* TI: armv7: enable UUID and PARTNishanth Menon2015-01-05-2/+0
| | | | | | | | | Enable UUID and partition support for scripted handling platforms with MMC and eMMC and varied partitioning schemes And remove it from headers that end up redefining it. Signed-off-by: Nishanth Menon <nm@ti.com>
* ARM: OMAP5: DRA7xx: Enable 8-bit eMMC access on the dra7xx_evmLubomir Popov2014-12-04-0/+1
| | | | | | | Tested on a Vayu EVM Rev.E2 with DRA752 ES1.1 Signed-off-by: Lubomir Popov <l-popov@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* spl: replace CONFIG_SPL_SPI_* with CONFIG_SF_DEFAULT_*Nikita Kiryanov2014-09-24-2/+0
| | | | | | | | | | | | | | | | | | | | | | | Currently, CONFIG_SPL_SPI_* #defines are used for controlling SPI boot in SPL. These #defines do not allow the user to select SPI mode for the SPI flash (there's no CONFIG_SPL_SPI_MODE, so the SPI mode is hardcoded in spi_spl_load.c), and duplicate information already provided by CONFIG_SF_DEFAULT_* #defines. Kill CONFIG_SPL_SPI_*, and use CONFIG_SF_DEFAULT_* instead. Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Bo Shen <voice.shen@atmel.com> Cc: Hannes Petermaier <hannes.petermaier@br-automation.com> Cc: Michal Simek <monstr@monstr.eu> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* ARM: DRA: Enable VTT regulatorLokesh Vutla2014-08-25-0/+1
| | | | | | | | | | DRA7 evm REV G and later boards uses a vtt regulator for DDR3 termination and this is controlled by gpio7_11. Configuring gpio7_11. The pad A22(offset 0x3b4) is used by gpio7_11 on REV G and later boards, and left unused on previous boards, so it is safe enough to enable gpio on all DRA7 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* board/ti/dra7xx: add support for parallel NORpekon gupta2014-08-25-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for parallel NOR device (S29GL512S10) present on J6-EVM. The Flash device is connected to GPMC controller on chip-select[0] and accessed as memory-mapped device. It has data-witdh=x16, capacity-64MBytes(512Mbits) and is CFI compatible. As multiple devices are share GPMC pins on this board, so following board settings are required to detect NOR device: SW5.1 (NAND_BOOTn) = OFF (logic-1) SW5.2 (NOR_BOOTn) = ON (logic-0) /* Active-low */ SW5.3 (eMMC_BOOTn) = OFF (logic-1) SW5.4 (QSPI_BOOTn) = OFF (logic-1) And also set appropriate SYSBOOT configurations: SW3.1 (SYSBOOT[ 8])= ON (logic-1) /* selects SYS_CLK1 speed */ SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */ SW3.3 (SYSBOOT[10])= ON (logic-1) /* wait-pin monitoring = enabled */ SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Non Muxed */ SW3.5 (SYSBOOT[12])= OFF (logic-0) /* device type: Non Muxed */ SW3.6 (SYSBOOT[13])= ON (logic-1) /* device bus-width: 1(x16) */ SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */ SW3.8 (SYSBOOT[15])= ON (logic-1) /* reserved */ Also, following changes are required to enable NOR Flash support in dra7xx_evm board profile:
* board/ti/dra7xx: add support for parallel NANDpekon gupta2014-08-25-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for x16 NAND device (MT29F2G16AAD) connected to GPMC chip-select[0] on DRA7xx EVM. As GPMC pins are shared by multiple devices, so in addition to this patch following board settings are required for NAND device detection [1]: SW5.9 (GPMC_WPN) = OFF (logic-1) SW5.1 (NAND_BOOTn) = ON (logic-0) /* Active-low */ SW5.2 (NOR_BOOTn) = OFF (logic-1) SW5.3 (eMMC_BOOTn) = OFF (logic-1) SW5.4 (QSPI_BOOTn) = OFF (logic-1) And also set appropriate SYSBOOT configurations SW2.1 (SYSBOOT[0]) = ON (logic-1) /* selects NAND Boot */ SW2.2 (SYSBOOT[1]) = OFF (logic-0) /* selects NAND Boot */ SW2.3 (SYSBOOT[2]) = OFF (logic-0) /* selects NAND Boot */ SW2.4 (SYSBOOT[3]) = OFF (logic-0) /* selects NAND Boot */ SW2.5 (SYSBOOT[4]) = ON (logic-1) /* selects NAND Boot */ SW2.6 (SYSBOOT[5]) = ON (logic-1) /* selects NAND Boot */ SW2.7 (SYSBOOT[6]) = OFF (logic-0) /* reserved */ SW2.8 (SYSBOOT[7]) = OFF (logic-0) /* reserved */ SW3.1 (SYSBOOT[ 8])= ON (logic-1) /* selects SYS_CLK1 speed */ SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */ SW3.3 (SYSBOOT[10])= ON (logic-1) /* wait-pin monitoring = enabled */ SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Addr/Data Muxed */ SW3.5 (SYSBOOT[12])= ON (logic-1) /* device type: Addr/Data Muxed */ SW3.6 (SYSBOOT[13])= ON (logic-1) /* device bus-width: 1(x16) */ SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */ SW3.8 (SYSBOOT[15])= ON (logic-1) /* reserved */ Following changes are required in board.cfg to enable NAND on J6-EVM:
* dra7xx_evm: Add QSPI_4 support, qspiboot build targetTom Rini2014-04-17-1/+36
| | | | | | | | | | | | We previously only supported QSPI_1 (single) support. Add QSPI_4 (quad) read support as well. This means we can be given one of two boot device values, but don't care which it is, so perform a fixup on the QSPI_4 value. We add a qspiboot build target to better show how you would use QSPI as a boot device in deployment. When we boot from QSPI, we can check the environment for 'boot_os' to control Falcon Mode. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* TI:omap5: Move CONFIG_ENV_SIZE to board config filesTom Rini2014-04-17-0/+1
| | | | | | | The size of the environment depends on the backing store, move this to the board config files. Signed-off-by: Tom Rini <trini@ti.com>
* drivers: net: cpsw: add support to have phy address from cpsw platform dataMugunthan V N2014-03-04-1/+0
| | | | | | | | | | | | Some platforms like AM437x have different EVMs with different phy addresses, so this patch adds support for passing phy address via cpsw plaform data. Also renamed phy_id to phy_addr so better understanding of the code. Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> [trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335 pengwyn boards] Signed-off-by: Tom Rini <trini@ti.com>
* dra7xx_evm: Enable GPT commandsTom Rini2014-02-21-0/+11
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-02-17-2/+2
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| * ARM: OMAP5: Rename to ti_omap5_common.hEnric Balletbò i Serra2014-01-24-2/+2
| | | | | | | | | | | | | | | | Follow the pattern ti_<processor family>_common.h used by other TI processors to be coherent. So just rename omap5_common.h to ti_omap5_common.h. Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* | dra7xx_evm: Add CONFIG_SUPPORT_EMMC_BOOT, document usageTom Rini2014-02-07-0/+2
|/ | | | | | | | | Add a README to the board which lists the commands required to enable booting from the eMMC boot partitions found on the board. Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* config: dra7_evm: Add Bank Address Register(BAR) configPoddar, Sourav2013-12-19-0/+1
| | | | | | | | Add config to support bank address register. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Tested-by: Yebio Mesfin <ymesfin@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* ARM: dra7_evm: Add SATA supportRoger Quadros2013-12-04-0/+11
| | | | | | | The evm has a SATA port. Enable SATA configuration and inititialize the SATA controller. Signed-off-by: Roger Quadros <rogerq@ti.com>
* Merge branch 'iu-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-11-09-2/+7
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile board/compulab/cm_t35/Makefile board/corscience/tricorder/Makefile board/ppcag/bg0900/Makefile drivers/bootcount/Makefile include/configs/omap4_common.h include/configs/pdnb3.h Makefile conflicts are due to additions/removals of object files on the ARM branch vs KBuild introduction on the main branch. Resolution consists in adjusting the list of object files in the main branch version. This also applies to two files which are not listed as conflicting but had to be modified: board/compulab/common/Makefile board/udoo/Makefile include/configs/omap4_common.h conflicts are due to the OMAP4 conversion to ti_armv7_common.h on the ARM side, and CONFIG_SYS_HZ removal on the main side. Resolution is to convert as this icludes removal of CONFIG_SYS_HZ. include/configs/pdnb3.h is due to a removal on ARM side. Trivial resolution is to remove the file. Note: 'git show' will also list two files just because they are new: include/configs/am335x_igep0033.h include/configs/omap3_igep00x0.h
| * dra7xx_evm: Enabled UART-boot mode and add dra7xx_evm_uart3 buildMinal Shah2013-11-01-2/+7
| | | | | | | | | | | | | | | | | | | | | | UART booting is supported on this SoC, but via UART3 rather than UART1. Because of this we must change the board to use UART3 for all console access (only one UART is exposed on this board and a slight HW mod is required to switch UARTs). Signed-off-by: Minal Shah <minal.shah@ti.com> [trini: Make apply to mainline, reword commit] Signed-off-by: Tom Rini <trini@ti.com>
* | usb: dra7xx: Add support for dra7xx xhci USB hostDan Murphy2013-10-20-0/+11
|/ | | | | | | | | | | Add the support for the dra7xx xhci usb host. dra7xx does not contain an EHCI controller so the headers can be removed from the board file. The xHCI host on dra7xx is connected to a usb2 phy so need to add support to enable those clocks. Signed-off-by: Dan Murphy <dmurphy@ti.com>
* Coding Style cleanup: remove trailing white spaceWolfgang Denk2013-10-14-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* dra7xx_evm: add SPL API, QSPI, and serial flash supportMatt Porter2013-10-07-0/+19
| | | | | | | | | Enables support for SPI SPL, QSPI and Spansion serial flash device on the EVM. Configures pin muxes for QSPI mode. Signed-off-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* ARM: DRA7: Enable saveenv commandLokesh Vutla2013-09-20-1/+7
| | | | | | | | | dra7xx_evm has eMMC and the default environment can be stored in it. So enabling saveenv command and the configs to store environment in eMMC. Tested on DRA752 ES1.0 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* dra7xx_evm: Re-order and comment the networking related config optionsTom Rini2013-08-28-10/+8
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* TI:omap5/dra7xx: Convert to ti_armv7_common.hTom Rini2013-08-15-7/+4
| | | | | | | | | Update omap5_common.h to use ti_armv7_common.h, and in turn update dra7xx_evm.h and omap5_uevm.h slightly. The biggest changes here are that IP blocks which exist on the platform, and had clocks enabled, now have the drivers being built as well. Signed-off-by: Tom Rini <trini@ti.com>
* ARM: DRA7xx: Enable CPSW Ethernet supportMugunthan V N2013-07-26-0/+19
| | | | | | Enabling CPSW Ethernet support in DRA7xx EVM. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* arm: dra7xx: Update the EXTRA_ENV_SETTINGSDan Murphy2013-06-18-0/+3
| | | | | | | | | | Update the EXTRA_ENV_SETTING for the dra7xx. The console needs to be set to ttyO0 and the findfdt needs to be updated to load the dra7xx-evm.dtb file. Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* ARM: DRA7xx: clocks: Update PLL valuesLokesh Vutla2013-06-10-0/+2
| | | | | | | | | | | Update PLL values. SYS_CLKSEL value for 20MHz is changed to 2. In other platforms SYS_CLKSEL value 2 represents reserved. But in sys_clk array ind 1 is used for 13Mhz. Since other platforms are not using 13Mhz, reusing index 1 for 20MHz. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com>
* ARM: DRA7xx: Change the Debug UART to UART1Sricharan R2013-06-10-0/+3
| | | | | | | Serial UART is connected to UART1. So add the change for the same. Signed-off-by: Sricharan R <r.sricharan@ti.com>
* ARM: DRA7xx: Add control id code for DRA7xxLokesh Vutla2013-06-10-1/+2
| | | | | | | | The registers that are used for device identification are changed from OMAP5 to DRA7xx. Using the correct registers for DRA7xx. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* omap5_uevm.h: Move uEVM-specific choices to omap5_uevm.hTom Rini2013-04-08-0/+2
| | | | | | | | | | | | The omap5_uevm platform has eMMC, and it makes sense to say that our default env storage shall reside there. Other platforms may not, so move this choice to the EVM config. In addition, we should provide some way to partition the flash for later usage, so take advantage of the GPT partition table support code and allow that to be setup with some reasonable defaults. Cc: Sricharan R <r.sricharan@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* arm: dra7xx: Add dra7xx_evm build supportLokesh Vutla2013-03-11-0/+36
Adding the build support for dra7xx_evm. Reusing omap5_evm.h config by moving it to omap5_common.h Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com>
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