summaryrefslogtreecommitdiff
path: root/include/configs/dbau1x00.h
Commit message (Collapse)AuthorAgeLines
* drivers/mtd: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2008-08-13-1/+1
| | | | | | rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* [MIPS] Rename Alchemy processor configs into CONFIG_SOC_*Shinya Kuribayashi2008-06-07-5/+5
| | | | | | | | | | | | | | CONFIG_SOC_AU1X00 Common Alchemy Au1x00 stuff. All Alchemy processor based machines need to have this config as a system type specifier. CONFIG_SOC_AU1000, CONFIG_SOC_AU1100, CONFIG_SOC_AU1200, CONFIG_SOC_AU1500, CONFIG_SOC_AU1550 Machine type specifiers. Each port should have one of aboves. Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
* [MIPS] lib_mips/time.c: Fix CP0 count register usage and timer routinesShinya Kuribayashi2008-06-05-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MIPS port has two problems in timer routines. One is now we assume CFG_HZ equals to CP0 counter frequency, but this is wrong. CFG_HZ has to be 1000 in the U-Boot system. The other is we don't have a proper time management counter like timestamp other ARCHs have. We need the 32-bit millisecond clock counter. This patch introduces timestamp and CYCLES_PER_JIFFY. timestamp is a 32-bit non-overflowing CFG_HZ counter, and CYCLES_PER_JIFFY is the number of calculated CP0 counter cycles in a CFG_HZ. STRATEGY: * Fix improper CFG_HZ value to have 1000 * Use CFG_MIPS_TIMER_FREQ for timer counter frequency, instead. * timer_init: initialize timestamp and set up the first timer expiration. Note that we don't need to initialize CP0 count/compare registers here as they have been already zeroed out on the system reset. Leave them as they are. * get_timer: calculate how many timestamps have been passed, then return base-relative timestamp. Make sure we can easily count missed timestamps regardless of CP0 count/compare value. * get_ticks: return the current timestamp, that is get_timer(0). Most parts are from good old Linux v2.6.16 kernel. v2: - Remove FIXME comments as they turned out to be trivial. - Use CP0 compare register as a global variable for expirelo. - Kill a global variable 'cycles_per_jiffy'. Use #define CYCLES_PER_JIFFY instead. Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
* include/configs/[a-e]*: Cleanup BOOTP and lingering CFG_CMD_*.Jon Loeliger2007-07-10-0/+9
| | | | | | | | | Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h used to be included but CONFIG_BOOTP_MASK was not defined. Remove lingering references to CFG_CMD_* symbols. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* include/configs: Use new CONFIG_CMD_* in various d* named board config files.Jon Loeliger2007-07-05-11/+38
| | | | Signed-off-by: Jon Loeliger <jdl@freescale.com>
* * Fix dbau1x00 BoardHeiko Schocher2006-04-11-4/+3
| | | | | | | | - Fix dbau1x00 boards broken by dbau1550 patch PLL:s were not set for boards other than 1550. Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST. Default boot is now bootp for cards other than 1550. Patch by Thomas Lange Aug 10 2005
* Change all '$(...)' variable references into '${...}'Wolfgang Denk2005-11-20-3/+3
| | | | | | which makes the environment compatible with the hush shell. WARNING: Support for the old '$(...)' syntax will be discontinued in a later version.
* * Patch by Leif Lindholm, 23 Sep 2004:wdenk2005-01-09-11/+56
| | | | | | | | add support for the AMD db1550 board * Patch by Travis Sawyer, 15 Sep 2004: Add CONFIG_SERIAL_MULTI support for ppc4xx, update README.serial_multi
* * Cleanup lowboot code for MPC5200wdenk2004-01-02-7/+7
| | | | | | | | | | | | | | | | | | * Minor code cleanup (coding style) * Patch by Reinhard Meyer, 30 Dec 2003: - cpu/mpc5xxx/fec.c: added CONFIG_PHY_ADDR, added CONFIG_PHY_TYPE, - added CONFIG_PHY_ADDR to include/configs/IceCube.h, - turned debug print of PHY registers into a function (called in two places) - added support for EMK MPC5200 based modules * Fix MPC8xx PLPRCR_MFD_SHIFT typo * Add support for TQM866M modules * Fixes for TQM855M with 4 MB flash (Am29DL163 = _no_ mirror bit flash) * Fix a few compiler warnings
* * Patches by David Müller, 14 Nov 2003:wdenk2003-12-07-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - board/mpl/common/common_util.c * implement support for BZIP2 compressed images * various cleanups (printf -> puts, ...) - board/mpl/common/flash.c * report correct errors to upper layers * check the erase fail and VPP low bits in status reg - board/mpl/vcma9/cmd_vcma9.c - board/mpl/vcma9/flash.c * various cleanups (printf -> puts, ...) - common/cmd_usb.c * fix typo in comment - cpu/arm920t/usb_ohci.c * support for S3C2410 is missing in #if line - drivers/cs8900.c * reinit some registers in case of error (cable missing, ...) - fs/fat/fat.c * support for USB/MMC devices is missing in #if line - include/configs/MIP405.h - include/configs/PIP405.h * enable BZIP2 support * enlarge malloc space to 1MiB because of BZIP2 support - include/configs/VCMA9.h * enable BZIP2 support * enlarge malloc space to 1MiB because of BZIP2 support * enable USB support - lib_arm/armlinux.c * change calling convention of ARM Linux kernel as described on http://www.arm.linux.org.uk/developer/booting.php * Patch by Thomas Lange, 14 Nov 2003: Split dbau1x00 into dbau1000, dbau1100 and dbau1500 configs to support all these AMD boards. * Patch by Thomas Lange, 14 Nov 2003: Workaround for mips au1x00 physical memory accesses (the au1x00 uses a 36 bit bus internally and cannot access physical memory directly. Use the uncached SDRAM address instead of the physical one.)
* * Patch by Steven Scholz, 10 Oct 2003wdenk2003-10-09-0/+168
- Add support for Altera FPGA ACEX1K * Patches by Thomas Lange, 09 Oct 2003: - Endian swap ATA identity for all big endian CPUs, not just PPC - MIPS only: New option CONFIG_MEMSIZE_IN_BYTES for passing memsize args to linux - add support for dbau1x00 board (MIPS32)
generated by cgit v1.1 at 2024-12-20 17:21:28 +0000