summaryrefslogtreecommitdiff
path: root/include/configs/bayleybay.h
Commit message (Collapse)AuthorAgeLines
* x86: baytrail: Add all IDE/SATA PCI device IDsBin Meng2015-08-14-1/+2
| | | | | | | | The BayTrail SoC has 4 different PCI devices IDs regarding to IDE and AHCI. Add these IDs in pci_ids.h and also add the other SATA ID in the Bayley Bay and MinnowMax board configuration header. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Move CONFIG_X86_SERIAL to KconfigSimon Glass2015-08-05-2/+0
| | | | | | | Move this config option to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: bayleybay: Configure PCI IRQBin Meng2015-08-05-0/+1
| | | | | | | | Add PCI IRQ routing information in the board device tree and enable writing PIRQ routing table and MP table. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: Add Intel Bayley Bay board supportBin Meng2015-08-05-0/+45
Intel Bayley Bay board is a BayTrail based board. Add this board with existing baytrail fsp support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>