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* 85xx: Drop FIT support to allow u-boot image to fit in 512kKumar Gala2010-03-12-4/+0
| | | | | | | The 36-bit build exceeds the 512k size we have. Removing FIT type image support allows us to fit and we dont really use it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Remove CONFIG_SYS_DDR_TLB_STARTKumar Gala2010-01-05-1/+0
| | | | | | | Now that we dynamically determine TLB CAM entries to use we dont need CONFIG_SYS_DDR_TLB_START anymore. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* common: delete CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOULHeiko Schocher2009-12-08-3/+0
| | | | | | | | | There is more and more usage of printing 64bit values, so enable this feature generally, and delete the CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL defines. Signed-off-by: Heiko Schocher <hs@denx.de>
* 85xx: Remove unused CONFIG_ASSUME_AMD_FLASH from config filesBecky Bruce2009-12-02-7/+0
| | | | | | | A bunch of the 85xx boards have this cruft in them - it's not used anywhere. Delete it. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* ppc/85xx: Simplify the top makefile for 36-bit config for P2020DSKumar Gala2009-09-24-0/+4
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Enable usb ehci support for p2020ds boardRoy Zang2009-09-15-0/+9
| | | | | Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xxPoonam Aggrwal2009-08-28-1/+0
| | | | | | | | | | | | | The number of CPUs are getting detected dynamically by checking the processor SVR value. Also removed CONFIG_NUM_CPUS references from all the platforms with 85xx/86xx processors. This can help to use the same u-boot image across the platforms. Also revamped and corrected few Freescale Copyright messages. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Removed BEDBUG support from FSL 85xx boardsKumar Gala2009-08-10-1/+0
| | | | | | | | | For some reason the MPC8544 enabled BEDBUG if PCI was enabled and that got copied int the MPC8536, MPC8572 and P2020 DS boards. The BEDBUG support has never been made to work completely on e500/85xx so we just disable it to save space and match the other FSL 85xx boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Report which "bank" of NOR flash we are booting from on FSL boardsKumar Gala2009-07-22-0/+5
| | | | | | | | | | | | | | The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of swizzling the upper address bits of the NOR flash we boot out of which creates the concept of "virtual" banks. This is useful in that we can flash a test of image of u-boot and reset to one of the virtual banks while still maintaining a working image in "bank 0". The PIXIS FPGA exposes registers on LBC which we can use to determine which "bank" we are booting out of (as well as setting which bank to boot out of). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Bump up the BOOTMAP to 16M on FSL 85xx boardsKumar Gala2009-07-21-2/+2
| | | | | | | | We have always mapped at least 16M in the kernel and we have seen cases with new kernel features that a kernel image needs more than 8M of memory. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Remove last remanants of unused CONFIG_I2C_CMD_TREEPeter Tyser2009-07-20-1/+0
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* remove _IO_BASE and KSEG1ADDR from board configuration filesTimur Tabi2009-07-11-6/+0
| | | | | | | | | | | | | | | | The KSEG1ADDR macro used to be necessary for the RTL8139 Ethernet driver, but the code that used that macro was removed over a year ago, so board configuration files no longer need to define it. The _IO_BASE macro is also automatically defined to 0 if it isn't already set, so there's no need to define that macro either in the board configuration files. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Andy Fleming <afleming@freescale.com> Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Acked-by: Kim Phillips <kim.phillips@freescale.com>
* Coding style cleanup; update CHANGELOGWolfgang Denk2009-07-07-2/+3
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* 85xx: Add pci e1000 Ethernet support for P2020 boardRoy Zang2009-06-30-0/+1
| | | | | Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 8xxx: Fix PCI bus address setup for 36-bit configsKumar Gala2009-06-30-3/+3
| | | | | | | | | | | We want the outbound PCI memory map to end at the 4G boundary so we can maximize the amount of space available for inbound mappings if we have large amounts of memory. This matches the device tree setup in the kernel for the 36-bit physical configs for the platforms that have one (MPC8641 HPCN & MPC8572 DS). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add P2020DS supportSrikanth Srinivasan2009-06-12-0/+741
The patch adds support for P2020DS reference platform. DDR3 interface uses hard-coded initialization rather than SPD for now and was tested at 667Mhz. Some PIXIS register definitions and associated code sections need to be fixed. TSEC1/2/3, NOR flash, MAC/SYS ID EEPROM, PCIE1/2/3 are all tested under u-boot. Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Travis Wheatley <Travis.Wheatley@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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