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path: root/include/configs/P1_P2_RDB.h
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* sdhc_boot: Introduce CONFIG_FSL_FIXED_MMC_LOCATION optionFabio Estevam2012-02-12-0/+1
| | | | | | | | | | | | | | | | | | | Since commit 97039ab98 (env_mmc: Allow board code to override the environment address) mmc_get_env_addr is a weak-aliased function in common/env_mmc.c The mmc_get_env_addr implementation that exists at board/freescale/common/sdhc_boot.c is meant to be used only for PowerPC boards, but currently it is being used for all platforms that have CONFIG_ENV_IS_IN_MMC defined. Introduce CONFIG_FSL_FIXED_MMC_LOCATION so that the boards that need to use the mmc_get_env_addr version from board/freescale/common/sdhc_boot.c could activate this config option on their board file. This fixes the retrieval of CONFIG_ENV_OFFSET on non-PowerPC boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Stefano Babic <sbabic@denx.de>
* NAND: remove NAND_MAX_CHIPS definitionsVladimir Zapolskiy2012-01-26-2/+1
| | | | | | | | | | | This change follows the change by Wolfgang Grandegger (commit 6c869637fef), which allows to remove useless NAND_MAX_CHIPS definitions in board config files. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Cc: Wolfgang Grandegger <wg@grandegger.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/85xx: Fix NAND SPL supportKumar Gala2011-11-09-1/+1
| | | | | | | | We cause CCSRBAR to be relocated in the SPL phase of NAND boot which isn't expected and breaks things. Fixing the board config.h to NOT relocate CCSR during the CONFIG_NAND_SPL phase. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* common: cosmetic: CONFIG_BOOTFILE checkpatch complianceJoe Hershberger2011-10-22-1/+1
| | | | | | | | | Remove MK_STR from places that consume CONFIG_BOOTFILE to force all definitions to be string literals. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* common: cosmetic: CONFIG_ROOTPATH checkpatch complianceJoe Hershberger2011-10-22-1/+1
| | | | | | | | | Remove MK_STR from places that consume CONFIG_ROOTPATH to force all definitions to be string literals. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* board configs: drop NET_MULTI referencesMike Frysinger2011-10-05-1/+0
| | | | | | | Now that none of the core checks CONFIG_NET_MULTI, there's not much point in boards defining it. So scrub all references to it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* powerpc/85xx: Fix USB protocol definitions for P1020RDBRamneek Mehresh2011-09-29-1/+4
| | | | | | | | | USB protocol macros (CONFIG_USB_EHCI ...) to be included only when CONFIG_HAS_FSL_DR_USB is defined for a board. Presence of USB DR controller should be declared along with the underlying protocol used in the controller Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macrosTimur Tabi2011-09-29-16/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce the CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW macros, which contain the high and low portions of CONFIG_SYS_CCSRBAR_PHYS. This is necessary for the assembly-language code that relocates CCSR, since the assembler does not understand 64-bit constants. CONFIG_SYS_CCSRBAR_PHYS is automatically defined from the CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW macros, so it should not be defined in a board header file. Similarly, CONFIG_SYS_CCSRBAR_DEFAULT is defined for each SOC in config_mpc85xx.h, so it should also not be defined in the board header file. CONFIG_SYS_CCSR_DO_NOT_RELOCATE is a "short-cut" macro that guarantees that CONFIG_SYS_CCSRBAR_PHYS is set to the same value as CONFIG_SYS_CCSRBAR_DEFAULT, and so CCSR will not be relocated. Since CONFIG_SYS_CCSRBAR_DEFAULT is locked to a fixed value, multi-stage U-Boot builds (e.g. NAND) are required to relocate CCSR only during the last stage (i.e. the "real" U-Boot). All other stages should define CONFIG_SYS_CCSR_DO_NOT_RELOCATE to ensure that CCSR is not relocated. README is updated with descriptions of all the CONFIG_SYS_CCSRBAR_xxx macros. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add default usb mode and phy type to hwconfigRamneek Mehresh2011-07-11-1/+1
| | | | | | | | | | | Move to use hwconfig for usb mode & phy type instead of magic 'usb_phy_type' environment variable on the following platforms: MPC8536DS, P1020RDB, P1020RDB-PC, P1010RDB, P2020RDB, P2020RDB-PC, P2020RDB, P3041DS, P4080DS, & P5020DS. Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* qoriq/p1_p2_rdb: Add Dual Role USB support macro for P1020RDBRamneek Mehresh2011-07-11-0/+1
| | | | | | | Add CONFIG_HAS_FSL_DR_USB macro for P1020RDB Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Bump up the CONFIG_SYS_BOOTM_LEN to 64M on FSL 85xx boardsKumar Gala2011-04-29-3/+3
| | | | | | | | CONFIG_SYS_BOOTMAPSZ has been 64M on these boards for some time so we should also allow the kernel image to be up to 64M decompressed. This also matches what we pass to the OS based on the ePAPR specification. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Enable eSPI support for p1_p2_rdbPriyanka Jain2011-04-29-2/+16
| | | | | | | Also added support to save env to spi flash in case of SPIBOOT. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add support for 2nd USB controller on p1_p2_rdbRamneek Mehresh2011-04-27-0/+1
| | | | | | Second USB controller only works for SPI and SD boot because of pin muxing Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
* powerpc/85xx: Add support to save environment in SD card on p1_p2_rdbPriyanka Jain2011-04-27-1/+5
| | | | | | | | If we boot from a SD card use it for the environment as well. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: rename NAND prefixes to CONFIG_SYSMatthew McClintock2011-04-08-6/+6
| | | | | | | | | | renaming 85xx define CONFIG_NAND_OR_PRELIM to CONFIG_SYS_NAND_OR_PRELIM and CONFIG_NAND_BR_PRELIM to CONFIG_SYS_NAND_BR_PRELIM to use the more appropriate CONFIG_SYS prefix as well as be consistent with 83xx. Signed-off-by: Matthew McClintock <msm@freescale.com> cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add 36-bit physical addressing support for P1_P2_RDBPoonam Aggrwal2011-04-04-3/+64
| | | | | | | | Add support for 36-bit address map for NOR, SD, and SPI boot cfgs. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Priyanka Jain <priyanka.jain@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Read board switch settings on p1_p2_rdbPriyanka Jain2011-04-04-0/+2
| | | | | | | | | | | | | | | | | | | | | PCA9557 is parallel I/O expansion device on I2C bus which stores various board switch settings like NOR Flash-Bank selection, SD Data width. On board: switch SW5[6] is to select width for eSDHC ON - 4-bit [Enable eSPI] OFF - 8-bit [Disable eSPI] switch SW4[8] is to select NOR Flash Bank for Booting OFF - Primary Bank ON - Secondary Bank Read board switch settings on p1_p2_rdb and configure corresponding eSDHC width. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdbPriyanka Jain2011-04-04-4/+4
| | | | | | | | | | | | | | | | | | Using DDR as RAMBOOT base instead of L2SRAM for SDCard and SPI Flash boot loaders because: - P1_P2_RDB boards have soldered DDR so no need for SPD - Also P102x has 256K L2 cache size so becomes a limiting factor for size of image that could be loaded in SRAM mode and would require three stage boot loader (TPL). Changes done: 1. CONFIG_SYS_TEXT_BASE to 0x11000000 2. CONFIG_RESET_VECTOR_ADDRESS to 0x1107fffc Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com> Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Use BR_PHYS_ADDR macro to setup BRs on P1_P2_RDBPoonam Aggrwal2011-04-04-2/+3
| | | | | Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Remove config.mk for nand linker scriptKumar Gala2011-04-04-0/+1
| | | | | | | Move the include of mpc85xx/u-boot-nand.lds to utilize CONFIG_SYS_LDSCRIPT rather than having an explicit config.mk Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix PCI memory map setup on P1_P2_RDBPrabhakar Kushwaha2011-03-24-12/+12
| | | | | | | | | Update the PCIe address map to match standard FSL memory map. Additionally, fix the TLBs so the cover the PCIe address space properly so cards plugged in like an e1000 work correctly. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: corrected p1_p2_rdb EEPROM addressPriyanka Jain2011-02-09-2/+1
| | | | | | | Board EEPROM is used to read/save Ethernet MAC addresses. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Fix compile err when PCI disabled on P1_P2_RDBPrabhakar Kushwaha2011-01-19-5/+8
| | | | | | | | | u-boot cannot be compiled after disabling CONFIG_PCI. Place PCI related codes under #ifdef CONFIG_PCI Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Move RESET_VECTOR_ADDRESS into config.hKumar Gala2011-01-19-0/+6
| | | | | | | | | | | Rather than defining it config.mk we can set it in config.h and remove config.mk from several boards that don't need it. We mimic what 4xx does and introduce CONFIG_RESET_VECTOR_ADDRESS for config.h to set. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de>
* powerpc/85xx: Bump up the CONFIG_SYS_BOOTM_LEN to 16M on FSL 85xx boardsKumar Gala2011-01-14-1/+2
| | | | | | | CONFIG_SYS_BOOTMAPSZ has been 16M on these boards for some time so we should also allow the kernel image to be up to 16M decompressed. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Rework P1_P2_RDB pci_init_board to use common FSL PCIe codeKumar Gala2011-01-14-0/+2
| | | | | | | | Remove duplicated code in P1_P2_RDB boards and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx boards: Rename CONFIG_DDR_DLL to CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_INBecky Bruce2011-01-14-1/+0
| | | | | | | | | This config option is for an erratum workaround; rename it to be more clear. Also, drop it from config files don't need it and were undefining it. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* tsec: Revert to setting TBICR_ANEG_ENABLE by default for SGMIIKumar Gala2010-12-13-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following commit: commit 46e91674fb4b6d06c6a4984c0b5ac7d9a16923f4 Author: Peter Tyser <ptyser@xes-inc.com> Date: Tue Nov 3 17:52:07 2009 -0600 tsec: Force TBI PHY to 1000Mbps full duplex in SGMII mode Removed setting Auto-Neg by default, however this is believed to be proper default configuration for initialization of the TBI interface. Instead we explicitly set CONFIG_TSEC_TBICR_SETTINGS for the XPedite5370 & XPedite5500 boards that use a Broadcomm PHY which require Auto-Neg to be disabled to function properly. This addresses a breakage on the P2020 DS & MPC8572 DS boards when used with an SGMII riser card. We also remove setting CONFIG_TSEC_TBICR_SETTINGS on the P1_P2_RDB family of boards as now the default setting is sufficient for them. Additionally, we clean up the code a bit to remove an unnecessary second define. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Peter Tyser <ptyser@xes-inc.com>
* powerpc/85xx: Introduce CONFIG_SYS_EXTRA_ENV_RELOCKumar Gala2010-11-30-2/+3
| | | | | | | | | | | | | | | | | Some systems need to relocate the env_addr pointer early because the location it points to will get invalidated before env_relocate is called. One example is on systems that might use a L2 or L3 cache in SRAM mode and initialize that cache from SRAM mode back to being a cache in cpu_init_r. We set this on the 85xx boards that have support for NAND, SPI, or SDHC/MMC boot support as they use a secondary cache in SRAM mode and need the env_addr pointer relocated since we change from SRAM to normal cache mode in cpu_init_r. Also removed CONFIG_SYS_SPL as its not used anywhere. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* p1_p2_rdb: to set SQW/INT pin of RTC as INT linePriyanka Jain2010-11-12-0/+1
| | | | | | | | | | SQW/INT pin in RTC can be used for generating square wave(by default) or as interrupt line. U-boot is registering this pin for interrupts. Configuring SQW/INT bit as interrupt line during board initialization to avoid spurious interrupts generated by square wave. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: add CONFIG_SYS_TEXT_BASE_SPL for 85xx nand spl buildHaiying Wang2010-11-12-3/+10
| | | | | | | | | | Introduce a SPL specific CONFIG_SYS_TEXT_BASE_SPL define to be used by the linker. This has similiar semantics to CONFIG_SYS_TEXT_BASE however since SPL is a unqiue image we introduce a new variable to control its text base address. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated valueWolfgang Denk2010-10-26-2/+1
| | | | | | | | | | | | | | | | | | CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not being able to use "sizeof(struct global_data)" in assembler files. Recent experience has shown that manual synchronization is not reliable enough. This patch renames CONFIG_SYS_GBL_DATA_SIZE into GENERATED_GBL_DATA_SIZE which gets automatically generated by the asm-offsets tool. In the result, all definitions of this value can be deleted from the board config files. We have to make sure that all files that reference such data include the new <asm-offsets.h> file. No other changes have been done yet, but it is obvious that similar changes / simplifications can be done for other, related macro definitions as well. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* Rename CONFIG_SYS_INIT_RAM_END into CONFIG_SYS_INIT_RAM_SIZEWolfgang Denk2010-10-26-2/+2
| | | | | | | | | | | | | | | | | | CONFIG_SYS_INIT_RAM_END was a misnomer as it suggests this might be some end address; to make the meaning more clear we rename it into CONFIG_SYS_INIT_RAM_SIZE No other code changes are performed in this patch, only minor editing of white space (due to the changed length) and the comments was done, where noticed. Note that the code for the PATI and cmi_mpc5xx board configurations looks seriously broken. Last known maintainers on Cc: Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Denis Peter <d.peter@mpl.ch> Cc: Martin Winistoerfer <martinwinistoerfer@gmx.ch> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: Cleanup BOOTFLAG_* referencesPeter Tyser2010-10-18-8/+0
| | | | | | | | | | | | Now that warm booting is not supported, there isn't a need for the BOOTFLAG_COLD and BOOTFLAG_WARM defines, so remove them. Note that this change makes the board info bd_bootflags field useless. It will always be set to 0, but we leave it around so that we don't break the board info structure that some OSes are expecting to be passed from U-Boot. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Makefile: move all Power Architecture boards into boards.cfgWolfgang Denk2010-10-18-3/+7
| | | | | | | | | | Clean up Makefile, and drop a lot of the config.mk files on the way. We now also automatically pick all boards that are listed in boards.cfg (and with all configurations), so we can drop the redundant entries from MAKEALL to avoid building these twice. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Rename TEXT_BASE into CONFIG_SYS_TEXT_BASEWolfgang Denk2010-10-18-6/+6
| | | | | | | | | | | | The change is currently needed to be able to remove the board configuration scripting from the top level Makefile and replace it by a simple, table driven script. Moving this configuration setting into the "CONFIG_*" name space is also desirable because it is needed if we ever should move forward to a Kconfig driven configuration system. Signed-off-by: Wolfgang Denk <wd@denx.de>
* mkconfig: change CONFIG_MK_ prefix into plain CONFIG_Wolfgang Denk2010-10-18-7/+7
| | | | | | | | | | | | | | | | | | | | When planning for more generalization and Makefile cleanup it became obvious that the introduction of a separate CONFIG_MK_ name space for config options that were set through scripting in the Makefile was not a good idea. Originally the idea was to provide a script-free approach to supply configuration options - there was no real need for a separate name space. But when we now convert the existing Makefile entries to make use of this approach, it would mean that we have to touch a large number of board config files and add #ifdef / #define sequences to "convert" from the CONFIG_MK_ to the CONFIG_ name space. It seems much cleaner to get rid of this somewhat arbitrary _MK string now for the few boards that actually use it. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* Remove unused CONFIG_SERIAL_SOFTWARE_FIFO featureStefan Roese2010-09-23-1/+0
| | | | | | | | | This patch removes the completely unused CONFIG_SERIAL_SOFTWARE_FIFO feature from U-Boot. It has only been implemented for PPC4xx and was not used at all. So let's remove it and make the code smaller and cleaner. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
* powerpc/85xx: configure autocompletion supportKim Phillips2010-08-01-0/+1
| | | | | | | because it's convenient. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Move PCI/PCIe address defines into common immap_85xx.hKumar Gala2010-07-20-3/+0
| | | | | | | Remove dupliacted setting of PCI/PCIe address and offsets in board config.h. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx/p1_p2_rdb: PCIe E1000 card support added.Poonam Aggrwal2010-07-16-0/+1
| | | | | | | | Enables the Intel Pro/1000 PT Gb Ethernet PCI-E Network Adapter configuration support for P1/P2 RDB. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc85xx: Add reginfo commandBecky Bruce2010-07-16-0/+1
| | | | | | | | The new command dumps the TLBCAM, the LAWs, and the BR/OR regs. Add CONFIG_CMD_REGINFO to the config for all MPC85xx parts. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx/p1_p2_rdb: enable hwconfigPoonam Aggrwal2010-07-16-0/+2
| | | | | Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* tsec: Fix eTSEC2 link problem on P2020RDBFelix Radensky2010-06-29-0/+9
| | | | | | | | | | | | On P2020RDB eTSEC2 is connected to Vitesse VSC8221 PHY via SGMII. Current TBI PHY settings for SGMII mode cause link problems on this platform, link never comes up. Fix this by making TBI PHY settings configurable and add a working configuration for P2020RDB. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Acked-by: Andy Fleming <afleming@freescale.com>
* 85xx/p1_p2_rdb: not able to modify "$bootfile" environment variablePoonam Aggrwal2010-06-29-1/+0
| | | | | | | Because the variable was getting defined twice. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
* ppc/85xx: Use CONFIG_NS16550_MIN_FUNCTIONS to reduce NAND_SPL sizeKumar Gala2010-04-07-0/+3
| | | | | | | | | | | | | | | | The MPC8536DS_NAND SPL build was failing due to code size increase introduced by commit: commit 33f57bd553edf29dffef5a6c7d76e169c79a6049 Author: Kumar Gala <galak@kernel.crashing.org> Date: Fri Mar 26 15:14:43 2010 -0500 85xx: Fix enabling of L1 cache parity on secondary cores We built in some NS16550 functions that we dont need and can get rid of them via CONFIG_NS16550_MIN_FUNCTIONS. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx/p1_p2_rdb: enable hwconfigVivek Mahajan2010-01-25-0/+1
| | | | | Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Remove CONFIG_SYS_DDR_TLB_STARTKumar Gala2010-01-05-2/+0
| | | | | | | Now that we dynamically determine TLB CAM entries to use we dont need CONFIG_SYS_DDR_TLB_START anymore. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* common: delete CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOULHeiko Schocher2009-12-08-3/+0
| | | | | | | | | There is more and more usage of printing 64bit values, so enable this feature generally, and delete the CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL defines. Signed-off-by: Heiko Schocher <hs@denx.de>
* Coding Style cleanup; update CHANGELOG, prepare -rc1v2009.11-rc1Wolfgang Denk2009-10-28-1/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
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