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path: root/include/configs/MPC8555CDS.h
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* Update Freescale 85xx boards to sys_eeprom.cTimur Tabi2008-09-09-2/+8
| | | | | | | | | The new sys_eeprom.c supports both the old CCID EEPROM format and the new NXID format, and so it obsoletes board/freescale/common/cds_eeprom.c. Freescale 86xx boards already use sys_eeprom.c, so this patch migrates the remaining Freescale 85xx boards to use it as well. cds_eeprom.c is deleted. Signed-off-by: Timur Tabi <timur@freescale.com>
* FSL DDR: Convert MPC8555ADS to new DDR code.Jon Loeliger2008-08-27-17/+18
| | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* drivers/mtd: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2008-08-13-1/+1
| | | | | | rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* 85xx: remove dummy board_early_init_fKumar Gala2008-06-11-2/+0
| | | | | | | A number of board ports have empty version of board_early_init_f for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Remove unused and unconfigured memory test code.Kumar Gala2008-06-11-1/+0
| | | | | | | Remove unused and unconfigured DDR test code from FSL 85xx boards. Besides, other common code exists. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Big white-space cleanup.Wolfgang Denk2008-05-21-12/+12
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* FSL: Clean up board/freescale/common/MakefileJon Loeliger2008-03-26-0/+5
| | | | | | | | | | | | | | | Each file that can be built here now follows some CONFIG_ option so that they are appropriately built or not, as needed. And CONFIG_ defines were added to various board config files to make sure that happens. The other board/freescale/*/Makefiles no longer need to reach up and over into ../common to build their individually needed files any more. Boards that are CDS specific were renamed with cds_ prefix. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* 85xx: Add the concept of CFG_CCSRBAR_PHYSKumar Gala2008-03-26-0/+1
| | | | | | | | | When we go to 36-bit physical addresses we need to keep the concept of the physical CCSRBAR address seperate from the virtual one. For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Get ride of old TLB setup codeKumar Gala2008-01-17-1/+0
| | | | | | | Now that all boards have been converted, remove old config code and the config option for the new style. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Convert MPC8541/MPC8555/MPC8548 CDS to new TLB setupKumar Gala2008-01-17-0/+1
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: convert MPC8541/MPC8555/MPC8548 CDS over to use new LAW init codeKumar Gala2008-01-16-0/+1
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Remove cache config from configs.hKumar Gala2008-01-09-7/+0
| | | | | | | | | Either use the standard defines in asm/cache.h or grab the information at runtime from the L1CFG SPR. Also, minor cleanup in cache.h to make the code a bit more readable. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Update Freescale MPC85xx ADS/CDS/MDS board configKumar Gala2007-12-11-0/+1
| | | | | | * Enabled CONFIG_CMD_ELF Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Update Freescale MPC85xx ADS/CDS/MDS board configKumar Gala2007-12-11-0/+1
| | | | | | | * Removed some misc environment setup * Enabled CONFIG_CMDLINE_EDITING Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Update MPC85xx CDS to use libfdtKumar Gala2007-12-11-8/+3
| | | | | | | Updated the MPC85xx CDS config to use libfdt and assume use of aliases for ethernet, pci, and serial for the various fixups that are done. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Improve handling of PCI interrupt device tree fixup on MPC85xx CDSKumar Gala2007-10-19-0/+1
| | | | | | | | | | | | | | | On the MPC85xx CDS we have two issues: 1. The device tree fixup code did not check to see if the property we are trying to update is actually found. Its possible that it would update random memory starting at 0. 2. Newer Linux kernel's have moved the location of the PCI nodes to be sibilings of the soc node and not children. The explicit PATH to the PCI node would not be found for these device trees. Add the ability to handle both paths. In the future we shouldn't handle such fixups by explicit path. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fdt: remove unused OF_FLAT_TREE_MAX_SIZE referencesKim Phillips2007-08-29-3/+0
| | | | | | and make some minor corrections to the FDT part of the README. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Add CONFIG_HAS_ETH0 to all boards with TSECAndy Fleming2007-08-16-0/+1
| | | | | | | | | The 85xx code now relies on CONFIG_HAS_ETH0 to determine whether to update TSEC1's device-tree node, so we need to add it to all the boards with TSECs. Do this for 83xx and 86xx, too, since they will eventually do something similar. Signed-off-by: Andy Fleming <afleming@freescale.com>
* Define tsec flag values in config filesAndy Fleming2007-08-16-3/+2
| | | | | | | | | | The tsec_info structure and array has a "flags" field for each ethernet controller. This field is the only reason there are settings. Switch to defining TSECn_FLAGS for each controller in the config header, and we can greatly simplify the array, and also simplify the addition of future boards. Signed-off-by: Andy Fleming <afleming@freescale.com>
* 85xxCDS: Add make targets for legacy systems.Randy Vinson2007-08-14-0/+7
| | | | | | | | The PCI ID select values on the Arcadia main board differ depending on the version of the hardware. The standard configuration supports Rev 3.1. The legacy target supports Rev 2.x. Signed-off-by Randy Vinson <rvinson@mvista.com>
* include/configs/[J-O]*: Cleanup BOOTP and lingering CFG_CMD_*.Jon Loeliger2007-07-10-0/+9
| | | | | | | | | Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h used to be included but CONFIG_BOOTP_MASK was not defined. Remove lingering references to CFG_CMD_* symbols. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* include/configs: Use new CONFIG_CMD_* in 85xx board config files.Jon Loeliger2007-07-05-14/+14
| | | | Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECxKim Phillips2007-05-17-4/+4
| | | | | | | For all practical u-boot purposes, TSECs don't differ throughout the mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Converted all 85xx boards to use a common FSL I2C driver.Jon Loeliger2006-10-20-2/+6
| | | | | | | | Introduced COFIG_FSL_I2C to select the common FSL I2C driver. And removed hard i2c path from a few u-boot.lds scipts too. Minor whitespace cleanups along the way. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Updated config headers to add default FDT-based bootingAndy Fleming2006-09-19-3/+6
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* * Added VIA configuration tableMatthew McClintock2006-08-09-14/+9
| | | | | | | * Added support for PCI2 on CDS Patch by Andy Fleming 17-Mar-2006 Signed-off-by: Andy Fleming <afleming@freescale.com>
* * Add Flat Dev Tree construction for MPC85xx ADS and CDS boards Patch by Jon ↵Matthew McClintock2006-08-09-0/+12
| | | | | | Loeliger 17-Jan-2006 Signed-off-by: Jon Loeliger <jdl@freescale.com>
* * Patch by Jon Loeliger, 2005-05-05Jon Loeliger2005-07-25-3/+10
| | | | | | | | Implemented support for MPC8548CDS board. Added DDR II support based on SPD values for MPC85xx boards. This roll-up patch also includes bugfies for the previously published patches: DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
* * Patch by Jon Loeliger, Kumar Gala, 2005-02-08Jon Loeliger2005-07-25-9/+42
| | | | | | | For MPC85xxCDS: Adds Relaxed Timing TRLX bit to FLASH ORx regs to allow for faster flash parts. Add documentation for BR/OR for FLASH.
* * Patch by Jon Loeliger, Kumar Gala 2005-02-08Jon Loeliger2005-07-23-0/+1
| | | | | | | | - Convert the CPM2 based functionality to use new CONFIG_CPM2 option rather than a myriad of CONFIG_MPC8560-like variants. Applies to MPC85xx and MPC8260 boards, includes stxgp3 and sbc8560. Eliminates the CONFIG_MPC8560 option entirely. Distributes the new CONFIG_CPM2 option to each 8260 board.
* * Patch by Jon Loeliger, 02 Sep 2004:wdenk2005-01-09-1/+1
| | | | | | | | | | | | | | Reset monitor size back to 256 so environment can be written to flash on MPC85xx ADS and CDS releases. * Patch by Paolo Broggini, 02 Sep 2004: Make BSS clearing on ARM systems more robust * Patch by Yue Hu and Joe, 01 Sep 2004: - add PCI support for ixp425; - add EEPRO100 suppor tfor ixdp425 board. * Fix problem with protected sector detection in driver/cfi_flash.c
* * Code cleanup, mostly for GCC-3.3.xwdenk2004-12-31-0/+2
| | | | | | | | | | | | * Cleanup confusing use of CONFIG_ETH*ADDR - ust his only to pre-define a MAC address; use CONFIG_HAS_ETH* to enable support for additional ethernet addresses. * Cleanup drivers/i82365.c - avoid duplication of code * Fix bogus "cannot span across banks" flash error message * Add support for CompactFlash for the CPC45 Board.
* Patches by Scott McNutt, 24 Aug 2004:wdenk2004-10-10-12/+0
| | | | | | - Add support for Altera Nios-II processors. - Add support for Psyent PCI-5441 board. - Add support for Psyent PK1C20 board.
* Patches by Jon Loeliger, 24 Aug 2004:wdenk2004-10-10-0/+474
- Add support for the MPC8541 and MPC8555 CDS boards - Cleanup eth?addr handling: make dependent on CONFIG_ETH?ADDR
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