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path: root/include/configs/MPC8548CDS.h
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* Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECxKim Phillips2007-05-17-8/+8
| | | | | | | For all practical u-boot purposes, TSECs don't differ throughout the mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Cleaned up some 85xx PCI bugsAndy Fleming2007-05-02-4/+4
| | | | | | | | | | | * Cleaned up the CDS PCI Config Tables and added NULL entries to the end * Fixed PCIe LAWBAR assignemt to use the cpu-relative address * Fixed 85xx PCI code to assign powar region sizes based on the config values (rather than hard-coding them) * Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address Signed-off-by: Andy Fleming <afleming@freescale.com>
* Fix PCI I/O space mapping on Freescale MPC85x0ADSSergei Shtylyov2007-04-23-1/+1
| | | | | | | | | | | | | | | | | | | | The PCI I/O space mapping for Freescale MPC8540ADS board was broken by commit 52c7a68b8d587ebcf5a6b051b58b3d3ffa377ddc which failed to update the #define's describing the local address window used for the PCI I/O space accesses -- fix this and carry over the necessary changes into the MPC8560ADS code since the PCI I/O space mapping was also broken for this board (by the earlier commit 087454609e47295443af793a282cddcd91a5f49c). Add the comments clarifying how the PCI I/O space must be mapped to all the MPC85xx board config. headers. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> board/mpc8540ads/init.S | 4 ++-- board/mpc8560ads/init.S | 4 ++-- include/configs/MPC8540ADS.h | 5 ++--- include/configs/MPC8541CDS.h | 2 +- include/configs/MPC8548CDS.h | 2 +- include/configs/MPC8560ADS.h | 8 ++++---- 6 files changed, 12 insertions(+), 13 deletions(-)
* u-boot: Disables MPC8548CDS 2T_TIMING for DDR by defaultebony.zhu@freescale.com2007-04-23-1/+1
| | | | | | This patch disables MPC8548CDS 2T_TIMING for DDR by default. Signed-off-by:Ebony Zhu <ebony.zhu@freescale.com>
* u-boot: Enable PCI function and add PEX & rapidio memory map on MPC8548CDS boardZang Roy-r619112007-04-23-8/+20
| | | | | | Enable PCI function and add PEX & rapidio memory map on MPC8548CDS board. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
* Merge with /home/wd/git/u-boot/masterWolfgang Denk2006-10-24-7/+16
|\ | | | | | | | | (Conflicts between Jon Loeliger's and Matthew McClintock's tree were resolved by in favour of Jon's version.)
| * Converted all 85xx boards to use a common FSL I2C driver.Jon Loeliger2006-10-20-2/+6
| | | | | | | | | | | | | | | | Introduced COFIG_FSL_I2C to select the common FSL I2C driver. And removed hard i2c path from a few u-boot.lds scipts too. Minor whitespace cleanups along the way. Signed-off-by: Jon Loeliger <jdl@freescale.com>
| * Updated config headers to add default FDT-based bootingAndy Fleming2006-09-19-5/+8
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| * Add support for eTSEC 3 & 4 on 8548 CDSAndy Fleming2006-09-19-1/+3
| | | | | | | | | | | | | | * Added support for using eTSEC 3 and eTSEC 4 on the 8548 CDS. This will only work on rev 1.3 boards (but doesn't break older boards) * Cleaned up some comments to reflect the expanded role of tsec in other systems
| * * Added VIA configuration tableMatthew McClintock2006-08-09-14/+9
| | | | | | | | | | | | | | * Added support for PCI2 on CDS Patch by Andy Fleming 17-Mar-2006 Signed-off-by: Andy Fleming <afleming@freescale.com>
| * * Add Flat Dev Tree construction for MPC85xx ADS and CDS boards Patch by Jon ↵Matthew McClintock2006-08-09-0/+12
| | | | | | | | | | | | Loeliger 17-Jan-2006 Signed-off-by: Jon Loeliger <jdl@freescale.com>
* | * Added VIA configuration tableMatthew McClintock2006-06-28-14/+9
| | | | | | | | | | | | | | * Added support for PCI2 on CDS Patch by Andy Fleming 17-Mar-2006 Signed-off-by: Andy Fleming <afleming@freescale.com>
* | * Add Flat Dev Tree construction for MPC85xx ADS and CDS boardsMatthew McClintock2006-06-28-0/+12
|/ | | | | | Patch by Jon Loeliger 17-Jan-2006 Signed-off-by: Jon Loeliger <jdl@freescale.com>
* * Patch by Jon Loeliger, 2005-05-05Jon Loeliger2005-07-25-0/+521
Implemented support for MPC8548CDS board. Added DDR II support based on SPD values for MPC85xx boards. This roll-up patch also includes bugfies for the previously published patches: DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
generated by cgit v1.1 at 2024-12-15 21:23:31 +0000