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path: root/include/configs/MPC8349ITX.h
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* mpc83xx: turn on icache in core initialization to improve u-boot boot timeKim Phillips2010-04-22-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | before, MPC8349ITX boots u-boot in 4.3sec: column1 is elapsed time since first message column2 is elapsed time since previous message column3 is the message 0.000 0.000: U-Boot 2010.03-00126-gfd4e49c (Apr 11 2010 - 17:25:29) MPC83XX 0.000 0.000: 0.000 0.000: Reset Status: 0.000 0.000: 0.032 0.032: CPU: e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz 0.032 0.000: Board: Freescale MPC8349E-mITX 0.032 0.000: UPMA: Configured for compact flash 0.032 0.000: I2C: ready 0.061 0.028: DRAM: 256 MB (DDR1, 64-bit, ECC off, 266.667 MHz) 1.516 1.456: FLASH: 16 MB 2.641 1.125: PCI: Bus Dev VenId DevId Class Int 2.652 0.011: 00 10 1095 3114 0180 00 2.652 0.000: PCI: Bus Dev VenId DevId Class Int 2.652 0.000: In: serial 2.652 0.000: Out: serial 2.652 0.000: Err: serial 2.682 0.030: Board revision: 1.0 (PCF8475A) 3.080 0.398: Net: TSEC1: No support for PHY id ffffffff; assuming generic 3.080 0.000: TSEC0, TSEC1 4.300 1.219: IDE: Bus 0: .** Timeout ** after, MPC8349ITX boots u-boot in 3.0sec: 0.010 0.010: U-Boot 2010.03-00127-g4b468cc-dirty (Apr 11 2010 - 17:47:29) MPC83XX 0.010 0.000: 0.010 0.000: Reset Status: 0.010 0.000: 0.017 0.007: CPU: e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz 0.017 0.000: Board: Freescale MPC8349E-mITX 0.038 0.020: UPMA: Configured for compact flash 0.038 0.000: I2C: ready 0.038 0.000: DRAM: 256 MB (DDR1, 64-bit, ECC off, 266.667 MHz) 0.260 0.222: FLASH: 16 MB 1.390 1.130: PCI: Bus Dev VenId DevId Class Int 1.390 0.000: 00 10 1095 3114 0180 00 1.390 0.000: PCI: Bus Dev VenId DevId Class Int 1.400 0.010: In: serial 1.400 0.000: Out: serial 1.400 0.000: Err: serial 1.400 0.000: Board revision: 1.0 (PCF8475A) 1.832 0.432: Net: TSEC1: No support for PHY id ffffffff; assuming generic 1.832 0.000: TSEC0, TSEC1 3.038 1.205: IDE: Bus 0: .** Timeout ** also tested on these boards (albeit with a less accurate boottime measurement method): seconds: before after 8349MDS ~2.6 ~2.2 8360MDS ~2.8 ~2.6 8313RDB ~2.5 ~2.3 #nand boot 837xRDB ~3.1 ~2.3 also tested on an 8323ERDB. v2: also remove the delayed icache enablement assumption in arch ppc's board.c, and add a CONFIG_MPC83xx define in the ITX config file for consistency (even though it was already being defined in 83xx' config.mk). Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: enable command line autocompletionKim Phillips2010-04-22-1/+2
| | | | | | because it's convenient. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: remove hardcoded network addresses from config filesKim Phillips2010-02-22-12/+0
| | | | | | | and avoid e.g., two identical boards from causing random networking conflicts when hooked up to the same network. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfieldsKim Phillips2009-09-26-1/+2
| | | | | | | | | | | | | | | | | | | some LCRR bits are not documented throughout the 83xx family RMs. New board porters copying similar board configurations might omit setting e.g., DBYP since it was not documented in their SoC's RM. Prevent them bricking their board by retaining power on reset values in bit fields that the board porter doesn't explicitly configure via CONFIG_SYS_<registername>_<bitfield> assignments in the board config file. also move LCRR assignment to cpu_init_r[am] to help ensure no transactions are being executed via the local bus while CLKDIV is being modified. also start to use i/o accessors. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: mpc8349itx - accommodate larger kernel sizes & unzero the bootdelayKim Phillips2009-08-26-3/+3
| | | | | | | | | | apparently the ITX was missed last round. Also make bootdelay consistent with other boards, so as to give on the opportunity to fix mistakenly set bootcmd without having checked for an bootdelay zero setting first. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Update Freescale copyrights to remove "All Rights Reserved"Kumar Gala2009-07-29-1/+1
| | | | | | "All Rights Reserved" conflicts with the GPL. Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
* mpc83xx: CONFIG_83XX_GENERIC_PCI is now synonymous with CONFIG_PCI; remove ↵Kim Phillips2009-07-27-1/+0
| | | | | | the former Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: convert all remaining boards over to 83XX_GENERIC_PCIKim Phillips2009-07-18-0/+1
| | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: increase MONITOR_LEN to offset growing painsKim Phillips2009-07-14-1/+1
| | | | | | | | Saving the environment leads to overwriting u-boot itself, bricking boards. Increase u-boot's image size so the environment base address doesn't end up overlapping u-boot text. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* usb: mpx8349itx: added support of loading images from USB storage (MPH/DR)Valeriy Glushkov2009-07-14-2/+29
| | | | | Signed-off-by: Valeriy Glushkov <gvv@lstec.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* remove _IO_BASE and KSEG1ADDR from board configuration filesTimur Tabi2009-07-11-7/+0
| | | | | | | | | | | | | | | | The KSEG1ADDR macro used to be necessary for the RTL8139 Ethernet driver, but the code that used that macro was removed over a year ago, so board configuration files no longer need to define it. The _IO_BASE macro is also automatically defined to 0 if it isn't already set, so there's no need to define that macro either in the board configuration files. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Andy Fleming <afleming@freescale.com> Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Acked-by: Kim Phillips <kim.phillips@freescale.com>
* 83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]xPeter Tyser2009-06-12-1/+1
| | | | | | | | Use the standard lowercase "x" capitalization that other Freescale architectures use for CPU defines to prevent confusion and errors Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* i2c: Remove deprecated individual i2c commandsPeter Tyser2009-06-12-1/+0
| | | | | | | | | | | | | The following individual I2C commands have been removed: imd, imm, inm, imw, icrc32, iprobe, iloop, isdram. The functionality of the individual commands is still available via the 'i2c' command. This change only has an impact on those boards which did not have CONFIG_I2C_CMD_TREE defined. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* mpc83xx: Set guarded bit on BAT that covers the end of the address spaceScott Wood2009-04-01-1/+2
| | | | | | | | | | | | | | | | | The mpc8313erdb board currently sets DBAT6 to cover all of the final 256MiB of address space; however, not all of this space is covered by a device. In particular, flash sits at 0xfe000000-0xfe7fffff, and nothing is mapped at the far end of the address space. In zlib, there is a loop that references p[-1] if p is non-NULL. Under some circumstances, this leads to the CPU speculatively loading from 0xfffffff8 if p is NULL. This leads to a machine check. Signed-off-by: Scott Wood <scottwood@freescale.com> continuation to the remaining mpc83xx boards that suffer from the same problem. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* MPC8349ITX: several config issues fixedValeriy Glushkov2009-03-05-0/+5
| | | | | | | | | The previous version rebooted forever with DDR bigger than 256MB. Access the DS1339 RTC chip is on I2C1 bus. Allow DHCP. Signed-off-by: Valeriy Glushkov <gvv@lstec.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc8349itx: allow SATA boot from the onboard SIL1334Valeriy Glushkov2009-02-16-2/+21
| | | | | | | | This patch allows using of SATA devices connected to the onboard PCI SIL1334 SATA controller. Signed-off-by: Valeriy Glushkov <gvv@lstec.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Removed unused CONFIG_L1_INIT_RAM symbol.Jon Loeliger2008-12-01-1/+0
| | | | | | | Prevent further viral propogation of the unused symbol CONFIG_L1_INIT_RAM by just removing it. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-188/+188
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* mpc83xx: add h/w flash protection to board configsKim Phillips2008-09-24-0/+1
| | | | | | | | the operating system may leave flash in a h/w locked state after writing. This allows u-boot to continue to write flash by enabling h/w unlocking by default. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* rename CFG_ENV macros to CONFIG_ENVJean-Christophe PLAGNIOL-VILLARD2008-09-10-6/+6
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASHJean-Christophe PLAGNIOL-VILLARD2008-09-10-1/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* rename CFG_ENV_IS_NOWHERE in CONFIG_ENV_IS_NOWHEREJean-Christophe PLAGNIOL-VILLARD2008-09-10-1/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* drivers/mtd: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2008-08-13-2/+2
| | | | | | rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* 83xx/85xx: further localbus cleanupsAnton Vorontsov2008-06-10-2/+2
| | | | | | | | | | | | | move the BRx_* and ORx_* left behind in mpc85xx.h The same is needed for mpc8xx.h and mpc8260.h (defines are almost the same, just few differences which needs some attention though). But the bad news for mpc8xx and mpc8260 is that there are a lot of users of these defines. So this cleanup I'll leave for the "better times". Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* PPC: Create and use CONFIG_HIGH_BATSBecky Bruce2008-06-03-0/+1
| | | | | | | | | | | Change all code that conditionally operates on high bat registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS instead of the myriad ways this is done now. Define the option for every config for which high bats are supported (and enabled by early boot, on parts where they're not always enabled) Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* Big white-space cleanup.Wolfgang Denk2008-05-21-13/+13
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* mpc83xx: bump loadaddr over fdtaddr to 0x500000Kim Phillips2008-04-25-1/+1
| | | | | | | | this seems as a good compromise between human memory, typing, and last but not least, to accommodate for current and future kernel bloat. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Dave Liu <daveliu@freescale.com>
* Modified the DDR SDRAM clock control register to delay MCK/MCK_B 3/4 clockJoe D'Abbraccio2008-03-25-1/+1
| | | | | | | | | With the original value of 1/2 clock cycle delay, the system ran relatively stable except when we run benchmarks that are intensive users of memory. When I run samba connected disk with a HDBENCH test, the system locks-up or reboots sporadically. Signed-off by: Joe D'Abbraccio <Joe.D'abbraccio@freescale.com>
* 83xx: Add Vitesse VSC7385 firmware uploadingTimur Tabi2008-03-25-10/+23
| | | | | | | | | | Update the MPC8349E-mITX, MPC8313E-RDB, and MPC837XE-RDB board files to upload the Vitesse VSC7385 firmware. Changed CONFIG_VSC7385 to CONFIG_VSC7385_ENET. Cleaned up the board header files to make selecting the VSC7385 easier to control. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: Remove cache config from config.hDave Liu2008-01-10-9/+0
| | | | | | | clean up the cache config from configs.h of board Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: convert to using do_fixup_*()Kim Phillips2008-01-08-6/+2
| | | | | | | | | convert to using simpler mpc85xx style fdt update code; streamline by eliminating macros OF_SOC, OF_CPU, etc. which allows us to rm the old school FLAT_TREE code from 83xx (since the sbc8349 was just converted over to using libfdt). Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* 83xx: fix CFG_ENV_ADDR and CFG_ENV_SECT_SIZE definitionsTimur Tabi2008-01-08-1/+2
| | | | | | | | | Fix the definitions of CFG_ENV_ADDR and CFG_ENV_SECT_SIZE for all of the currently-defined 83xx boards. This change guarantees that the environment will be located on the first flash sector after the U-Boot image. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* fdt: remove unused OF_FLAT_TREE_MAX_SIZE referencesKim Phillips2007-08-29-3/+0
| | | | | | and make some minor corrections to the FDT part of the README. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Merge with /home/wd/git/u-boot/custodian/u-boot-mpc85xxWolfgang Denk2007-08-18-0/+1
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| * Add CONFIG_HAS_ETH0 to all boards with TSECAndy Fleming2007-08-16-0/+1
| | | | | | | | | | | | | | | | | | The 85xx code now relies on CONFIG_HAS_ETH0 to determine whether to update TSEC1's device-tree node, so we need to add it to all the boards with TSECs. Do this for 83xx and 86xx, too, since they will eventually do something similar. Signed-off-by: Andy Fleming <afleming@freescale.com>
* | Merge with /home/wd/git/u-boot/custodian/u-boot-mpc83xxWolfgang Denk2007-08-18-1/+1
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| * mpc83xx: enable libfdt by default on freescale boardsKim Phillips2007-08-15-1/+1
| | | | | | | | | | | | | | | | this enables libfdt code by default for the freescale mpc8313erdb, mpc832xemds, mpc8349emds, mpc8349itx and gp boards. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Define tsec flag values in config filesAndy Fleming2007-08-16-0/+2
|/ | | | | | | | | | The tsec_info structure and array has a "flags" field for each ethernet controller. This field is the only reason there are settings. Switch to defining TSECn_FLAGS for each controller in the config header, and we can greatly simplify the array, and also simplify the addition of future boards. Signed-off-by: Andy Fleming <afleming@freescale.com>
* Merge with /home/wd/git/u-boot/custodian/u-boot-mpc83xxWolfgang Denk2007-08-09-3/+4
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| * Merge git://www.denx.de/git/u-bootKim Phillips2007-07-06-7/+7
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| * | fix compilation problem for mpc8349itx CFG_RAMBOOTNikita V. Youshchenko2007-06-01-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current include/configs/MPC8349ITX.h does contain some support for building image that will be started from memory (without putting in into flash). It could be triggered by building with TEXT_BASE set to a low value. However, this support is incomplete: using of low TEXT_BASE causes defining configuration macros in inconsistent way, which later leads to compilation errors. In particular. flash support is being disabled, but then flash structures get referenced. This patch fixes this, making it possible to build with low TEXT_BASE. Signed-Off-By: Nikita Youshchenko <yoush@debian.org> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | add missing 'console' var to default mpc8349itx configNikita V. Youshchenko2007-06-01-1/+3
| | | | | | | | | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | include/configs/[J-O]*: Cleanup BOOTP and lingering CFG_CMD_*.Jon Loeliger2007-07-10-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h used to be included but CONFIG_BOOTP_MASK was not defined. Remove lingering references to CFG_CMD_* symbols. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* | | include/configs: Use new CONFIG_CMD_* in 83xx board config files.Jon Loeliger2007-07-05-24/+18
| |/ |/| | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com>
* | Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECxKim Phillips2007-05-17-7/+7
|/ | | | | | | For all practical u-boot purposes, TSECs don't differ throughout the mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Fix memory initialization on MPC8349E-mITXTimur Tabi2007-05-01-0/+3
| | | | | | | | | | | | | Define CFG_DDR_SDRAM_CLK_CNTL for the MPC8349E-mITX and MPC8349E-mITX-GP. This allows ddr->sdram_clk_cntl to be properly initialized. This is necessary on some ITX boards, notably those with a revision 3.1 CPU. Also change spd_sdram() in cpu/mpc83xx/spd_sdram.c to not write anything into ddr->sdram_clk_cntl if CFG_DDR_SDRAM_CLK_CNTL is not defined. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Michael Benedict <MBenedict@twacs.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: Add support for the MPC8349E-mITX-GPTimur Tabi2007-03-02-280/+179
| | | | | | | | Add support for the MPC8349E-mITX-GP, a stripped-down version of the MPC8349E-mITX. Bonus features include support for low-boot (BMS bit in HRCW is 0) for the ITX and a README for the ITX and the ITX-GP. Signed-off-by: Timur Tabi <timur@freescale.com>
* Code cleanup.Wolfgang Denk2006-11-30-72/+72
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* mpc83xx: Update 83xx to use fsl_i2c.cTimur Tabi2006-11-03-16/+33
| | | | | | | | Update the 83xx tree to use I2C support in drivers/fsl_i2c.c. Delete cpu/mpc83xx/i2c.c, include/asm-ppc/i2c.h, and all references to those files. Added multiple I2C bus support to fsl_i2c.c. Signed-off-by: Timur Tabi <timur@freescale.com>
* mpc83xx: Replace CFG_IMMRBAR with CFG_IMMRTimur Tabi2006-11-03-5/+5
| | | | | | | Replace all instances of CFG_IMMRBAR with CFG_IMMR, so that the 83xx tree matches the other 8xxx trees. Signed-off-by: Timur Tabi <timur@freescale.com>
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