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path: root/include/configs/MPC8349EMDS.h
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* Multi-bus I2C implementation of MPC834xBen Warren2006-11-03-2/+4
| | | | | | | | | | | | | | | | | | | | | Hello, Attached is a patch implementing multiple I2C buses on the MPC834x CPU family and the MPC8349EMDS board in particular. This patch requires Patch 1 (Add support for multiple I2C buses). Testing was performed on a 533MHz board. /*** Note: This patch replaces ticket DNX#2006083042000027 ***/ Signed-off-by: Ben Warren <bwarren@qstreams.com> CHANGELOG: Implemented driver-level code to support two I2C buses on the MPC834x CPU family and the MPC8349EMDS board. Available I2C bus speeds are 50kHz, 100kHz and 400kHz on each bus. regards, Ben
* Minor cleanup.Wolfgang Denk2006-05-10-1/+1
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* Merged MPC8349ADS and MPC8349EMDS ports into MPC8349EMDS port:Kumar Gala2006-04-20-47/+47
| | | | | | | | | - Removed MPC8349ADS port - Added PCI support to MPC8349ADS - reworked memory map to allow mapping of all regions with BATs Patch by Kumar Gala 20 Apr 2006 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Some code cleanupWolfgang Denk2006-04-16-2/+2
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* Support for DDR with 32-data path. Addotional notes on injectingRafal Jaworowski2006-03-16-14/+33
| | | | multiple-bit errors.
* Add command for handling DDR ECC registers on MPC8349EE MDS board.Marian Balakowicz2006-03-16-0/+1
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* Add initial support for MPC8349E MDS board.Marian Balakowicz2006-03-14-0/+696