| Commit message (Collapse) | Author | Age | Lines |
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Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
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This is an API for external (standalone) applications running on top of
U-Boot, and is meant to be more extensible and robust than the existing
jumptable mechanism. It is similar to UNIX syscall approach. See api/README
for more details.
Included is the demo application using this new framework (api_examples).
Please note this is still an experimental feature, and is turned off by
default.
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
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The newly introduced API (routines related to env vars) will need to call
it.
Signed-off-by: Rafal Zabdyr <armo@semihalf.com>
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Add new function readline_into_buffer() that allows the
output of readline to be put into a pointer to char buffer.
This refactoring allows other functions besides the
main command loop to also use the same input mechanism.
Signed-off-by: James Yang <James.Yang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
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Signed-off-by: Martin Krause <martin.krause@tqs.de>
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The MPC8572 introduces the concept of an asynchronous DDR clock with
regards to the platform clock.
Introduce get_ddr_freq() to report the DDR freq regardless of sync/async
mode.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Conflicts:
drivers/rtc/Makefile
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This reverts commit 3649cd99ba815b6601868735765602f00ef3692b.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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This reverts commit 6f7576b20ecf0d040c3ac3b032b5cbc860e38a90.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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This reverts commit a85dd254c0577fca13627c46e93fc2ad4c4f1f00.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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This reverts commit f3a52fe05923935db86985daf9438e2f70ac39aa.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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This reverts commit 5af61b2f4b838a05f79be274f3e5a66edd2d9c96.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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This reverts commit 057004f4a4863554d56cc56268bfa7c7d9738e27.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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This reverts commit 8d17979d0359492a822a0a409d26e3a3549b4cd4.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Till now the UTL registers on 405EX were not initialized but left with
their default values. This patch new initializes some of the UTL
registers on 405EX.
Signed-off-by: Stefan Roese <sr@denx.de>
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This patch moves some common 4xx macros and the PPC405_SYS_INFO/
PPC440_SYS_INFO structure into the common ppc4xx.h header.
Lot's of other macros are good candidates to be consolidated this way
in the future.
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
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- correct configuration space mapping
- correct bus numbering
- better access to config space
Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the
first device on the first bus. We now allow to configure up to 16 buses;
also, scanning for devices behind the PCIe-PCIe bridge is supported, so
peripheral devices farther in hierarchy can be identified.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
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to get rid of a *lot* of compiler warnings.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
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also adds common prototypes to include/common.h.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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83xx processor family has many reset sources, such as
power on reset, software hard reset, software soft reset,
JTAG, bus monitor, software watchdog, check stop reset,
external hard reset, external software reset.
sometimes, to figure out the fault of system, we need to
know the cause of reset early before the prompt of
u-boot present.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Add support for the following DaVinci boards:
- DV_EVM
- SCHMOOGIE
- SONATA
Changes:
- Split into separate board directories
- Removed changes to MTD_DEBUG (or whatever it's called)
- New CONFIG_CMD party line followed
- Some cosmetic fixes, cleanup etc.
- Patches against the latest U-Boot tree as of now.
- Fixed CONFIG_CMD_NET in net files.
- Fixed CONFIG_CMD_EEPROM for schmoogie.
- Made sure it compiles and works (forceenv() link problem) on SCHMOOGIE and
DV_EVM. Can't check if it works on SONATA, don't have a board any more,
but it at least compiles.
Here is an excerpt from session log on SCHMOOGIE...
U-Boot 1.2.0-g6c33c785-dirty (Aug 7 2007 - 13:07:17)
DRAM: 128 MB
NAND: 128 MiB
In: serial
Out: serial
Err: serial
ARM Clock : 297MHz
DDR Clock : 162MHz
ETH PHY : DP83848 @ 0x01
U-Boot > iprobe
Valid chip addresses: 1B 38 3A 3D 3F 50 5D 6F
U-Boot > ping 192.168.253.10
host 192.168.253.10 is alive
U-Boot >
Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Zach Sadecki <Zach.Sadecki@ripcode.com>
Acked-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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The following MPC5121e subsystems are supported:
- low-level CPU init
- NOR Boot Flash (common CFI driver)
- DDR SDRAM
- FEC
- I2C
- Watchdog
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Signed-off-by: Jan Wrobel <wrr@semihalf.com>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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This patch removes the CFG_PCI_PRE_INIT option completely, since
it's not needed anymore with the patch from Matthias Fuchs with
the "weak" pci_pre_init() implementation.
Signed-off-by: Stefan Roese <sr@denx.de>
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and fix CPU: to align with Board: display text.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Printing a buffer is a darn useful thing. Move the buffer print code
into print_buffer() in lib_generic/
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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at least on G2 cores.
This fixes get_ram_size() problems on MPC5200 Rev. B boards.
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The 834x rev1.x silicon has one CPU5 errata.
The issue is when the data cache locked with
HID0[DLOCK], the dcbz instruction looks like no-op inst.
The right behavior of the data cache is when the data cache
Locked with HID0[DLOCK], the dcbz instruction allocates
new tags in cache.
The 834x rev3.0 and later and 8360 have not this bug inside.
So, when 834x rev3.0/8360 are working with ECC, the dcbz
instruction will corrupt the stack in cache, the processor will
checkstop reset.
However, the 834x rev1.x can work with ECC with these code,
because the sillicon has this cache bug. The dcbz will not
corrupt the stack in cache.
Really, it is the fault code running on fault sillicon.
This patch fix the incorrect dcbz operation. Instead of
CPU FP writing to initialise the ECC.
CHANGELOG:
* Fix the incorrect dcbz operation instead of CPU FP
writing to initialise the ECC memory. Otherwise, it
will corrupt the stack in cache, The processor will checkstop
reset.
Signed-off-by: Dave Liu <daveliu@freescale.com>
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