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* 85xx: Remove cache config from configs.hKumar Gala2008-01-09-0/+4
| | | | | | | | | Either use the standard defines in asm/cache.h or grab the information at runtime from the L1CFG SPR. Also, minor cleanup in cache.h to make the code a bit more readable. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge commit 'wd/master'Jon Loeliger2008-01-03-0/+9
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| * ppc4xx: Define CONFIG_BOOKE for all PPC440 based processorsEugene O'Brien2007-10-31-0/+5
| | | | | | | | | | | | | | | | CONFIG_BOOKE must be defined for PPC440 processors so that the proper SPR number is used to access system registers. Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Add PPC405EX supportStefan Roese2007-10-31-0/+4
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | Initial mpc8610hpcd cpu/, README and include/ files.Jon Loeliger2007-10-17-0/+1
|/ | | | | | | Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Mahesh Jade <mahesh.jade@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* 85xx start.S cleanup and exception supportAndy Fleming2007-08-14-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | From: Ed Swarthout <Ed.Swarthout@freescale.com> Support external interrupts from platform to eliminate system hangs. Define CONFIG_INTERRUPTS board configure option to enable. Enable ecm, ddr, lbc, and pci/pcie error interrupts in PIC. Remove extra cpu initialization redundant with hardware initialization. Whitespace cleanup. Define and use _START_OFFSET consistent with other processors using ppc_asm.tmpl Move additional code from .text to boot page to make room for exception vectors at start of image. Handle Machine Check, External and Critical exceptions. Fix e500 machine check error determination in traps.c TEXT_BASE can now be 0xfffc_0000 - which cuts binary image in half. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
* fsl_pci_init cleanup.Ed Swarthout2007-08-10-1/+1
| | | | | | | | | | Do not enable normal errors created during probe (master abort, perr, and pcie Invalid Configuration access). Add CONFIG_PCI_NOSCAN board option to prevent bus scan. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
* cpu/86xx fixes.Jon Loeliger2007-08-10-1/+2
| | | | | | | | | | | | | | Remove rev 1 fixes. Always set PICGCR_MODE. Enable machine check and provide board config option to set and handle SoC error interrupts. Include MSSSR0 in error message. Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* [PPC] Remove unused MSR_USER definitionRafal Jaworowski2007-07-27-1/+0
| | | | Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
* Fix breakage of 8xx boards from recent commit.Rafal Jaworowski2007-07-19-0/+6
| | | | | | | This patch fixes the negative consequences for 8xx of the recent "ppc4xx: Clean up 440 exceptions handling" commit. Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
* Coding stylke cleanup; rebuild CHANGELOGWolfgang Denk2007-06-22-23/+23
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* ppc4xx: Clean up 440 exceptions handlingGrzegorz Bernacki2007-06-15-1/+14
| | | | | | | | | | | | | | | | | | | | | | - Introduced dedicated switches for building 440 and 405 images required for 440-specific machine instructions like 'rfmci' etc. - Exception vectors moved to the proper location (_start moved away from the critical exception handler space, which it occupied) - CriticalInput now serviced (with default handler) - MachineCheck properly serviced (added a dedicated handler and return subroutine) - Overall cleanup of exceptions declared with STD_EXCEPTION macro (unused, unhandled and those not relevant for 4xx were eliminated) - Eliminated Linux leftovers, removed dead code Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Signed-off-by: Rafal Jaworowski <raj@semihalf.com> Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Use PVR to distinguish MPC5200B from MPC5200 in boot messageGrzegorz Wianecki2007-05-05-2/+6
| | | | | | | | | | MPC5200B systems are incorrectly reported as MPC5200 in U-Boot start-up message. Use PVR to distinguish between the two variants, and print proper CPU information. Signed-off-by: Grzegorz Wianecki <grzegorz.wianecki@gmail.com> Signed-off-by: Bartlomiej Sieka <tur@semihalf.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* Add support for the 8568 MDS boardAndy Fleming2007-05-02-0/+1
| | | | | | | | | This included some changes to common files: * Add 8568 processor SVR to various places * Add support for setting the qe bus-frequency value in the dts * Add the 8568MDS target to the Makefile Signed-off-by: Andy Fleming <afleming@freescale.com>
* Enable 8544 supportAndy Fleming2007-04-23-2/+9
| | | | | | | | | * Add support to the Makefile * Add 8544 configuration support to the tsec driver * Add 8544 SVR numbers to processor.h Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* [PATCH] Add AMCC PPC405EZ supportStefan Roese2007-03-21-0/+9
| | | | | | | | | | This patch adds support for the new AMCC 405EZ PPC. It is in preparation for the AMCC Acadia board support. Please note that this Acadia/405EZ support is still in a beta stage. Still lot's of cleanup needed but we need a preliminary release now. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Update 440EPx/440GRx cpu detectionStefan Roese2007-01-31-2/+2
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Update 440SP(e) cpu revisionsStefan Roese2007-01-13-5/+8
| | | | | | Also display enabled/disabled RAID 6 support for 440SP/440SPe PPC's. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] PPC4xx: 440SP Rev. C detection addedStefan Roese2006-11-28-0/+1
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'master' of http://www.denx.de/git/u-bootJon Loeliger2006-09-19-0/+4
|\ | | | | | | | | | | Conflicts: board/stxxtc/Makefile
| * Add support for AMCC Sequoia PPC440EPx eval boardStefan Roese2006-09-07-0/+4
| | | | | | | | | | | | | | | | | | | | | | - Add support for PPC440EPx & PPC440GRx - Add support for PPC440EP(x)/GR(x) NAND controller in cpu/ppc4xx directory - Add NAND boot functionality for Sequoia board, please see doc/README.nand-boot-ppc440 for details - This Sequoia NAND image doesn't support environment in NAND for now. This will be added in a short while. Patch by Stefan Roese, 07 Sep 2006
* | Merge branch 'mpc86xx'Jon Loeliger2006-09-14-2/+3
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| * | Handle 86xx SVR values according to the new Reference Manual.Jon Loeliger2006-09-14-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | Both 8641 and 8641D have SVR == 0x8090, and are distinguished by the byte in bits 16-23 instead. Thanks to Jason Jin for noticing. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* | | Merge branch 'mpc86xx'Jon Loeliger2006-08-22-5/+5
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| * | Cleanup more poorly introduced whitespace.Jon Loeliger2006-08-22-5/+5
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* | | Merge branch 'wd'Jon Loeliger2006-08-09-0/+2
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| * | Cleanup config file and bootup output for Yucca board.Marian Balakowicz2006-07-03-1/+1
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| * | Merge: Add support for AMCC 440SPe CPU based eval board (Yucca).Marian Balakowicz2006-06-30-0/+2
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| | * | Add support for AMCC 440SPe CPU based eval board (Yucca).Marian Balakowicz2006-06-30-0/+2
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* | | | Merge branch 'master' of http://www.denx.de/git/u-bootJon Loeliger2006-06-07-0/+2
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| * | Add support for AMCC 440EP Rev C and 440GR Rev BStefan Roese2006-05-10-0/+2
| |/ | | | | | | Patch by John Otken, 08 May 2006
* | Initial support for MPC8641 HPCN board.Jon Loeliger2006-04-26-2/+16
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* Add support for AMCC 440SP, add support for AMCC Luan 440SP eval board.Stefan Roese2005-11-29-0/+2
| | | | Patch by John Otken, 23 Nov 2005
* Correct PPC Timebase register definitions (SPRN_TBRL...)Stefan Roese2005-11-07-4/+4
| | | | Patch by Stefan Roese, 07 Nov 2005
* Add support for Ocotea pass 3 with 440GX Rev. FStefan Roese2005-11-01-0/+1
| | | | Patch by Stefan Roese, 01 Nov 2005
* Fix 440GR to print correct cpu revisionStefan Roese2005-10-04-1/+2
| | | | Patch by Stefan Roese, 4 Oct 2005
* Cleanup (PPC4xx is AMCC now)Wolfgang Denk2005-09-23-2/+2
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* Merge with rsync://git-user@source.denx.net/git/u-boot.gitJon Loeliger2005-08-02-0/+2
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| * Add support for AMCC PPC440EP/GR eval boards Yosemite and Yellowstone.Stefan Roese2005-08-01-0/+2
| | | | | | | | Patch by Steven Blakeslee, 27 Jul 2005
* | * Patch by Eran LibertyEran Liberty2005-07-28-3/+8
| | | | | | | | Add support for the Freescale MPC8349ADS board.
* | * Patch by Jon Loeliger, 2005-05-05Jon Loeliger2005-07-25-0/+4
|/ | | | | | | | Implemented support for MPC8548CDS board. Added DDR II support based on SPD values for MPC85xx boards. This roll-up patch also includes bugfies for the previously published patches: DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
* Add PPC440GX Revision Cstroese2005-04-07-0/+1
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* * Patch by Yusdi Santoso, 22 Oct 2004:wdenk2005-04-03-0/+3
| | | | | | | | - Add support for HIDDEN_DRAGON board - fix endianess problem in driver/rtl1839.c * Patch by Allen Curtis, 21 Oct 2004: support multiple serial ports
* * Patch by Gridish Shlomi, 30 Aug 2004:wdenk2004-10-10-0/+1
| | | | | | | | | | | | | | | | | - Add support to revA version of PQ27 and PQ27E. - Reverted MPC8260ADS baudrate back to original 115200 * Patch by Hojin, 17 Sep 2004: Fix typo in cfi_flash.c * Patch by Mark Jonas, 09 September 2004: mtest's data line test (with CFG_ALT_MEMTEST set) returned a wrong error message * Patch by Mark Jonas, 31 August 2004: Added option CFG_XLB_PIPELINING to enable XLB pipelining. This improves FTP performance for MPC5200 systems. Enabled for IceCube by default.
* Patch by Jon Loeliger, 17 June 2004:wdenk2004-07-09-3/+38
| | | | | | | | Completion of the 8540ADS/8560ADS updates: Fix some PCI and Rapid I/O memory maps, Initialize both TSEC 1 and 2, Initialize SDRAM Update MAINTAINER for 85xx boards and README.mpc85xxads
* * Patch by Mark Jonas, 08 June 2004:wdenk2004-06-09-0/+19
| | | | | | | | - Make MPC5200 boards evaluate the SVR to print processor name and version in checkcpu() (cpu/mpc5xxx/cpu.c). * Patch by Kai-Uwe Bloem, 06 May 2004: Fix endianess problem in cramfs code
* * Patch by Travis Sawyer, 09 Feb 2004:wdenk2004-02-22-468/+470
| | | | | | | | | | | | | | | | | | | | | | | | | | | o 440GX: - Fix PCI Indirect access for type 1 config cycles with ppc440. - Add phymode for 440 enet - fix pci pre init o XPedite1K: - Change board_pre_init to board_early_init_f - Add user flash to bus controller setup - Fix pci pre init - Fix is_pci_host to check GPIO for monarch bit - Force xpedite1k to pci conventional mode (via #define option) * Patch by Brad Kemp, 4 Feb 2004: - handle the machine check that is generated during the PCI scans on 82xx processors. - define the registers used in the IMMR by the PCI subsystem. * Patch by Pierre Aubert, 03 Feb 2004: cpu/mpc5xxx/start.S: copy MBAR into SPR311 * Patch by Jeff Angielski, 03 Feb 2004: Fix copy & paste error in cpu/mpc8260/pci.c * Patch by Reinhard Meyer, 24 Jan 2004: Fix typo in cpu/mpc5xxx/pci_mpc5200.c
* Patch by Travis Sawyer, 30 Dec 2003:wdenk2004-02-06-0/+2
| | | | | | | Add support for IBM PPC440GX. Multiple EMAC Ethernet devices, select MDI port based on enabled EMAC device. Add support for XES Inc <http://www.xes-inc.com> XPedite1000 440GX base PrPMC board.
* * Patch by Nicolas Lacressonnière, 12 Nov 2003:wdenk2003-12-06-0/+1
| | | | | | | | | | | | | | update for for Atmel AT91RM9200DK development kit: - support for environment variables in DataFlash - Atmel DataFlash AT45DB1282 support * Patch by Jeff Carr, 11 Nov 2003: add support for new version of 8270 processors * Patches by George G. Davis, 05 Nov 2003: - only pass the ARM linux initrd tag to the kernel when an initrd is actually present - update omap1510inn configuration file
* * Patches by Xianghua Xiao, 15 Oct 2003:wdenk2003-10-15-2/+200
| | | | | | | | - Added Motorola CPU 8540/8560 support (cpu/85xx) - Added Motorola MPC8540ADS board support (board/mpc8540ads) - Added Motorola MPC8560ADS board support (board/mpc8560ads) * Minor code cleanup
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