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path: root/include/asm-ppc/immap_86xx.h
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* 86xx: Rename ccsr_ddr's sdram_mode_1, sdram_cfg_1 fieldsPeter Tyser2009-07-22-2/+2
| | | | | | | | Rename sdram_mode_1 to sdram_mode and sdram_cfg_1 to sdram_cfg to match the 86xx user's manual and other Freescale architectures Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl/85xx, 86xx: Sync up DMA codePeter Tyser2009-06-12-0/+2
| | | | | | | | | | | | | | | | | | | | | The following changes were made to sync up the DMA code between the 85xx and 86xx architectures which will make it easier to break out common 8xxx DMA code: 85xx: - Don't set STRANSINT and SPCIORDER fields in SATR register. These bits only have an affect when the SBPATMU bit is set. - Write 0xffffffff instead of 0xfffffff to clear errors in the DMA status register. We may as well clear all 32 bits of the register... 86xx: - Add CONFIG_SYS_MPC86xx_DMA_ADDR define to address DMA registers - Add clearing of errors in the DMA status register when initializing the controller - Clear the channel start bit in the DMA mode register after a transfer Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl: Create common fsl_dma.h for 85xx and 86xx cpusPeter Tyser2009-06-12-73/+3
| | | | | | | | Break out DMA structures for the Freescale MPC85xx and MPC86xx cpus to reduce a large amount of code duplication Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 86xx: Update Global Utilities structurePeter Tyser2009-02-16-8/+21
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-4/+4
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Feed the watchdog in u-boot for 8610 board.Jason Jin2008-07-07-1/+15
| | | | | | | | | The watchdog on 8610 board is enabled by setting sw[6] to on. Once enabled, the watchdog can not be disabled by software. So feed the dog in u-boot is necessary for normal operation. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
* Big white-space cleanup.Wolfgang Denk2008-05-21-3/+3
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* 85xx/86xx: Rename ext_refrec to timing_cfg_3 to match docsKumar Gala2008-04-29-1/+1
| | | | | | | All the 85xx and 86xx UM describe the register as timing_cfg_3 not as ext_refrec. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx/86xx: Rename DDR init address and init extended address registerKumar Gala2008-04-29-1/+1
| | | | | | | Rename init_addr and init_ext_addr to match the docs between 85xx and 86xx. Both now use 'init_addr' and 'init_ext_addr'. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 86xx: Fix GUR PCI config registers properly.Jon Loeliger2008-02-20-2/+8
| | | | | | | | | | | | | | Back in commit 975a083a5ef785c414b35f9c5b8ae25b26b41524 where I tried to "8610HPCD: Fix typos in two PCI setup registers", I botched it due to not realizing that 8610 and 8641 had different Global Utility Register defintions, one of which was like 85xx, and the other wasn't. Correct this problem by introducing two symbols, one for each 86xx SoC, but neither of which is named anything like 85xx. My bad. Lovely Wednesday with git bisect. You know. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* 8610HPCD: Fix typos in two PCI setup registers.Jon Loeliger2008-02-19-2/+0
| | | | | | | | | The two symbols MPC86xx_PORDEVSR_IO_SEL and MPC86xx_PORBMSR_HA were erroneously present as 85xx names and values, leftover from the clone wars. Fix this by removing the 85xx cruft from the 86xx codebase. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Add CFG_MPC86xx_DDR_ADDR and CFG_MPC86xx_DDR2_ADDR symbolsJon Loeliger2008-02-13-0/+5
| | | | | | These replace direct structure references for IMMR sections. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* cpu/86xx fixes.Jon Loeliger2007-08-10-4/+12
| | | | | | | | | | | | | | Remove rev 1 fixes. Always set PICGCR_MODE. Enable machine check and provide board config option to set and handle SoC error interrupts. Include MSSSR0 in error message. Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Set Rev 2.x 86xx PIC in mixed mode.Haiying Wang2007-03-22-0/+2
| | | | | | | | | Prevent false interrupt from hanging Linux as MSR[EE] is set to enable interrupts by changing the PIC out of the default pass through mode into mixed mode. Signed-off-by: Haiying Wang <haiying.wang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Use generic I2C register block on 85xx and 86xx.Jon Loeliger2006-10-20-45/+4
| | | | | | | Replace private IMMAP I2C structures with generic reg block and allow 86xx to have multiple I2C device busses. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Fix whitespace issues.Jon Loeliger2006-10-10-233/+233
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* Enable PCIE1 for MPC8641HPCN boardJin Zhengxiong-R641882006-06-27-30/+32
| | | | Signed-off-by: Jason Jin <Jason.jin@freescale.com>
* Update 86xx address map and LAWBARs.Jon Loeliger2006-05-19-2/+2
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* Initial support for MPC8641 HPCN board.Jon Loeliger2006-04-26-0/+1362
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