summaryrefslogtreecommitdiff
path: root/include/asm-ppc/immap_86xx.h
Commit message (Collapse)AuthorAgeLines
* cpu/86xx fixes.Jon Loeliger2007-08-10-4/+12
| | | | | | | | | | | | | | Remove rev 1 fixes. Always set PICGCR_MODE. Enable machine check and provide board config option to set and handle SoC error interrupts. Include MSSSR0 in error message. Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Set Rev 2.x 86xx PIC in mixed mode.Haiying Wang2007-03-22-0/+2
| | | | | | | | | Prevent false interrupt from hanging Linux as MSR[EE] is set to enable interrupts by changing the PIC out of the default pass through mode into mixed mode. Signed-off-by: Haiying Wang <haiying.wang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Use generic I2C register block on 85xx and 86xx.Jon Loeliger2006-10-20-45/+4
| | | | | | | Replace private IMMAP I2C structures with generic reg block and allow 86xx to have multiple I2C device busses. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Fix whitespace issues.Jon Loeliger2006-10-10-233/+233
|
* Enable PCIE1 for MPC8641HPCN boardJin Zhengxiong-R641882006-06-27-30/+32
| | | | Signed-off-by: Jason Jin <Jason.jin@freescale.com>
* Update 86xx address map and LAWBARs.Jon Loeliger2006-05-19-2/+2
|
* Initial support for MPC8641 HPCN board.Jon Loeliger2006-04-26-0/+1362