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* 85xx: Add support for P2020RDB boardPoonam Aggrwal2009-08-28-1/+1
| | | | | | | | | | | | | The code base adds P1 & P2 RDB platforms support. The folder and file names can cater to future SOCs of P1/P2 family. P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series. Tested following on P2020RDB: 1. eTSECs 2. DDR, NAND, NOR, I2C. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xxPoonam Aggrwal2009-08-28-0/+1
| | | | | | | | | | | | | The number of CPUs are getting detected dynamically by checking the processor SVR value. Also removed CONFIG_NUM_CPUS references from all the platforms with 85xx/86xx processors. This can help to use the same u-boot image across the platforms. Also revamped and corrected few Freescale Copyright messages. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]xPeter Tyser2009-06-12-6/+6
| | | | | | | | Use the standard lowercase "x" capitalization that other Freescale architectures use for CPU defines to prevent confusion and errors Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* 83xx: Replace CONFIG_MPC83XX with CONFIG_MPC83xxPeter Tyser2009-06-12-3/+3
| | | | | | | | Use the standard lowercase "xx" capitalization that other Freescale architectures use for CPU defines to prevent confusion and errors Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: Add support for MPC83xx PCI-E controllersAnton Vorontsov2009-01-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for MPC83xx PCI-E controllers in Root Complex mode. The patch is based on Tony Li and Dave Liu work[1]. Though unlike the original patch, by default we don't register PCI-E buses for use in U-Boot, we only configure the controllers for future use in other OSes (Linux). This is done because we don't have enough of spare BATs to map all the PCI-E regions. To actually use PCI-E in U-Boot, users should explicitly define CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And only then U-Boot will able to access PCI-E, but at the cost of disabled address translation. [1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html Signed-off-by: Tony Li <tony.li@freescale.com> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc8[56]xx: Put localbus clock in sysinfo and gdTrent Piepho2008-12-19-0/+3
| | | | | | | | | | | | | | | | | | | | | | | Currently MPC85xx and MPC86xx boards just calculate the localbus frequency and print it out, but don't save it. This changes where its calculated and stored to be more consistent with the CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock. The localbus frequency is added to sysinfo and calculated when sysinfo is set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are. get_clocks() copies the frequency into the global data, as the other frequencies are, into a new field that is only enabled for MPC85xx and MPC86xx. checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency from sysinfo, like the other frequencies, instead of calculating it on the spot. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-3/+3
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Allow console input to be disabledMark Jackson2008-09-06-0/+1
| | | | | | | | | Added new CONFIG_DISABLE_CONSOLE define and GD_FLG_DISABLE_CONSOLE. When CONFIG_DISABLE_CONSOLE is defined, setting GD_FLG_DISABLE_CONSOLE disables all console input and output. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
* mpc83xx: Store and display Arbiter Event Register valuesNick Spence2008-09-03-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Record the Arbiter Event Register values and optionally display them. The Arbiter Event Register can record the type and effective address of an arbiter error, even through an HRESET. This patch stores the values in the global data structure. Display of the Arbiter Event registers immediately after the RSR value can be enabled with defines. The Arbiter values will only be displayed if an arbiter event has occured since the last Power On Reset, and either of the following defines exist: #define CONFIG_DISPLAY_AER_BRIEF - display only the arbiter address and and type register values #define CONFIG_DISPLAY_AER_FULL - display and interpret the arbiter event register values Address Only transactions are one of the trapped events that can register as an arbiter event. They occur with some cache manipulation instructions if the HID0_ABE (Address Broadcast Enable) is set and the memory region has the MEMORY_COHERENCE WIMG bit set. Setting: #define CONFIG_MASK_AER_AO - prevents the arbiter from recording address only events, so that it can still capture other real problems. Signed-off-by: Nick Spence <nick.spence@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc85xx: Add support for the MPC8536Kumar Gala2008-08-27-3/+3
| | | | | | | | | | | The MPC8536 Adds SDHC and SATA controllers to the PQ3 family. We also have SERDES init code for the 8536. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Dejan Minic <minic@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com>
* Fix merge problemsStefan Roese2008-08-06-0/+3
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* Change bd/gd memsize/ram_size to be phys_size_t.Becky Bruce2008-06-12-1/+1
| | | | | | | | | | Currently, both are defined as an unsigned long, but should be phys_size_t. This should result in no real change, since phys_size_t is currently an unsigned long for all the default configs. Also add print_lnum to cmd_bdinfo to deal with the potentially wider memsize. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* FSL LAW: Keep track of LAW allocationsKumar Gala2008-06-11-0/+3
| | | | | | | | | | | | | | | Make it so we keep track of which LAWs have allocated and provide a function (set_next_law) which can allocate a LAW for us if one is free. In the future we will move to doing more "dynamic" LAW allocation since the majority of users dont really care about what LAW number they are at. Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
* POST: replace the LOGBUFF_INITIALIZED flag in gd->post_log_word (1 << 31) ↵Yuri Tikhonov2008-05-20-0/+1
| | | | | | | | | | | | with the GD_FLG_LOGINIT flag in gd->flags. This way we become able to utilize the full post_log_word for POST activities (overwise, POST ECC, which has 0x8000 ID, could be erroneously treated as started in post_output_backlog() even if there was actually no POST ECC run (because of OCM POST failure, for example). Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
* POST: add POST_STOP flagYuri Tikhonov2008-05-20-0/+1
| | | | | | | | Don't run futher tests in case of a test fails that is marked as POST_STOP. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
* Merge branch 'master' of /home/wd/git/u-boot/lwmon5Wolfgang Denk2008-04-25-0/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: common/cmd_bootm.c common/cmd_log.c include/common.h post/board/lwmon5/Makefile post/board/lwmon5/dsp.c post/board/lwmon5/dspic.c post/board/lwmon5/fpga.c post/board/lwmon5/gdc.c post/board/lwmon5/sysmon.c post/board/lwmon5/watchdog.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * lwmon5 watchdog: limit trigger rateYuri Tikhonov2008-04-22-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Limit the rate of h/w watch-dog triggering on the LWMON5 board by the CONFIG_WD_MAX_RATE value. Note that an earlier version of this patch which used microseconds instead of ticks dis not work. The problem was that we used usec2ticks() to convert microseconds into ticks. usec2ticks() uses get_tbclk(), which in turn calls get_sys_info(). It turns out that this function does a lot of prolonged operations (like divisions) which take too much time so we do not trigger the watchdog in time, and it resets the system. Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
| * The patch introduces the CRITICAL feature of POST tests. If the testYuri Tikhonov2008-03-18-0/+1
| | | | | | | | | | | | | | | | | | marked as POST_CRITICAL fails then the alternative, post_critical, boot-command is used. If this command is not defined then U-Boot enters into interactive mode. Signed-off-by: Dmitry Rakhchev <rda@emcraft.com> Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
* | mpc83xx: unreinvent mem_clkKim Phillips2008-03-28-2/+1
| | | | | | | | | | | | | | delete ddr_clk and use mem_clk instead. Rename other ddr_*_clk to mem_*_clk for consistency's sake. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | 85xx: Speed up get_ddr_freq() and get_bus_freq()James Yang2008-03-26-2/+0
| | | | | | | | | | | | | | | | | | | | get_ddr_freq() and get_bus_freq() used get_sys_info() each time they were called. However, get_sys_info() recalculates extraneous information when called each time. Have get_ddr_freq() and get_bus_freq() return memoized values from global_data instead. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 8xx: Update OF support on 8xxBryan O'Donoghue2008-03-25-1/+4
| | | | | | | | | | | | This patch does some shifting around of OF support on 8xx. Signed-off-by: Bryan O'Donoghue <bodonoghue@codehermit.ie>
* | The patch introduces the CRITICAL feature of POST tests. If the test marked ↵Yuri Tikhonov2008-03-18-0/+1
|/ | | | | | | as POST_CRITICAL fails then the alternative, post_critical, boot-command is used. If this command is not defined then U-Boot enters into interactive mode. Signed-off-by: Dmitry Rakhchev <rda@emcraft.com> Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
* MPC5121e ADS PCI support take 3John Rigby2008-03-02-0/+1
| | | | | | | | | | | | | | | | Adds PCI support for MPC5121 Tested with drivers/net/rtl8139.c Support is conditional since PCI on old silicon does not work. ads5121_PCI_config turns on PCI In this version, condition compilation of PCI code has been moved from ifdef in board/ads5121/pci.c to board/ads5121/Makefile as suggested by Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: John Rigby <jrigby@freescale.com>
* 85xx, 86xx: Determine I2C clock frequencies and store in global_dataTimur Tabi2008-02-14-2/+4
| | | | | | | | | Update global_data to define i2c1_clk and i2c2_clk to 85xx and 86xx. Update the get_clocks() function in 85xx and 86xx to determine the I2C clock frequency and store it in gd->i2c1_clk and gd->i2c2_clk. Signed-off-by: Timur Tabi <timur@freescale.com>
* PPC: Use r2 instead of r29 as global data pointerWolfgang Denk2008-02-14-1/+1
| | | | | | | | | | | | R29 was an unlucky choice as with recent toolchains (gcc-4.2.x) gcc will refuse to use load/store multiple insns; instead, it issues a list of simple load/store instructions upon function entry and exit, resulting in bigger code size, which in turn makes the build for a few boards fail. Use r2 instead. Signed-off-by: Wolfgang Denk <wd@denx.de>
* MPC512X: Cleanup bus clock names.Grzegorz Bernacki2008-01-12-1/+1
| | | | Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* mpc83xx: Fix the typo in global data structDave Liu2008-01-10-1/+1
| | | | | | | Fix the typo in global_data.h Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: Add the support of MPC8315E SoCDave Liu2008-01-08-0/+5
| | | | | | | The MPC8315E SoC including e300c3 core and new IP blocks, such as TDM, PCI Express and SATA controller. Signed-off-by: Dave Liu <daveliu@freescale.com>
* mpc83xx: Add the support of MPC837x SoCDave Liu2008-01-08-1/+9
| | | | | | | The MPC837x SoC including e300c4 core and new IP blocks, such as SDHC, PCI Express and SATA controller. Signed-off-by: Dave Liu <daveliu@freescale.com>
* ppc4xx: Correct UART input clock calculation and passing to fdtStefan Roese2007-10-31-0/+3
| | | | | | | | We now use a value in the gd (global data) structure for the UART input frequency, since the PPC4xx_SYS_INFO struct is always rewritten completely in get_sys_info(). Signed-off-by: Stefan Roese <sr@denx.de>
* Merge with /home/stefan/git/u-boot/u-boot-ppc4xxStefan Roese2007-08-21-4/+8
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| * Add support for UEC to 8568Andy Fleming2007-08-14-4/+4
| | | | | | | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * [ADS5121] Support for the ADS5121 boardRafal Jaworowski2007-07-27-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following MPC5121e subsystems are supported: - low-level CPU init - NOR Boot Flash (common CFI driver) - DDR SDRAM - FEC - I2C - Watchdog Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Signed-off-by: Rafal Jaworowski <raj@semihalf.com> Signed-off-by: Jan Wrobel <wrr@semihalf.com>
* | ppc4xx: Add matrix kbd support to lwmon5 board (440EPx based)Stefan Roese2007-08-21-1/+1
|/ | | | | | | | | This patch adds support for the matrix keyboard on the lwmon5 board. Since the implementation in the dsPCI is kind of compatible with the "old" lwmon board, most of the code is copied from the lwmon board directory. Signed-off-by: Stefan Roese <sr@denx.de>
* mpc83xx: Add 831x support to global_data.hScott Wood2007-04-23-2/+4
| | | | Signed-off-by: Scott Wood <scottwood@freescale.com>
* Merge with /home/wd/git/u-boot/custodian/u-boot-74xx-7xxWolfgang Denk2007-04-18-0/+3
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| * Fix the confilcts when merging 'master' into hpc2.roy zang2006-12-01-2/+14
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The conflicts due to a new mpc7448 p3m7448 board is in the main tree. Merge branch 'master' into hpc2 Conflicts: MAKEALL cpu/74xx_7xx/cpu.c cpu/74xx_7xx/cpu_init.c cpu/74xx_7xx/speed.c
| * | General code modification for mpc7448hpc2 board support.roy zang2006-11-02-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Add 7447A and 7448 processor support. 2. Add the following flags. CFG_CONFIG_BUS_CLK : If the 74xx bus frequency can be configured dynamically (such as by switch on board), this flag should be set. CFG_EXCEPTION_AFTER_RELOCATE: If an exception occurs after the u-boot relocates to RAM, this flag should be set. CFG_SERIAL_HANG_IN_EXCEPTION: If the print out function will cause the system hang in exception, this flag should be set. There is a design issue for tsi108/109 pci configure read. When pci scan the slots, if there is no pci card, the tsi108/9 will cause a machine check exception for mpc7448 processor. Signed-off-by: Alexandre Bounine <alexandreb@tundra.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
* | | mpc83xx: Replace CONFIG_MPC8349 and use CONFIG_MPC834X insteadKumar Gala2007-03-02-2/+2
| |/ |/| | | | | | | | | | | | | The code that is ifdef'd with CONFIG_MPC8349 is actually applicable to all MPC834X class processors. Change the protections from CONFIG_MPC8349 to CONFIG_MPC834X so they are more generic. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | mpc83xx: add QE ethernet supportDave Liu2006-11-03-0/+2
| | | | | | | | this patch adds support for the QUICC Engine based UCC gigabit ethernet device.
* | mpc83xx: Add MPC8360EMDS basic board supportDave Liu2006-11-03-2/+12
|/ | | | | Add support for the Freescale MPC8360EMDS board. Includes DDR, DUART, Local Bus, PCI.
* Add PCI support for the TQM834x board.Rafal Jaworowski2005-10-17-0/+1
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* * Patch by Eran LibertyEran Liberty2005-07-28-0/+17
| | | | Add support for the Freescale MPC8349ADS board.
* * Patch by Jon Loeliger, Kumar Gala 2005-02-08Jon Loeliger2005-07-23-2/+2
| | | | | | | | - Convert the CPM2 based functionality to use new CONFIG_CPM2 option rather than a myriad of CONFIG_MPC8560-like variants. Applies to MPC85xx and MPC8260 boards, includes stxgp3 and sbc8560. Eliminates the CONFIG_MPC8560 option entirely. Distributes the new CONFIG_CPM2 option to each 8260 board.
* * Patch by Yusdi Santoso, 22 Oct 2004:wdenk2005-04-03-3/+4
| | | | | | | | - Add support for HIDDEN_DRAGON board - fix endianess problem in driver/rtl1839.c * Patch by Allen Curtis, 21 Oct 2004: support multiple serial ports
* Patch by TsiChung Liew, 23 Sep 2004:wdenk2004-10-28-0/+8
| | | | | - add support for MPC8220 CPU - Add support for Alaska and Yukon boards
* * Patch by Masami Komiy, 22 Feb 2004:wdenk2004-02-24-1/+1
| | | | | | Add support for NFS for file download * Minor code cleanup
* * Patches by Xianghua Xiao, 15 Oct 2003:wdenk2003-10-15-2/+2
| | | | | | | | - Added Motorola CPU 8540/8560 support (cpu/85xx) - Added Motorola MPC8540ADS board support (board/mpc8540ads) - Added Motorola MPC8560ADS board support (board/mpc8560ads) * Minor code cleanup
* Added config option CONFIG_SILENT_CONSOLE. See doc/README.silentwdenk2003-10-10-0/+1
| | | | for more information
* * Add support for PPChameleon Eval Boardwdenk2003-09-02-1/+1
| | | | | | | * Add support for P3G4 board * Fix problem with MGT5100 FEC driver: add "early" MAC address initialization
generated by cgit v1.1 at 2024-12-26 04:22:28 +0000