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* Introduce phys_size_t and move phys_addr_t into asm/types.hKumar Gala2008-04-13-2/+0
| | | | | | | Also add CONFIG_PHYS_64BIT on powerpc to deal with 32-bit ppc's that have larger physical addresses like 44x, 85xx, and 86xx. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* The patch introduces the CRITICAL feature of POST tests. If the test marked ↵Yuri Tikhonov2008-03-18-0/+1
| | | | | | | as POST_CRITICAL fails then the alternative, post_critical, boot-command is used. If this command is not defined then U-Boot enters into interactive mode. Signed-off-by: Dmitry Rakhchev <rda@emcraft.com> Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
* Remove the __STRICT_ANSI__ check from the __u64/__s64 declaration on 32bit ↵Shinya Kuribayashi2008-03-02-3/+3
| | | | | | | | | targets. The previous patch was lacking of i386, microblaze, nios and nios2. This patch tries to fix them. Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
* Introduce map_physmem() and unmap_physmem()Haavard Skinnemoen2007-12-13-0/+26
| | | | | | | | | | | | | | | | map_physmem() returns a virtual address which can be used to access a given physical address without involving the cache. unmap_physmem() should be called when the virtual address returned by map_physmem() is no longer needed. This patch adds a stub implementation which simply returns the physical address cast to a uchar * for all architectures except AVR32, which converts the physical address to an uncached virtual mapping. unmap_physmem() is a no-op on all architectures, but if any architecture needs to do such mappings through the TLB, this is the hook where those TLB entries can be invalidated. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* Implement __raw_{read,write}[bwl] on all architecturesHaavard Skinnemoen2007-12-13-0/+8
| | | | | | | | This adds implementations of __raw_read[bwl] and __raw_write[bwl] to m68k, ppc, nios and nios2. The m68k and ppc implementations were taken from Linux. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [PATCH v3] Add sync to ensure flash_write_cmd is fully finishedHaiying Wang2007-02-21-1/+4
| | | | | | | | | Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command is fully finished. The sync() is defined in each CPU's io.h file. For those CPUs which do not need sync for now, a dummy sync() is defined in their io.h as well. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Nios II - Fix I/O Macros and mini-app stubsScott McNutt2006-06-08-3/+4
| | | | | | | | -Fix asm/io.h macros -Eliminate use of CACHE_BYPASS in cpu code -Eliminate assembler warnings -Fix mini-app stubs and force no small data Patch by Scott McNutt, 08 Jun 2006
* Remove unnnecessary #include <linux/types.h> from include/asm-*/u-boot.hWolfgang Denk2005-11-25-0/+7
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* * Patch by Scott McNutt, 21 Oct 2004:wdenk2005-03-30-3/+56
| | | | | | | | | | | Add support for Nios-II EPCS Controller core. * Patch by Scott McNutt, 20 Oct 2004: Nios-II cleanups: - Add sysid command (Nios-II only). - Locate default exception trampoline at proper offset. - Implement I/O routines (readb, writeb, etc) - Implement do_bootm_linux
* Patches by Scott McNutt, 24 Aug 2004:wdenk2004-10-10-0/+666
- Add support for Altera Nios-II processors. - Add support for Psyent PCI-5441 board. - Add support for Psyent PK1C20 board.