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* avr32: Use board_postclk_init instead of gclk_initHaavard Skinnemoen2008-09-01-1/+0
| | | | | | | | | | | | | | | | | | Replace the avr32-specific gclk_init() board hook with the standard board_postclk_init() hook which is supposed to run at the same point during initialization. Provide a dummy weak alias for boards not implementing this hook. The cost of this is: - 2 bytes for the dummy function (retal 0) - 2 bytes for each unnecessary function call (short rcall) which is a pretty small price to pay for avoiding lots of #ifdef clutter. In this particular case, all boards probably end up slightly smaller because we avoid the conditional checking if the gclk_init symbol is NULL. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Add gclk helper functionsHaavard Skinnemoen2008-09-01-2/+97
| | | | | | | | | | | Add two helper functions for configuring and enabling generic clocks: - gclk_enable_output: Enables output on a GCLKx pin - gclk_set_rate: Configures a gclk to run at a specific rate This should eliminate any reason to go mucking about with PM registers from board code. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: refactor the portmux/gpio codeHaavard Skinnemoen2008-09-01-176/+235
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Separate the portmux configuration functionality from the GPIO pin control API. - Separate the controller-specific code from the chip-specific code. - Allow "ganged" port configuration (multiple pins at once). - Add more flexibility to the "canned" peripheral select functions: - Allow using more than 23 address bits, more chip selects, as well as NAND- and CF-specific pins. - Make the MACB SPEED pin optional, and choose between MII/RMII using a parameter instead of an #ifdef. - Make it possible to use other MMC slots than slot 0, and support different MMC/SDCard data bus widths. - Use more reasonable pull-up defaults; floating pins may consume a lot of power. - Get rid of some custom portmux code from the mimc200 board code. The old gpio/portmux API couldn't really handle its requirements, but the new one can. - Add documentation. The end result is slightly smaller code for all boards. Which isn't really the point, but at least it isn't any larger. This has been verified on ATSTK1002 and ATNGW100. I'd appreciate if the board maintainers could help me test this on their boards. In particular, the mimc200 port has lost a lot of code, so I'm hoping Mark can help me out. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Cc: Mark Jackson <mpfj@mimc.co.uk> Cc: Alex Raimondi <alex.raimondi@miromico.ch> Cc: Julien May <julien.may@miromico.ch> Changes since v1: * Enable pullup on NWAIT * Add missing include to portmux-pio.h * Rename CONFIG_PIO2 -> CONFIG_PORTMUX_PIO to match docs
* avr32: data_bits should reflect the actual number of data bitsHaavard Skinnemoen2008-09-01-2/+2
| | | | | | | | Make the data_bits enum in struct sdram_config reflect the actual number of data bits on the bus, i.e. 16 or 32. Having 0 mean 16 bits and 1 mean 32 bits is just too confusing. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Merge branch 'hammerhead' of git://git.denx.de/u-boot-avr32Haavard Skinnemoen2008-07-30-0/+1
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| * Add support for the hammerhead (AVR32) boardJulien May2008-07-30-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Hammerhead platform is built around a AVR32 32-bit microcontroller from Atmel. It offers versatile peripherals, such as ethernet, usb device, usb host etc. The board also incooperates a power supply and is a Power over Ethernet (PoE) Powered Device (PD). Additonally, a Cyclone III FPGA from Altera is integrated on the board. The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two DDR2 SDRAM interfaces, which will cover even the most exceptional need of memory bandwidth. Together with the onboard video decoder the board is ready for video processing. For more information see: http:///www.miromico.com/hammerhead Signed-off-by: Julien May <mailinglist@miromico.ch> [haavard.skinnemoen@atmel.com: various small fixes and adaptions] Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | Merge branch 'format-warnings' of git://git.denx.de/u-boot-avr32Haavard Skinnemoen2008-07-24-2/+4
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| * | avr32: Fix printf() format warningsHaavard Skinnemoen2008-07-23-2/+4
| |/ | | | | | | Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: asm/io.h needs asm/types.hHaavard Skinnemoen2008-07-23-0/+2
|/ | | | | | | map_physmem() takes a phys_addr_t as parameter. This type is defined in asm/types.h, so we need to include that file. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-avr32Wolfgang Denk2008-07-07-0/+8
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| * avr32: Add GPIO manipulation functionsPeter Ma2008-06-20-0/+8
| | | | | | | | | | | | | | | | Adds GPIO manipulation functions for AVR32 AP7 platform. Signed-off-by: Peter Ma <pma@mediamatech.com> [haavard.skinnemoen@atmel.com: coding style fixup, slight simplification] Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | MMC: Consolidate MMC/SD command definitionsHaavard Skinnemoen2008-06-28-19/+0
|/ | | | | | | | | | | | | | | This moves the MMC and SD Card command definitions from include/asm/arch/mmc.h into include/mmc.h. These definitions are given by the MMC and SD Card standards, not by any particular architecture. There's a lot more room for consolidation in the MMC drivers which I'm hoping to get done eventually, but this patch is a start. Compile-tested for all avr32 boards as well as lpc2292sodimm and lubbock. This should cover all three mmc drivers in the tree. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* atmel_spi: Driver for the Atmel SPI controllerHans-Christian Egtvedt2008-06-03-0/+11
| | | | | | | | | | | | | | | This adds a driver for the SPI controller found on most AT91 and AVR32 chips, implementing the new SPI API. Changed in v4: - Update to new API - Handle zero-length transfers appropriately. The user may send a zero-length SPI transfer with SPI_XFER_END set in order to deactivate the chip select after a series of transfers with chip select active. This is useful e.g. when polling the status register of DataFlash. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* Move definition of container_of() to common.hHaavard Skinnemoen2008-06-03-11/+0
| | | | | | | | | | | AVR32 and AT91SAM9 both have their own identical definitions of container_of() taken from the Linux kernel. Move it to common.h so that all architectures can use it. container_of() is already used by some drivers, and will be used extensively by the new and improved SPI API. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Rework SDRAM initialization codeHaavard Skinnemoen2008-05-27-5/+42
| | | | | | | | | | | | | | This cleans up the SDRAM initialization and related code a bit, and allows faster booting. * Add definitions for EBI and internal SRAM to asm/arch/memory-map.h * Remove memory test from sdram_init() and make caller responsible for verifying the SDRAM and determining its size. * Remove base_address member from struct sdram_config (was sdram_info) * Add data_bits member to struct sdram_config and kill CFG_SDRAM_16BIT * Add support for a common STK1000 hack: 16MB SDRAM instead of 8. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Rename pm_init() as clk_init() and make SoC-specificHaavard Skinnemoen2008-05-27-0/+2
| | | | | | | | pm_init() was always more about clock initialization than anything else. Dealing with PLLs, clock gating and such is also inherently SoC-specific, so move it into a SoC-specific directory. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Clean up the HMATRIX codeHaavard Skinnemoen2008-05-27-232/+192
| | | | | | | | | | | | | Rework the HMATRIX configuration interface so that it becomes easier to configure the HMATRIX for boards with special needs, and add new parts. The HMATRIX header file has been split into a general, chip-independent part with register definitions, etc. and a chip-specific part with SFR bitfield definitions and master/slave identifiers. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Get rid of the .flashprog sectionHaavard Skinnemoen2008-05-27-7/+0
| | | | | | | | | | | | The .flashprog section was only needed back when we were running directly from flash, and it's even more useless on NGW100 since it uses the CFI flash driver which never used this workaround in the first place. Remove it on STK1000 as well, and get rid of all the associated code and annotations. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Use correct condition around macb clock accessorsHaavard Skinnemoen2008-05-27-1/+1
| | | | | | | get_macb_pclk_rate() and get_macb_hclk_rate() should be available when the chip has a MACB controller, not when it has a USART. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Merge branch 'lwmon5' of /home/wd/git/u-boot/projectsWolfgang Denk2008-05-21-0/+2
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| * POST: replace the LOGBUFF_INITIALIZED flag in gd->post_log_word (1 << 31) ↵Yuri Tikhonov2008-05-20-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | with the GD_FLG_LOGINIT flag in gd->flags. This way we become able to utilize the full post_log_word for POST activities (overwise, POST ECC, which has 0x8000 ID, could be erroneously treated as started in post_output_backlog() even if there was actually no POST ECC run (because of OCM POST failure, for example). Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
| * POST: add POST_STOP flagYuri Tikhonov2008-05-20-0/+1
| | | | | | | | | | | | | | | | Don't run futher tests in case of a test fails that is marked as POST_STOP. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
* | Big white-space cleanup.Wolfgang Denk2008-05-21-3/+3
|/ | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Introduce phys_size_t and move phys_addr_t into asm/types.hKumar Gala2008-04-13-2/+3
| | | | | | | Also add CONFIG_PHYS_64BIT on powerpc to deal with 32-bit ppc's that have larger physical addresses like 44x, 85xx, and 86xx. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* The patch introduces the CRITICAL feature of POST tests. If the test marked ↵Yuri Tikhonov2008-03-18-0/+1
| | | | | | | as POST_CRITICAL fails then the alternative, post_critical, boot-command is used. If this command is not defined then U-Boot enters into interactive mode. Signed-off-by: Dmitry Rakhchev <rda@emcraft.com> Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
* Remove the __STRICT_ANSI__ check from the __u64/__s64 declaration on 32bit ↵Shinya Kuribayashi2008-02-23-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | targets. ---------------------------------------------------------------- Olaf Hering [Wed, 17 Oct 2007 06:27:13 +0000 (23:27 -0700)] Remove the __STRICT_ANSI__ check from the __u64/__s64 declaration on 32bit targets. GCC can be made to warn about usage of long long types with ISO C90 (-ansi), but only with -pedantic. You can write this in a way that even then it doesn't cause warnings, namely by: #ifdef __GNUC__ __extension__ typedef __signed__ long long __s64; __extension__ typedef unsigned long long __u64; #endif The __extension__ keyword in front of this switches off any pedantic warnings for this expression. Signed-off-by: Olaf Hering <olh@suse.de> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> ---------------------------------------------------------------- Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
* AVR32: Make SDRAM refresh rate configurableHaavard Skinnemoen2008-02-05-0/+6
| | | | | | | | | | | | | | The existing code assumes the SDRAM row refresh period should always be 15.6 us. This is not always true, and indeed on the ATNGW100, the refresh rate should really be 7.81 us. Add a refresh_period member to struct sdram_info and initialize it properly for both ATSTK1000 and ATNGW100. Out-of-tree boards will panic() until the refresh_period member is updated properly. Big thanks to Gerhard Berghofer for pointing out this issue. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-avr32Wolfgang Denk2007-12-27-0/+50
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| * AVR32: Make some AT32AP700x peripherals optionalHaavard Skinnemoen2007-12-17-0/+50
| | | | | | | | | | | | | | | | | | | | | | Add a chip-features file providing definitions of the form AT32AP700x_CHIP_HAS_<peripheral> to indicate the availability of the given peripheral on the currently selected chip. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * AVR32: Rename at32ap7000 -> at32ap700xHaavard Skinnemoen2007-12-17-0/+0
| | | | | | | | | | | | | | | | | | The SoC-specific code for all the AT32AP700x CPUs is practically identical; the only difference is that some chips have less features than others. By doing this rename, we can add support for the AP7000 derivatives simply by making some features conditional. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | Introduce map_physmem() and unmap_physmem()Haavard Skinnemoen2007-12-13-0/+32
|/ | | | | | | | | | | | | | | | map_physmem() returns a virtual address which can be used to access a given physical address without involving the cache. unmap_physmem() should be called when the virtual address returned by map_physmem() is no longer needed. This patch adds a stub implementation which simply returns the physical address cast to a uchar * for all architectures except AVR32, which converts the physical address to an uncached virtual mapping. unmap_physmem() is a no-op on all architectures, but if any architecture needs to do such mappings through the TLB, this is the hook where those TLB entries can be invalidated. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* AVR32: Change prototype of memsetSemih Hazar2007-08-27-1/+1
| | | | | Signed-off-by: Semih Hazar <semih.hazar@indefia.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* Move 64bit division from avr32 to generic libDirk Behme2007-08-10-39/+0
| | | | | | | | | Move the 64bit division from lib_avr32 to lib_generic. With this, all boards can do_div/__div64_32 if needed, not only avr one. Code is put to lib_generic, so no larger memory footprint if not used. No code modifications. Thanks for proposal by Håvard Skinnemoen. Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
* Merge with /home/wd/git/u-boot/custodian/u-boot-avr32; code cleanup.Wolfgang Denk2007-04-18-193/+426
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| * Atmel MCI driverHaavard Skinnemoen2007-04-14-0/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver for the Atmel MCI controller (MMC interface) for AT32AP CPUs. The AT91 ARM-based CPUs use basically the same hardware, so it should be possible to share this driver, but no effort has been made so far. Hardware documentation can be found in the AT32AP7000 data sheet, which can be downloaded from http://www.atmel.com/dyn/products/datasheets.asp?family_id=682 Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * AVR32: Add clk and gpio infrastructure for mmciHaavard Skinnemoen2007-04-14-0/+5
| | | | | | | | | | | | | | Implement functions for configuring the mmci pins, as well as functions for getting the clock rate of the mmci controller. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * AVR32: Add clk and gpio infrastructure for macb0 and macb1Haavard Skinnemoen2007-04-14-0/+10
| | | | | | | | | | | | | | | | Implement functions for configuring the macb0 and macb1 pins, as well as functions for getting the clock rate of the various busses the macb ethernet controllers are connected to. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * AVR32: Use initdram() instead of board_init_memories()Haavard Skinnemoen2007-04-14-3/+0
| | | | | | | | | | | | | | | | Conform to the "standard" interface and use initdram() instead of board_init_memories() on AVR32. This enables us to get rid of the sdram_size member of the global_data struct as well. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * AVR32: Relocate u-boot to SDRAMHaavard Skinnemoen2007-04-14-0/+1
| | | | | | | | | | | | | | Relocate the u-boot image into SDRAM like everyone else does. This means that we can handle much larger .data and .bss than we used to. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * AVR32: Resource management rewriteHaavard Skinnemoen2007-04-14-152/+272
| | | | | | | | | | | | | | | | | | | | | | | | | | Rewrite the resource management code (i.e. I/O memory, clock gating, gpio) so it doesn't depend on any global state. This is necessary because this code is heavily used before relocation to RAM, so we can't write to any global variables. As an added bonus, this makes u-boot's memory footprint a bit smaller, although some functionality has been left out; all clocks are enabled all the time, and there's no checking for gpio line conflicts. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * AVR32: Clean up memory-map.h for at32ap7000Haavard Skinnemoen2007-04-14-38/+43
|/ | | | | | | | Convert spaces to tabs (must have missed this one last time around), sort the entries by address and group them together by bus connectivity. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [PATCH v3] Add sync to ensure flash_write_cmd is fully finishedHaiying Wang2007-02-21-0/+4
| | | | | | | | | Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command is fully finished. The sync() is defined in each CPU's io.h file. For those CPUs which do not need sync for now, a dummy sync() is defined in their io.h as well. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Add AT32AP CPU and AT32AP7000 SoC supportWolfgang Denk2006-10-24-0/+439
| | | | | | | | | | | | | | | | | | | | | | Patch by Haavard Skinnemoen, 06 Sep 2006 This patch adds support for the AT32AP CPU family and the AT32AP7000 chip, which is the first chip implementing the AVR32 architecture. The AT32AP CPU core is a high-performance implementation featuring a 7-stage pipeline, separate instruction- and data caches, and a MMU. For more information, please see the "AVR32 AP Technical Reference": http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf In addition to this, the AT32AP7000 chip comes with a large set of integrated peripherals, many of which are shared with the AT91 series of ARM-based microcontrollers from Atmel. Full data sheet is available here: http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* Add AVR32 architecture supportWolfgang Denk2006-10-24-0/+1660
Patch by Haavard Skinnemoen, 6 Sep 2006 16:23:02 +0200 This patch adds common infrastructure code for the Atmel AVR32 architecture. See doc/README.AVR32 for details. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
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