| Commit message (Collapse) | Author | Age | Lines | |
|---|---|---|---|---|
| * | [PATCH v3] Add sync to ensure flash_write_cmd is fully finished | Haiying Wang | 2007-02-21 | -0/+4 |
| | | | | | | | | | | Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command is fully finished. The sync() is defined in each CPU's io.h file. For those CPUs which do not need sync for now, a dummy sync() is defined in their io.h as well. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> | |||
| * | Add AT32AP CPU and AT32AP7000 SoC support | Wolfgang Denk | 2006-10-24 | -0/+439 |
| | | | | | | | | | | | | | | | | | | | | | | | Patch by Haavard Skinnemoen, 06 Sep 2006 This patch adds support for the AT32AP CPU family and the AT32AP7000 chip, which is the first chip implementing the AVR32 architecture. The AT32AP CPU core is a high-performance implementation featuring a 7-stage pipeline, separate instruction- and data caches, and a MMU. For more information, please see the "AVR32 AP Technical Reference": http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf In addition to this, the AT32AP7000 chip comes with a large set of integrated peripherals, many of which are shared with the AT91 series of ARM-based microcontrollers from Atmel. Full data sheet is available here: http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> | |||
| * | Add AVR32 architecture support | Wolfgang Denk | 2006-10-24 | -0/+1660 |
| Patch by Haavard Skinnemoen, 6 Sep 2006 16:23:02 +0200 This patch adds common infrastructure code for the Atmel AVR32 architecture. See doc/README.AVR32 for details. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> | ||||
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| U-boot NXP imx6 | git@iatec.biz |
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