| Commit message (Collapse) | Author | Age | Lines | |
|---|---|---|---|---|
| * | AVR32: Make cacheflush cpu-dependent | Olav Morken | 2009-02-23 | -1/+1 |
| | | | | | | | | | | | | The AT32UC3A series of processors doesn't contain any cache, and issuing cache control instructions on those will cause an exception. This commit makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support. Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com> Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com> Signed-off-by: Olav Morken <olavmrk@gmail.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | |||
| * | Add AVR32 architecture support | Wolfgang Denk | 2006-10-24 | -0/+64 |
| Patch by Haavard Skinnemoen, 6 Sep 2006 16:23:02 +0200 This patch adds common infrastructure code for the Atmel AVR32 architecture. See doc/README.AVR32 for details. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> | ||||
 |
index : arm-boot/u-boot-imx.git | |
| U-boot NXP imx6 | git@iatec.biz |
| summaryrefslogtreecommitdiff |