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* ENGR00161133: Add spi-nor support for mx6qTerry Lv2011-11-01-1/+1
| | | | | | Add spi-nor support for mx6q. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00161004 MX6Q Uboot Rename sabreauto to arm2 boardAnish Trivedi2011-10-28-0/+13
| | | | | | | | | Sabreauto is an inaccurate name for the Armadillo2 board that this code is actually meant for. So, replaced "sabreauto" in folder names, file names, configs, and code with "arm2". Created a new machine id for ARM2 board. Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00139221 USDHC Add SDXC UHS-I supportAnish Trivedi2011-10-27-2/+2
| | | | | | | Modified MMC library for UHS-I command sequence Added support to USDHC driver for UHS-I Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00160399 Added support for the MX6Q Sabre-lite boardMahesh Mahadevan2011-10-25-47/+26
| | | | | | Includes support for uSDHC read, write, FEC, SPI-NOR etc. Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
* ENGR00160507 Update the IOMUX implementation for MX6Mahesh Mahadevan2011-10-20-6/+5
| | | | | | | The MX6 code incorrectly uses the Hysteresis bit to decide NO_PAD_CTRL operation Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
* ENGR00156930: Update MX35 DDR2 scriptsTerry Lv2011-10-18-6/+11
| | | | | | | | | | Update MX35 DDR2 scripts for that when enabling 256MB, the CSD1 is not stable. 1. Add CSD1 configs to support 256M RAM. 2. Add mx35 TO2 256M RAM configs. 3. Update DDR init code in lowlevel_init.S for external boot. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00158184 mx53 smd: use highest value for unknown board revision valueWayne Zou2011-09-26-0/+1
| | | | | | mx53 smd: use highest value for unknown board revision value Signed-off-by: Wayne Zou <b36644@freescale.com>
* ENGR00139254: Enable MX6Q Uboot Splash ScreenSandor Yu2011-09-02-31/+48
| | | | | | | | | | | | | | Only support LVDS0 splash screen. Enable splash process: 1.define CONFIG_SPLASH_SCREEN in mx6q_sabreauto.h 2.Config U-boot with followed command:() setenv splashimage '0x30000000' #Set splash position as Center setenv splashpos 'm,m' #Set LVDS via LVDS bridge 0 setenv lvds_num 0 Signed-off-by: Sandor Yu <r01008@freescale.com>
* ENGR00155283: Set dpgdck0_2_en to 0 when freq is lower than 300MHzTerry Lv2011-09-01-5/+8
| | | | | | | | 1. Set dpgdck0_2_en to 0 when required freq is lower than 300Mhz. 2. When dpgdck0_2_en is 0, the formula to calculate output freq will be changed to 2 * freq * []. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00153526 mx53 pcba: add pcba board revB support in ubootXinyu Chen2011-07-27-3/+6
| | | | | | | | | | | | | | | Add new machine type for pcba. Add UART, I2C, SD/MMC, PMIC, DDR initial support. Add MFG tool support. Add support for MC34708 on revB pcba board. Update VDDGP setting on MC34708 PMIC for revB board. Close unused clock, for fastboot it will enable usb_phy usb_oh3 clock by itself, still need to verify this work or not when revB bootup. Signed-off-by: Wayne Zou <b36644@freescale.com> Signed-off-by: Lily Zhang <r58066@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00139206 MX6 USDHC eMMC 4.4 supportAnish Trivedi2011-07-05-2/+2
| | | | | | | | | | | New bit definitions in USDHC. Added is_usdhc variable to fsl_esdhc_cfg to distinguish between ESDHC and USDHC. Enabled DDR mode support in USDHC. Created a config to customize target delay for DDR mode. Modified USDHC pad settings to make DDR mode work for all emmcs at 50 MHz. Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00139198: iMX61 uBoot add ENET supportZeng Zhaoming2011-06-27-63/+67
| | | | | | | | | | | | | | | | Add ENET and AR8031 PHY support to uboot. To make it works on sabreauto, need do following changes: 1. rework phy to output 125M clock from CLK_25M signal, and the 125M clock input to SoC as reference clock to generate RGMII_TXC clock. 2. Enable TXC delay in PHY debug register. 3. set ENET working in RMII mode. 4. set ENET working at 1000M or 100M/10M. 5. set ENET TX fifo to maximum to avoid underrun error. 6. force AR8031 PHY working at 100M Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
* ENGR00144424 MX6: enable uboot for ARM2(SABREAUTO) CPU boardAnson Huang2011-06-24-0/+7650
| | | | | | | | | | | | | Use 528M DDR script Disable L2 cache because rom enable L2 cache when use plug-in Fix usdhc pad settings Remove mac address hardcode Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Richard Zhu <r65037@freescale.com> Signed-off-by: Terry Lv <r65388@freescale.com> Signed-off-by: Anish Trivedi <anish@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00142995 MX50: Enable uSDHC instead of eSDHC for SDR modeAnish Trivedi2011-05-10-0/+1
| | | | | | | | | | | | | | | | | | On SD3 on MX50, there is an option to choose eSDHC or uSDHC controller. By default eSDHC is selected. However, eSDHC shows some borderline timing in SDR mode at 50 MHz, whereas uSDHC shows borderline timing in DDR mode at 50 MHz. Therefore, add a compile time option to uboot for MX50 to select uSDHC in SDR mode or eSDHC in DDR mode on SD3 port. By default the compile time option, CONFIG_MX50_ENABLE_USDHC_SDR, is commented out in the include/configs/mx50_<board>.h file to select eSDHC with DDR mode enabled. Uncomment the define to select uSDHC with only SDR mode enabled. Also increased max frequency supported by ESDHC to 52 MHz instead of 50 MHz. Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00141556: Fix copyright issueTerry Lv2011-04-08-2/+2
| | | | | | | | | | | We're following the following rules: 1. FSL copyright should be added for freescale added and modified files. 2. FSL copyright should go after existing copyrights. 3. For Duplicate FSL copyright, Our copyright will go after that also. 4. FSL copyright should not include personal names as part. 5. For only FSL copyright, "All rights reserved" is not mattered. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00141000 MX50_RDP: add android recovery support.Zhang Jiejing2011-03-23-1/+2
| | | | | | Add android recovery related config and code. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00140824 Android: Enable fastboot support for mx50 rdpSammy He2011-03-21-1/+6
| | | | | | Enable fastboot support for mx50 rdp. Signed-off-by: Sammy He <r62914@freescale.com>
* ENGR00140825: Add mx53 to2.1 chip id recognitionTerry2011-03-20-0/+2
| | | | | | Add mx53 to2.1 chip id recognition. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00139747: Read fuse to distinguish between mx53 revA and revBTerry Lv2011-03-02-0/+7
| | | | | | | | | Read fuse to distinguish between mx53 revA and revB. Now SoC efuse is used for board id. Thus we now check fuse value for board rev and id. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00137894-2 MX53: Add ipu base addr and ipu clockLiu Ying2011-01-13-0/+5
| | | | | | This patch adds ipu base address and ipu clock. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00137894-1 Add imx pwm driver supportLiu Ying2011-01-13-0/+37
| | | | | | | This patch adds imx pwm driver support as a misc device. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00137604: Change PLL4 to 455MHz for mx53Terry Lv2011-01-07-1/+5
| | | | | | | Required by display to set ldb. We need to set PLL4 to 455MHz. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00137497-2 MX53: Add LOCO board supportLily Zhang2010-12-30-2/+2
| | | | | | | | | | | Add MX53 LOCO board support The following functions are tested in the board: - Micro SD boot - MMC/SD read/write. - clk command - fuse command Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00137497-1 Import new mach-type header fileLily Zhang2010-12-30-33/+2387
| | | | | | | | Import new mach-type header file for MX53 LOCO board Signed-off-by: Lily Zhang <r58066@freescale.com> Acked-by: Lily Zhang <r58066@freescale.com>
* ENGR00136075 MX53: Add SMD board supportLily Zhang2010-12-30-0/+20
| | | | | | | | | | | | | | | | | | | | | | | Add MX53 SMD support: - Use DDR3 script for SMD board from Mike Kjar: "Rita_init_LCB_CMOS.inc" - Set the default CPU core frequency as 1GHZ. The following functions are tested on SMD board: - SD/MMC boot, read, write via SDHC1 - eMMC4.4 boot, read, write via SDHC3. - SATA boot, read, write. To support SATA boot via internal clock, please ensure the fuse "SATA_ALT_CLK_REF" was blown. - FEC - UART - clk command - iim command Signed-off-by: Liu Ying <b17645@freescale.com> Signed-off-by: Jason Chen <b02280@freescale.com> Signed-off-by: Terry Lv <r65388@freescale.com> Signed-off-by: Anish Trivedi <anish@freescale.com> Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00137372 MX53: Switch back to use DCD and update DDR scriptsLily Zhang2010-12-28-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. This patch is used to switch back to use DCD for flash header instead of plug-in. This change request is due to the following reasons: 1) U-boot community doesn't accept current plug-in solution when upstreaming. 2) Plug-in isn't supported by MX53 ROM serial download mode. No effective workaround is found now. To use the same code base to support normal U-Boot and MFG tool better, adopt DCD solution firstly. 3) Current MX53 DDR scripts don't exceed the length limitation of DCD. For MX53 TO2.0 EVK/ARM2 board, raise DDR frequency to 400MHZ after VCC and VDDA voltages are raised as 1.3V. Since ARM2 CPU2 board share the same script with EVK, delete ARM2 CPU2 config files. ARM2 CPU2 board can share the same bootloader with EVK. 2. Update MX53 DDR2 scripts for TO1.0/TO2.0 EVK/ARD/ARM2 boards The script "MX53_TO2_DDR2_EVK_ARD.inc" is located under http://compass.freescale.net/livelink/livelink? func=ll&objId=221058910&objAction=browse&viewType=1 This script is published by ATX and FIL team on Dec 16th, 2010 3. Update MX53 ARM2 CPU3 DDR3 script "MX53_TO2_DDR3_CPU3.inc" under the same compass folder Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00134220-1 NAND: fix up the chip select handlingJason Liu2010-12-07-2/+10
| | | | | | | | When the NAND has multi-cs, the chip select other than cs0 is not handled correctly which will lead to NAND not function as expected Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00133437 MX50 Uboot support for TO 1.1.1 precodeAnish Trivedi2010-12-01-0/+3
| | | | | | | Precoding: Update DDR configuration plugin to check SI Rev and change ROM addresses as needed. Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00134098-2 MX53: Add fastboot support for android.Sammy He2010-11-26-1/+4
| | | | | | Add fastboot support for mx53 EVK android. Signed-off-by: Sammy He <r62914@freescale.com>
* ENGR00133551-1 Add freescale usb udc support for i.mx51 platform.Sammy He2010-11-18-0/+4
| | | | | | | Add imx_udc for usb gadget on i.mx51 platform. Signed-off-by: Hu Hui <b29976@freescale.com> Signed-off-by: Sammy He <r62914@freescale.com>
* ENGR00132909 MX53 Uboot: Support for TO2Anish Trivedi2010-11-15-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support new DDR script entitled "Rita_TO2_init_DDR2_CPU2_CMOS_TEST_CAL_v1.inc" for DDR2 boards including MX53 EVK, ARD, and ARM2 CPU2. These new settings did not apply to TO1. Therefore, changed the DCD for these boards to a plugin so that TO1 and TO2 can both be supported using conditional execution of new DDR settings. During bootup on TO2, DDR frequency is required to be below 400 MHz. Therefore, BOOT_CFG2[4] must be set to enable DDR at 333 MHz in ROM on all boards. Uboot determines silicon version and for TO2 boosts the VCC and VDDA voltages to 1.3V, after which the DDR frequency is also increased to 400 MHz. This requirement meant that uboot does not calibrate PLL2 anymore until the voltage is increased. Removed the calibration from lowlevel_init.S and from all mx53 include/configs files. Also required that during config_periph_clk(), only CBCMR register is touched to set source PLL. Other changes to CBCDR were removed. Switching to PLL2 bypass clk during reprogram was also removed. All these changes are required to increase DDR frequency to 400 MHz. DDR2 CPU2 board with TO1 requires the following hw cfgs: JP3 populated, and J8 set to 2-3. For DDR2 CPU2 board with TO2, both these jumpers should be depopulated. ARM2 CPU3 (with DDR3) DDR configurations were not changed. TO1 and TO2 can run well using existing DDR3 script. However, DCD was converted to plugin to align with other boards. Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00133049 Support nand flash for MX28Frank Li2010-11-04-0/+83
| | | | | | | Support nand basic read/write in MX28 u-boot. Signed-off-by: Frank Li <frank.li@freescale.com> Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00132758 correct NFC_CLK definitionLily Zhang2010-10-19-1/+2
| | | | | | | | This patch is used to fix the issue caused by ENGR00132709. NFC_CLK definition should be used in cmd_clk interface. MXC_NFC_CLK should be used as internal clock name. Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00132617 MX53: add NAND supportLily Zhang2010-10-17-1/+381
| | | | | | | | | | | | | | | | | | | | | | | | | | Add NAND support for MX53 EVK and ARD. Need to use kobs-ng to flash U-Boot on MX53 TO1. Because MX51 TO1 ROM doesn't support bi swap solution and kernel enable bi swap, Must enable "ignore bad block" option when flashing U-Boot. The step is as following: echo 1 > /sys/devices/platform/mxc_nandv2_flash.0/ignorebad kobs-ng init --chip_0_device_path=/dev/mtd2 u-boot.bin echo 0 > /sys/devices/platform/mxc_nandv2_flash.0/ignorebad Since default configuration stores environment into SD card and U-Boot uses get_mmc_env_devno (Read SBMR register) to get MMC/SD slot information, you must insert SD card to bottom SD slot to get/store environment if you are using NAND boot on MX53 EVK. You must config boot dip setting well when doing NAND boot. For example, if you are using NAND 29F32G080AA NAND chip on MX53 EVK, you can set boot dips as the following for NAND boot: SW3: dip 7, 8 on; SW2: dip 3,5 on; SW1: dip 4,7,8 on. Other dips are off. Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00131691 MX50 RDP UbootAnish Trivedi2010-09-21-0/+12
| | | | | | | | | | Add support for building uboot for MX50 reference design platform: 1) LPDDR2 init script (v0.3 from Mike Kjar, dated 9/14) 2) iomux 3) new board file and machine id for RDP 4) Updates for iram boot on RDP Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00131779: Use serial_mxc as uart driver for all platformsTerry Lv2010-09-21-4/+13
| | | | | | Use serial_mxc as uart driver for all platforms. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00131705-3 Import new mach-type header fileLily Zhang2010-09-20-27/+7268
| | | | | | | Import new mach-type header file Signed-off-by: Lily Zhang <r58066@freescale.com> Acked-by: Rob Herring
* ENGR00131705-2 Add MX53 ARD supportLily Zhang2010-09-20-2/+7
| | | | | | | | | | | Add MX53 Automotive Reference Board (ARD) support 1. Add DDR2 initialization script 2. Add external ethernet support 3. Update PIN settings for UART, I2C, SDHC etc Signed-off-by: Anish Trivedi <anish@freescale.com> Signed-off-by: Terry Lv <r65388@freescale.com> Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00131578: Add android recovery mode support for mx53Terry Lv2010-09-20-2/+3
| | | | | | Add android recovery mode support for mx53. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00127167: Add gpmi nfc and apbh dma support for mx50.Terry Lv2010-09-19-37/+993
| | | | | | Add gpmi nfc and apbh dma support for mx50. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00127368 UBOOT: Make the android recovery code common for platformsrel_imx_2.6.31_10.09.00Xinyu Chen2010-09-10-12/+3
| | | | | | | | | | | | | | Move the android recovery codes into common/recovery.c. Cut the keypad detecting time. Now we only need detect there's POWER and HOME key pressing at the time scanning keyboard matrix. So user must hold these two keys when bootup to enter recovery mode. This can reduce the uboot boot time with recovery mode configured. Later /cache file checking for recovery command should be merged into the common/recovery.c Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
* ENGR00126079: Add clk command support for mx51Terry Lv2010-08-11-8/+13
| | | | | | Add clk command support for mx51. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00125237: Fix incorrect copyright info.Terry Lv2010-08-04-9/+18
| | | | | | Fix incorrect copyright info. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00125324: Add splash screen code and support for epdcrel-imx-2.6.31-10.08.01rel-imx-2.6.31-10.08.00Terry Lv2010-08-03-0/+30
| | | | | | Add splash screen code and support for epdc. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00125735 iMX28 read mac address from fuseFrank Li2010-07-30-0/+239
| | | | | | Read mac address from fuse Signed-off-by: Frank Li <frank.li@freescale.com>
* ENGR00125220 MX28: SD(slot0)boot dhcp failedJason Liu2010-07-22-14/+2
| | | | | | | This is caused by fec_pwr_en pin is mis-used which lead to FEC not power on. This commit fix this issue. Signed-off-by:Jason Liu <r64343@freescale.com>
* ENGR00123924: Reconstructure fuse files and add fuse to mx53.Terry Lv2010-07-16-33/+72
| | | | | | | | | | 1. Reconstructure fuse. Move fuse files to common directory. 2. Read mac from fuse in fec. 3. Remove scc and srk command from fuse command. 4. Change fuse to iim. 5. Add fuse for mx53. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00124359 Add uboot support for MX50Jason Liu2010-07-07-0/+1035
| | | | | | | | | | | | | | Add initial support for MX50 -Support mddr200Mhz, lpddr2266Mhz ARM2 board, -Support boot from SD/MMC, -Support boot from SPI-NOR, -Support FEC, UART, -Support SD/MMC/SPI command within UBOOT Signed-off-by: Anish Trivedi <anish@freescale.com> Signed-off-by: Terry Lv <r65388@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00122651: Add dwc_ahsata supportTerry Lv2010-06-24-19/+25
| | | | | | Add dwc_ahsata support. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00123484 mx28:support saving environment into sd1Aisheng.Dong2010-06-08-4/+14
| | | | | | | | | Original uboot did not support sd1 and can only save environment into sd0 even actually you're booting from sd1. This patch adds the capability of saving environment into sd1 when you're booting from sd1. Signed-off-by: Aisheng.Dong <b29396@freescale.com>
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