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* ENGR00120520: Enable MMU for mx51 and mx35Terry Lv2010-03-04-1/+1
| | | | | | | MMU enable code is missed in mx51 and mx35 u-boot. So add these codes. Signed-off-by: Terry Lv <r65388@freescale.com>
* Introduce virt_to_phys()Kumar Gala2008-12-15-0/+5
| | | | | | | | | | | | virt_to_phys() returns the physical address given a virtual. In most cases this will be just the input value as the vast majority of systems run in a 1:1 mode. However in systems that are not running this way it should report the physical address or ~0 if no mapping exists for the given virtual address. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Fix misspelled commentMarcel Ziswiler2008-05-04-1/+1
| | | | Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
* Introduce phys_size_t and move phys_addr_t into asm/types.hKumar Gala2008-04-13-2/+0
| | | | | | | Also add CONFIG_PHYS_64BIT on powerpc to deal with 32-bit ppc's that have larger physical addresses like 44x, 85xx, and 86xx. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Introduce map_physmem() and unmap_physmem()Haavard Skinnemoen2007-12-13-0/+26
| | | | | | | | | | | | | | | | map_physmem() returns a virtual address which can be used to access a given physical address without involving the cache. unmap_physmem() should be called when the virtual address returned by map_physmem() is no longer needed. This patch adds a stub implementation which simply returns the physical address cast to a uchar * for all architectures except AVR32, which converts the physical address to an uncached virtual mapping. unmap_physmem() is a no-op on all architectures, but if any architecture needs to do such mappings through the TLB, this is the hook where those TLB entries can be invalidated. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [PATCH v3] Add sync to ensure flash_write_cmd is fully finishedHaiying Wang2007-02-21-0/+4
| | | | | | | | | Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command is fully finished. The sync() is defined in each CPU's io.h file. For those CPUs which do not need sync for now, a dummy sync() is defined in their io.h as well. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Update of new NAND codeWolfgang Denk2005-09-14-0/+8
| | | | Patch by Ladislav Michl, 13 Sep 2005
* * Patches by Richard Woodruff, 01 Oct 2004:wdenk2005-01-09-2/+4
| | | | | | | | add support for the TI OMAP2420 processor and its H4 reference board * Patch by Christian Pellegrin, 24 Sep 2004: Added support for NE2000 compatible (DP8390, DP83902) NICs.
* * Header file cleanup for ARMwdenk2003-06-25-5/+7
| | | | | | * Patch by Murray Jensen, 24 Jun 2003: - make sure to use only U-boot provided header files - fix problems with ".rodata.str1.4" section as used by GCC-3.x
* * Avoid flicker on the TRAB's VFD by synchronizing the enable withwdenk2003-03-14-27/+38
| | | | | | | | | | | | | | | | | | | the HSYNC/VSYNC. Requires new CPLD code (Version 101 for Rev. 100 boards, version 153 for Rev. 200 boards). * Patch by Vladimir Gurevich, 12 Mar 2003: Fix relocation problem of statically initialized string pointers in common/cmd_pci.c * Patch by Kai-Uwe Blöm, 12 Mar 2003: Cleanup & bug fixes for JFFS2 code: - the memory mangement was broken. It caused havoc on malloc by writing beyond the block boundaries. - the length calculation for files was wrong, sometimes resulting in short file reads. - data copying now optionally takes fragment version numbers into account, to avoid copying from older data. See doc/README.JFFS2 for details.
* Initial revisionwdenk2002-09-07-0/+284