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* MLK-10178-6 net:fec_mxc support shared MDIO busYe.Li2015-04-29-0/+4
| | | | | | | | | There are two FEC controller on MX7, and each MDIO bus can be shared with other. So add a configuration for this case. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit d31b4fcc6175b1bc9a2cf672678da212b133af17)
* MLK-10178-5 ocotp:mxc add i.MX7D supportPeng Fan2015-04-29-2/+74
| | | | | | | | | | | | Ocotp of i.MX7D has different operation rule. This patch is to add support for i.MX7D ocotp. Note: DIV_ROUND is changed to DIV_ROUND_CLOSEST Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit d0c3564b6a0f430254edcd8db1f33588bbeccb08)
* MLK-10178-3 i2c:mxc Add i2c support for i.MX7DPeng Fan2015-04-29-1/+21
| | | | | | | | | | Add i2c support for i.MX7D. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit b52cb9d40e71305b7a11b0bbc68fddd8e84e3b17) Conflicts: drivers/i2c/mxc_i2c.c
* MLK-10178-2 usb:ehci-mx7 add usb driver for i.MX7DYe.Li2015-04-29-0/+106
| | | | | | | | Add usb driver for i.MX7D. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit c78f52798d6b7dda775d272c3ccb9899e548d3d6)
* MLK-10178-1 gpio:mxc_gpio add i.MX7D supportPeng Fan2015-04-29-3/+5
| | | | | | | Add CONFIG_MX7 for mxc gpio driver Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 6e3f8dc68f1606cbbcdb4997fc0bdf1ac8a3f3b6)
* MLK-10035-2: supports NAND chips with oob size up to 744 byteAllen Xu2015-04-29-8/+14
| | | | | | | | | | | | | | | | | | Update the u-boot code to support NAND chips with oob size up to 744 byte. For the NAND flash MT29F32G08CBADA, which consists of 2 planes x 1064 blocks per plane. Obviously the block number is not power-of-2. But all MTD driver assumes the page per block and block per plane must be a power of 2 number. So the last 40 blocks in each plane must be truncated. Signed-off-by: Allen Xu <b45815@freescale.com> (cherry picked from commit 9045626dbc7798cc340f64699bc9bd35c537498a) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: include/linux/mtd/nand.h
* ENGR00325088 video: mxsfb: Disable LCDIF correctlyLiu Ying2015-04-29-5/+9
| | | | | | | | | | | | | | | | | | | | | Let's use the i.MX common miscellaneous reset API to reset the LCDIF block so that we may eliminate a random hang issue at the arch_preboot_os() stage when we disable the LCDIF. This patch also waits for a VSYNC interrupt to guarantee the reset is done at the VSYNC edge, which somehow makes the LCDIF consume the display FIFO(?) and helps the LCDIF work normally at the kernel stage. Tested-by: Jason Liu <r64343@freescale.com> Tested-by: Sandor Yu <R01008@freescale.com> Tested-by: Ye.Li <B37916@freescale.com> Tested-by: Guo Sally <b38912@freescale.com> Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 45fa2ad38b846596e61ce8fc477713dede8a43e7) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 9d782aa487c4ffe096c94bbda5867b44afd6a440) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* ENGR00315894-60 GPIO: Modify driver mxc_gpio to support RDC SemaphoresYe.Li2015-04-29-0/+51
| | | | | | | | | | | | | | | | | | | | For GPIO group which shared by multiple masters, it may set in RDC to shared and semaphore required. Before access the GPIO register, the GPIO driver must get the RDC semaphore, and release the semaphore after the GPIO register access. When CONFIG_MXC_RDC is set, the features related to RDC semaphores is enabled in mxc_gpio driver. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 84d63e2e2ce12f714e88baad8b2325684614a7c1) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: drivers/gpio/mxc_gpio.c (cherry picked from commit c9943b9c8a78bb2c9886bfe582e82978387d8dee) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* ENGR00315894-33 gpmi: use the same ECC strength as used in the kernelYe.Li2015-04-29-19/+13
| | | | | | | | | | | | | | | | | Current code use the hardcoded ECC strength which is not aligned with the kernel. This patch use the same ECC strength as used in the kernel. We do not support the NAND whose OOB size is larger then 512bytes. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 8b3db31d607be02409b1f4937d91241f48229e96) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: drivers/mtd/nand/mxs_nand.c
* ENGR00315499-22 video: ipu: wait for DP SF end irq when disabling sync BG flowLiu Ying2015-04-29-3/+3
| | | | | | | | | | | | | | | Instead of waiting for DC triple buffer to be cleared, this patch changes to wait for a relevant DP sync flow end irq when disabling sync BG flows. In this way, we align the implement to the FSL internal IPUv3 driver. After applying this patch, the uboot hang up issue at the arch_preboot_os stage on the MX6DL platforms is not observed any more. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> (cherry picked from commit 56d72035946c40f45d2f49ccb1520734e34ecc89) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit d8ac526681589c62287d014fedee4c9e64fbca66) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-6 imx: add mxc_keybPeng Fan2015-04-29-0/+593
| | | | | | | | | | | | This patch is from commit b79371410aa44972dea53d5c19d256170928dcbd "ENGR00315499-9: ARM:iMX6SL EVK: Add keyboard support" Since board file already added related bsp and pin settings, this patch only add driver. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* ENGR00315499-18 driver:MAX7310: Add GPIO expander driver for MAX7310Ye.Li2015-04-29-0/+168
| | | | | | | | | | | | | | | | | Implement simple functionalities for MAX7310 GPIO input and output. Because MAX7310 is a off-chip device and need to co-exist with on-chip GPIO, new APIs are added specifically for expander device. CONFIG_MAX7310_IOEXP is used to enable the MAX7310 driver. The I2C related configurations also need to set together. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> (cherry picked from commit e3b699dab2c92268799b56c28c6a8fcda4f6110b) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: drivers/gpio/Makefile
* MLK-10774-5 Add EPDC splash screen for MX 6DL SabreSD and 6SL EVKPeng Fan2015-04-29-0/+454
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add EPDC splash screen feature for MX6SL EVK, and MX6DL SABRESD board. - Currently, splash screen consists of a simple black border around a white screen. Done this way to save in memory footprint. - EPDC splash screen is disabled by default in the config file for MX6DL_SABRESD and MX6SL_EVK. If left enabled, the U-Boot image will not boot correctly (hang), since some additional content on the boot device (waveform file) is required for EPDC splash to work correctly. Please refer to Linux Reference Manual for how to flash WAVEFORM file. Signed-off-by: Robby Cai <R63905@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> (cherry picked from commit b8ab9b3eabb94bbbc1eea63e7c0e2a87d2d645f4) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: arch/arm/include/asm/arch-mx6/mx6sl_pins.h board/freescale/mx6sabresd/mx6sabresd.c board/freescale/mx6slevk/mx6slevk.c drivers/video/Makefile include/configs/mx6sabresd.h include/configs/mx6slevk.h include/lcd.h drivers/video/Makefile
* MLK-10774-4 fsl:qspi update qspi driverPeng Fan2015-04-29-596/+684
| | | | | | Use freescale vendor qspi driver but not upstream qspi driver Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* ENGR00315894-81 gis: Add gis moduleYe.Li2015-04-29-0/+603
| | | | | | | | | | | | Add gis module, current gis is support vadc input. Add power down function to lcdif driver. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit a007b00dd8ef9f773dfdebef0b1deb0990281793) Conflicts: drivers/video/Makefile
* ENGR00315894-80 pxp: Add pxp moduleYe.Li2015-04-29-0/+324
| | | | | | | | | | Add pxp module. Support csc between YUV444 and RGB888 and scaling. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 4c6e1f9ed1b2f5c98a34502b44b6414593fdd290) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* ENGR00315894-79 csi: Add csi moduleYe.Li2015-04-29-0/+425
| | | | | | | | | Add csi module. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 854ae26758ec8132ef749b98645dd2f43b84e5e2) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* ENGR00315894-78 vadc: Add vadc moduleYe.Li2015-04-29-0/+602
| | | | | | | | | | Add vadc module. Both PAL and NTSC mode can work. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 03c31ae30c1e81c99f6824221e4801433445e04a) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* ENGR00315894-70 iMX6SX:Video Update MXS LCDIF driverYe.Li2015-04-29-10/+49
| | | | | | | | | | | | | | Add a new interface "mxs_lcd_panel_setup" to setup fb parameters and specifies the LCDIF controller for multiple controllers of iMX6SX. Pass fb parameters via "videomode" env remains work if the new interface is not called before video initialization. Modify LCDIF clock interface "mxs_set_lcdclk" to support multiple LCDIF controllers on iMX6SX. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 054fed6bab5b05a054c7e3cb5362635a40e6ee18) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-2 HDMI: splash screen function enhancementPeng Fan2015-04-29-19/+50
| | | | | | | | | | | | | | -Change HDMI video mode to VGA. -Add pixel clock fraction part setting in IPU driver, fix video mode timing issue. -Add overflow state clear workaround, fix kernel hang in HDMI driver issue. -Correct IPU clock to 264MHz. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> (cherry picked from commit 45d532a0237f5baf2ec95b4364ec5bc94d312689) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* dtt: add ds620 supportAlbert ARIBAUD \(3ADEV\)2015-04-10-0/+66
| | | | Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* lpc32xx: add LPC32xx SSP support (SPI mode)Albert ARIBAUD \(3ADEV\)2015-04-10-0/+145
| | | | | Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* lpc32xx: add GPIO supportAlbert ARIBAUD \(3ADEV\)2015-04-10-0/+301
| | | | | | This driver only supports Driver Model, not legacy model. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* lpc32xx: i2c: add LPC32xx I2C interface supportAlbert ARIBAUD \(3ADEV\)2015-04-10-0/+250
| | | | Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* lpc32xx: mtd: nand: add MLC NAND controllerAlbert ARIBAUD \(3ADEV\)2015-04-10-0/+765
| | | | | | | | | | The controller's Reed-Solomon ECC hardware is used except of course for raw reads and writes. It covers in- and out-of-band data together. The SPL framework is supported. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* lpc32xx: add Ethernet supportAlbert ARIBAUD \(3ADEV\)2015-04-10-0/+638
| | | | Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* ahci: Fix a wrong parameter passTang Yuantian2015-04-07-1/+1
| | | | | | | | | | | | In stead of user_buffer_size, transfer_size should be used to pass to ahci_device_data_io(). transfer_size is the length that we want the low level function to transfer each time. If we use user_buffer_size which is the totally data length as parameter, low level function will actually create many SGs to transfer as many data as possible each time. That will produce many redundant data transfer. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* video: parade: configure SLP and RST GPIOs if specified in DTAjay Kumar2015-04-06-0/+11
| | | | | | | | | | Add support to configure EDP_RST GPIO and EDP_SLP GPIO, if provided in parade DT node. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* video: exynos_fb: configure backlight GPIOs if specified in DTAjay Kumar2015-04-06-0/+21
| | | | | | | | | | Add support to configure PWM_OUT(PWM output) GPIO and BL_EN(backlight enable) GPIO, if provided in FIMD DT node. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* serial-arc: switch to DMAlexey Brodkin2015-04-03-32/+70
| | | | | | | | Now when all infrastructure in ARC is ready for it let's switch ARC UART to driver model. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org>
* serial/serial_arc: set registers address during compilationAlexey Brodkin2015-04-03-2/+1
| | | | | | | | | | Being global variable with 0 value it falls into .bss area which we may only use after relocation to RAM. And right afetr relocation we zero .bss - effectively cleaing register address set for early console. Now with pre-set value "regs" variable is no longer in .bss and this way safely survives relocation. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2015-03-31-0/+6
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| * ARM: at91: atmel_nand: Support flash based BBTDavid Dueck2015-04-01-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Add support for on-flash bad block table. This makes U-Boot handle an existing BBT correctly. Signed-off-by: David Dueck <davidcdueck@googlemail.com> Reviewed-by: Boris BREZILLON <boris.brezillon@free-electrons.com> CC: Boris BREZILLON <boris.brezillon@free-electrons.com> CC: Josh Wu <josh.wu@atmel.com> CC: Andreas Bießmann <andreas.devel@googlemail.com> CC: Scott Wood <scottwood@freescale.com> Acked-by: Josh Wu <josh.wu@atmel.com>
* | Merge git://git.denx.de/u-boot-nand-flashTom Rini2015-03-31-318/+120
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| * | mtd: vf610_nfc: specify transfer size before each transferStefan Agner2015-03-30-8/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Testing showed, that commands like STATUS made the buffer dirty when executed with NFC_SECSZ set to the page size. It looks like the controller transfers bogus data when this register is configured. When setting it to 0, the buffer does not get altered while the status command still seems to work flawless. Signed-off-by: Stefan Agner <stefan@agner.ch>
| * | mtd: vf610_nfc: mark page as dirty on block eraseStefan Agner2015-03-30-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver tries to re-use the page buffer by storing the page number of the current page in the buffer. The page is only read if the requested page number is not currently in the buffer. When a block is erased, the page number is marked as invalid if the erased page equals the one currently in the cache. However, since a erase block consists of multiple pages, also other page numbers could be affected. The commands to reproduce this issue (on a written page): > nand dump 0x800 > nand erase 0x0 0x20000 > nand dump 0x800 The second nand dump command returns the data from the buffer, while in fact the page is erased (0xff). Avoid the hassle to calculate whether the page is affected or not, but set the page buffer unconditionally to invalid instead. Signed-off-by: Stefan Agner <stefan@agner.ch>
| * | nand: yaffs: Remove the "nand write.yaffs" commandPeter Tyser2015-03-30-65/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This command is only enabled by one board, complicates the NAND code, and doesn't appear to have been functioning properly for several years. If there are no bad blocks in the NAND region being written nand_write_skip_bad() will take the shortcut of calling nand_write() which bypasses the special yaffs handling. This causes invalid YAFFS data to be written. See http://lists.denx.de/pipermail/u-boot/2011-September/102830.html for an example and a potential workaround. U-Boot still retains the ability to mount and access YAFFS partitions via CONFIG_YAFFS2. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * | nand: Remove CONFIG_MTD_NAND_VERIFY_WRITEPeter Tyser2015-03-30-248/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | The CONFIG_MTD_NAND_VERIFY_WRITE has been removed from Linux for some time and a more generic method of NAND verification now exists in U-Boot. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
| * | dfu: nand: Verify writesPeter Tyser2015-03-30-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously NAND writes were not verified and could fail silently. Add a verification step after all writes to NAND. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
| * | nand: Add verification functionsPeter Tyser2015-03-30-1/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add nand_verify() and nand_verify_page_oob(). nand_verify() verifies NAND contents against an arbitrarily sized buffer using ECC while nand_verify_page_oob() verifies a NAND page's contents and OOB. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
| * | mtd: nand: mxs: fix PIO_WORDs in mxs_nand_write_buf()Luca Ellero2015-03-30-1/+1
| | | | | | | | | | | | | | | | | | There is only one pio_word in this DMA transaction so data field must be 1. Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com>
| * | mtd: nand: mxs: fix PIO_WORDs in mxs_nand_read_buf()Luca Ellero2015-03-30-1/+1
| |/ | | | | | | | | | | There is only one pio_word in this DMA transaction so data field must be 1. Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-imxTom Rini2015-03-31-2/+1
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| * | watchdog/imx_watchdog: do not set WCR_WDWSebastian Siewior2015-03-25-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | with WCR_WDW set, the watchdog won't trigger if we bootet linux and idle around while the watchdog is not triggered. It seems the timer makes progress very slowly if at all. I managed to remain 20minutes alive while the timeout was set to 60secs. It reboots within 60secs if I start a busyloop in userland (something like "while (1) { }"). While I don't see a reason why the WDT should not be running while the CPU is in idle, I'm dropping this bit. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Acked-by: Stefano Babic <sbabic@denx.de>
* | | spi: designware_spi: revisit FIFO size detection againAxel Lin2015-03-30-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By specification the FIFO size would be in a range 2-256 bytes. From TX Level prospective it means we can set threshold in the range 0-(FIFO size - 1) bytes. Hence there are currently two issues: a) FIFO size 2 bytes is actually skipped since TX Level is 1 bit and could be either 0 or 1 byte; b) FIFO size is incorrectly decreased by 1 which already done by meaning of TX Level register. Fixes: 501943696ea4 (spi: designware_spi: Fix detecting FIFO depth) Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | spi: cf_spi: Staticize local functionsAxel Lin2015-03-30-13/+7
| | | | | | | | | | | | | | | | | | | | | Make local functions static and remove unneeded forward declarations. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | spi: cf_spi: Use to_cf_spi_slave to resolve cfslave from slaveAxel Lin2015-03-30-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | Don't assume slave is always the first member of struct cf_spi_slave. Use container_of instead of casting first structure member. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | qspi: dra7x: enable quad mode read for ti-qspi driverRavi Babu2015-03-30-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | This patch enables QUAD read mode for qspi to improve the read performace while loading the binaries from qspi. Signed-off-by: Ravi Babu <ravibabu@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | spi: ftssp010_spi: Use to_ftssp010_spi() to ensure free correct addressAxel Lin2015-03-30-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | Don't assume slave is always the first member of struct ftssp010_spi. Use to_ftssp010_spi() to ensure free correct address in spi_free_slave(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | spi: davinci: Remove duplicate code to set bus and cs for slaveAxel Lin2015-03-30-3/+0
| | | | | | | | | | | | | | | | | | | | | It's done in spi_alloc_slave(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
generated by cgit v1.1 at 2024-11-18 20:10:54 +0000