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* Implement "pci enum" command for CONFIG_DM_PCIStephen Warren2016-01-28-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | With CONFIG_DM_PCI enabled, PCI buses are not enumerated at boot, as they are without that config option enabled. No command exists to enumerate the PCI buses. Hence, unless some board-specific code causes PCI enumeration, PCI-based Ethernet devices are not detected, and network access is not available. This patch implements "pci enum" in the CONFIG_DM_PCI case, thus giving a mechanism whereby PCI can be enumerated. do_pci()'s handling of case 'e' is moved into a single location before the dev variable is assigned, in order to skip calculation of dev. The enum sub-command doesn't need the dev value, and skipping its calculation avoids an irrelevant error being printed. Using a command to initialize PCI like this has a disadvantage relative to enumerating PCI at boot. In particular, Ethernet devices are not probed during PCI enumeration, but only when used. This defers setting variables such as ethact, ethaddr, etc. until the first network-related command is executed. Hopefully this will not cause further issues. Perhaps in the long term, we need a "net start/enum" command too? Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: Remove device_probe_child()Simon Glass2016-01-28-8/+1
| | | | | | | | | This function is not used as the use case for it did not eventuate. Remove it to avoid confusion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* tpm: st33zp24: Add tpm st33zp24 spi supportChristophe Ricard2016-01-28-0/+682
| | | | | | | | | | | | Add support for TPM ST33ZP24 spi. The ST33ZP24 does have a spi interface. The transport protocol is proprietary. For spi we are relying only on DM_SPI. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
* tpm: st33zp24: Add tpm st33zp24 support with i2cChristophe Ricard2016-01-28-0/+553
| | | | | | | | | Add support for TPM ST33ZP24 family with i2c. For i2c we are relying only on DM_I2C. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
* tpm: Rename tpm_tis_infineon.h to tpm_tis.h and move infineon specific stuff ↵Christophe Ricard2016-01-28-17/+17
| | | | | | | | | | | | | | | | in tpm_infineon.c I2C protocol is not standardize for TPM 1.2. TIS prococol is define by the Trusted Computing Group and potentially available on several TPMs. tpm_tis_infineon.h header is not generic enough. Rename tpm_tis_infineon.h to tpm_tis.h and move infineon specific defines/variables to tpm_tis_infineon.c Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
* tpm: tpm_tis_lpc: fix typoChristophe Ricard2016-01-28-1/+1
| | | | | | | TPM_TIS_LPC is connected to the LPC bus, not I2C. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
* Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-01-28-0/+50
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| * misc: Add simple driver to enable the legacy UART on Winbond Super IO chipsStefan Roese2016-01-28-0/+50
| | | | | | | | | | | | | | | | | | | | | | On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8) are provided by a superio chip connected to the LPC bus. We must program the superio chip so that serial ports are available for us. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-01-27-23/+316
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| * | spi: fsl_qspi: Fix qspi_op_rdsr memcpy issueGong Qianyu2016-01-27-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In current driver, we always copy 4 bytes to the dest memory. Actually the dest memory may be shorter than 4 bytes. Add an argument to indicate the dest memory length. Avoid writing memory outside of the bounds. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | spi: fsl_qspi: Fix qspi_op_rdid memcpy issueGong Qianyu2016-01-27-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In current driver everytime we memcpy 4 bytes to the dest memory regardless of the remaining length. This patch adds checking the remaining length before memcpy. If the length is shorter than 4 bytes, memcpy the actual length of data to the dest memory. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | spi: fsl_qspi: fix compile warning for 64-bit platformGong Qianyu2016-01-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the following compile warning: drivers/spi/fsl_qspi.c: In function 'fsl_qspi_probe': drivers/spi/fsl_qspi.c:937:15: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] priv->regs = (struct fsl_qspi_regs *)plat->reg_base; ^ Just make the cast explicit. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | mmc: fsl_esdhc: set Abort command type for CMD12Yangbo Lu2016-01-27-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | According to SD spec, CMD12, CMD52 for writing I/O abort in CCCR need to be set an Abort command type when they are sent. So, we remove all chip-specific #ifdefs and make it available for all platforms. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | mmc: fsl_esdhc: increase data transaction timeout to 500msYangbo Lu2016-01-27-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MMC spec says "It is strongly recommended for hosts to implement more than 500ms timeout value even if the card indicates the 250ms maximum busy length." Even the previous value of 300ms is known to be insufficient for some cards. So, increase the timeout to 500ms. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | driver: net: fsl-mc: Remove portal id hard-codingPrabhakar Kushwaha2016-01-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Management Complex firmware 9.0 has fixed the issue of dprc_destroy_container i.e. the used portal is not return to the free pool. Which was resulting in error ethernet driver want to use this portal via either DPL or dynamically in Linux. Hard-coding of portal id is removed. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | driver: net: ldpaa: Add debug info of printing DPMAC statsPrabhakar Kushwaha2016-01-27-0/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add debug information prints to provide DPMAC statistics - Number of bytes received - Number of received and discard frames - Number of bytes transferred - Number of frames transferred etc. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | driver: net: ldpaa: Increase num of buffers for a poolPrabhakar Kushwaha2016-01-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Management Complex FW 9.0 set the hardware depletion to be 20 buffers in order to support multiple pools in DPNI. This requires driver to fill the pool with at least 21 to be able to receive frames. So, Increase number of buffers for a pool. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | driver: net: ldpaa: Report back only error frames for txPrabhakar Kushwaha2016-01-27-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Management Complex FW 9.0 puts a new requirement to provide Tx confirmation and error queue configuration by calling dpni_set_tx_conf API. Configure report of only error frames for a tx frame. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | driver: net: fsl-mc: Prepare extended cfg for DPNI createPrabhakar Kushwaha2016-01-27-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Management Complex FW 9.0 puts a new requirement to prepare extended parameters which should be provided as input in dpni_create. extended parameters includes traffic class and IP reassembly configurations. So prepare extended parameters with default "0" as input for dpni_create. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | driver: net: fsl-mc: flib changes for MC FW 9.0.0Prabhakar Kushwaha2016-01-27-3/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MC firmware version 9.0.0 contains - Support of new APIs - Update in existing APIs - Change in Major and minor version of DPAA2 objects This patch contains modifications in FLIB files to support new MC firmware version. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | driver: net: fsl-mc: Add version check for MC objectsPrabhakar Kushwaha2016-01-27-1/+78
| | | | | | | | | | | | | | | | | | | | | | | | Check and compare version of management complex's object with the version supported by Freescale ldpaa2 ethernet driver. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | drivers: net: fsl_mc: Compare pointer value qbman_swp_mc_startPratiyush Mohan Srivastava2016-01-25-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current code compares the return pointer of function qbman_cena_write_start with NULL. Instead the value of the return pointer should be compared. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Acked-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | drivers/ddr/fsl: fsl_ddr_sdram_size remove unused controllersEd Swarthout2016-01-25-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Following commit 61bd2f75, exclude unused DDR controller from calculating RAM size for SPL boot. Signed-off-by: Ed Swarthout <Ed.Swarthout@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | driver/ddr/fsl: Add workaround for A009663Shengzhou Liu2016-01-25-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Erratum A-009663 workaround requires to set DDR_INTERVAL[BSTOPRE] to 0 before setting DDR_SDRAM_CFG[MEM_EN] and set DDR_INTERVAL[BSTOPRE] to the desired value after DDR initialization has completed. When DDR controller is configured to operate in auto-precharge mode(DDR_INTERVAL[BSTOPRE]=0), this workaround is not needed. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | fsl/ddr: Add workaround for ERRATUM_A009942Shengzhou Liu2016-01-25-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During the receive data training, the DDRC may complete on a non-optimal setting that could lead to data corruption or initialization failure. Workaround: before setting MEM_EN, set DEBUG_29 register with specific value for different data rates. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | | net: xilinx_ll_temac: Fix string overflowRicardo Ribalda Delgado2016-01-27-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Size of this snprintf "lltemac.%lx" is bigger than 16 characters. Replacing it with "ll_tem.%lx" Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com>
* | | ppc: xilinx-ppc4xx: Port to DM serialRicardo Ribalda Delgado2016-01-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xilinx_uartlite has been ported to DM, this patch makes the xilinx-ppc405-generic and the xilinx-ppc440-generic boards use the new DM driver. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com>
* | | mmc: zynq_sdhci: Added qurik to disable high speedSiva Durga Prasad Paladugu2016-01-27-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add quirk to disable high speed incase the high speed was broken.This solves the issue where the the controller is used in High Speed Mode and the the hold time requirement for the JEDEC/MMC 4.41 specification is NOT met. This timing issue is not on all boards and hence provided config option to enable it when required. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Emil Lenchak <emill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | mmc: sdhci: Clear high speed if not supportedSiva Durga Prasad Paladugu2016-01-27-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Clear high speed bit if it was not supported by the driver. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Emil Lenchak <emill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | sdhci: zynq: Remove hardcoded value zero as min frequencySiva Durga Prasad Paladugu2016-01-27-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove hardcoded value zero as min frequency and use config option CONFIG_ZYNQ_SDHCI_MIN_FREQ defined in board config Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | net: zynq: Change MDC setup for arm64Michal Simek2016-01-27-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | MDC setting depends on pclk input clocks which varies across SoC. This driver is used by xilinx zynq and zynqmp SOC. Input clock frequence on silicon is 125MHz where divider 64 put frequency below 2.5MHz requires by spec (125/64=1.95). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | net: phy: ti: Enable automatic crossover modeMichal Simek2016-01-27-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Enable automatic crossover cable detection. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | serial: zynq: Fix address reading from DMMichal Simek2016-01-27-6/+1
| | | | | | | | | | | | | | | | | | | | | Use dev_get_addr() instead of reading reg base directly in the driver. Core function is also more robust. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | serial: zynq: Extend compatible string listMichal Simek2016-01-27-0/+1
| | | | | | | | | | | | | | | | | | | | | ZynqMP is using updated core with cdns,uart-r1p12 compatible string. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | fpga: xilinx: Check for substring in device ID validationSiva Durga Prasad Paladugu2016-01-27-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Check for substrings in deviceID validation check so that it can support xa bitstreams also. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | net: emaclite: Move emaclite to KconfigMichal Simek2016-01-27-0/+8
| | | | | | | | | | | | | | | | | | | | | Add PHYLIB and MII dependencies and enable it by default for Microblaze. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: emaclite: Let core to handle received packetMichal Simek2016-01-27-3/+3
| | | | | | | | | | | | | | | | | | Pass pointer to core to handle packet. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | net: emaclite: Rename start and stop functionsMichal Simek2016-01-27-5/+5
| | | | | | | | | | | | | | | | | | Rename start and stop functions to align with DM functions names. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | net: emaclite: Move driver to DMMichal Simek2016-01-27-68/+91
| | | | | | | | | | | | | | | | | | | | | Move driver to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: emaclite: Use indirect access in emaclite_recvMichal Simek2016-01-27-52/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | When IP is configured with pong buffers, IP is receiving packets to ping and then to pong buffer and than ping again. The original logic in the driver remains there that when ping buffer is free, pong buffer is checked too and return if both are free. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | net: emaclite: Use indirect reg access in sendMichal Simek2016-01-27-30/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original logic in the driver was exchanging buffers which are used for sending packet and tx_ping and tx_pong buffers were exchanged all the time to ensure that IP has enough time to send the packet out. Based on this "feature" send function was using nextbuffertouse variable to save which buffer should be used. Before this algorithm was called driver checked that there is free buffer available. This checking remains in the driver but driver tries to use tx_ping first if available. If not, tx_pong buffer is used instead. To reach this code the original condition is met that at least one of the buffer should be available. Testing doesn't show any performance drop when this patch is applied. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: emaclite: Remove XEL_TSR_XMIT_ACTIVE_MASK flagMichal Simek2016-01-27-13/+2
| | | | | | | | | | | | | | | | | | | | | | | | This flag is not documented anywhere in the latest documentation that's why this patch removes it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: emaclite: Fix logic around available TX buffersMichal Simek2016-01-27-16/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify logic how to find out if there is free TX buffer. Both buffers are checked all the time that's why logic around order can be removed. Also add check when only one buffer is available. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: emaclite: Use indirect register access for TX resetMichal Simek2016-01-27-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Move to use indirect register access when timeout expires for resetting TX buffers. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: emaclite: Use indirect register access for rx_ping/pongMichal Simek2016-01-27-3/+2
| | | | | | | | | | | | | | | | | | Do initialization via indirect register access. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | net: emaclite: Use indirect register access for tx_ping/pongMichal Simek2016-01-27-13/+13
| | | | | | | | | | | | | | | | | | | | | Do initialization via indirect register access. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: emaclite: Convert MDIO to use register offsetMichal Simek2016-01-27-36/+56
| | | | | | | | | | | | | | | | | | | | | Use u-boot coding style how to setup and access MDIO bus. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: emaclite: Add MDIO support to driverMichal Simek2016-01-27-0/+238
| | | | | | | | | | | | | | | | | | | | | Add MDIO support before move to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: emaclite: Remove ancient OF probe functionMichal Simek2016-01-27-30/+0
| | | | | | | | | | | | | | | | | | | | | Prepare for DM move. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: Add axi emac to KconfigMichal Simek2016-01-27-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | Also add dependency on PHYLIB and MII which is required. Clean PHYLIB dependency from the driver too. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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