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* usb: add support of generic OHCI devicesAlexey Brodkin2015-12-17-0/+54
| | | | | | | | | | | This driver is meant to be used with any OHCI-compatible host controller in case if there's no need for platform-specific glue such as setup of controller or PHY's power mode via GPIOs etc. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Marek Vasut <marex@denx.de>
* usb: host: ehci: samsung: Move hcor initialization after usb phy setupLukasz Majewski2015-12-17-2/+2
| | | | | | | | | | | | | With the old order of initialization the hcor pointer has been setup to the same address as Exynos EHCI base address (0x12110000 instead of 0x12110010). Such behaviour was caused by reading value of 0 instead of 0x10 from EHCI HCCPBASE register without doing proper clock initialization before. To fix this problem hcor initialization has been moved after USB PHY setup. Now ehci_readl(&ctx->hcd->cr_capbase) returns correct value. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: s3c-otg: Rename usb/s3c_udc.h to usb/dwc2_udc.hMarek Vasut2015-12-17-3/+3
| | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the global s3c_udc.h header to dwc2_udc.h. The rename is done automatically: $ sed -i "s/s3c_udc\.h/dwc2_udc.h/g" \ `git grep "s3c_udc\.h" | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename s3c_udc_probe() functionMarek Vasut2015-12-17-1/+1
| | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch is the second and final to rename global symbol, the s3c_udc_probe() function. The rename is done automatically: $ sed -i "s/s3c_udc_probe/dwc2_udc_probe/g" \ `git grep s3c_udc_probe | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename struct s3c_plat_otg_dataMarek Vasut2015-12-17-2/+2
| | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch is the first to rename global symbol, the struct s3c_plat_otg_data. The rename is done automatically: $ sed -i "s/s3c_plat_otg_data/dwc2_plat_otg_data/g" \ `git grep s3c_plat_otg_data | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename USB_GADGET_S3C_UDC_OTG* to USB_GADGET_DWC2_OTG*Marek Vasut2015-12-17-2/+2
| | | | | | | | | | | | | The s3c-otg IP block is in fact a DWC2 OTG one, so finally rename the config option to make it less misleading. No functional change, just a mechanical change done using the following script: git grep USB_GADGET_S3C_UDC_OTG | cut -d : -f 1 | sort -u | \ while read line ; do sed -i "s/USB_GADGET_S3C_UDC_OTG/USB_GADGET_DWC2_OTG/g" $line ; done Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Tweak the commentsMarek Vasut2015-12-17-4/+4
| | | | | | | The driver is actually for the Designware DWC2 controller. Tweak the comments in the driver to reflect this fact. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename remaining macrosMarek Vasut2015-12-17-22/+22
| | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the remaining S3C_* macros to match the DWC2 naming. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename sources to dwc2_*cMarek Vasut2015-12-17-6/+6
| | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the local source files to dwc2_*c and adjusts the Makefile to use the new names. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename local headers to dwc2_*hMarek Vasut2015-12-17-8/+8
| | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the local header files to dwc2_*h and adjusts the sources to use the new names. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Change the driver name to dwc2-udcMarek Vasut2015-12-17-3/+3
| | | | | | Just change the driver name. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Zap useless externsMarek Vasut2015-12-17-4/+2
| | | | | | | The extern statements are useless, remove them. Also remove the extern ... controller, which is completely useless. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename remaining local s3c_*() functionsMarek Vasut2015-12-17-23/+23
| | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the remaining local s3c_*() functions to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename s3c_udc_*() functionsMarek Vasut2015-12-17-47/+47
| | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the s3c_ep_*() functions to reflect this. The function s3c_udc_probe() is a special case and is not renamed by this patch yet. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename s3c_ep_*() functionsMarek Vasut2015-12-17-11/+11
| | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the s3c_ep_*() functions to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename s3c_ep0_*() functionsMarek Vasut2015-12-17-14/+14
| | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the s3c_ep0_*() functions to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Staticize functions in s3c_udc_otg_xfer_dma.cMarek Vasut2015-12-17-7/+7
| | | | | | Just staticize the functions, they are not used outside of the file. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Staticize s3c_udc_ep_set_stallMarek Vasut2015-12-17-3/+1
| | | | | | This function is local to s3c_udc_otg_xfer_dma.c , staticize it. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename struct s3c_requestMarek Vasut2015-12-17-28/+28
| | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_request to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename struct s3c_epMarek Vasut2015-12-17-46/+46
| | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_ep to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename struct s3c_dev_*_epMarek Vasut2015-12-17-4/+4
| | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_dev_*_ep to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename struct s3c_usbotg_phy to dwc2_usbotg_phyMarek Vasut2015-12-17-5/+5
| | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_usbotg_phy to struct dwc2_usbotg_phy to make things more obvious and clear. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Split private bits from s3c_udc.hMarek Vasut2015-12-17-1/+105
| | | | | | | | | Most of the functions are local to the s3c_udc driver, remove them from the s3c_udc.h header to stop those bits from propagating all over the place. Instead, move all the private stuff into new private s3c_udc_otg_priv.h header. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename struct s3c_usbotg_reg to dwc2_usbotg_regMarek Vasut2015-12-17-3/+3
| | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_usbotg_reg to struct dwc2_usbotg_reg to make things more obvious and clear. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename struct s3c_udc to dwc2_udcMarek Vasut2015-12-17-46/+46
| | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_udc to struct dwc2_udc to make things more obvious and clear. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: s3c-otg: Rename regs-otg.h to s3c_udc_otg_regs.hMarek Vasut2015-12-17-2/+2
| | | | | | | Rename the header file, so it's obvious which driver it's part of. No functional change. Signed-off-by: Marek Vasut <marex@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-12-14-59/+306
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| * drivers/crypto/fsl: fix endianness issue in RNGAneesh Bansal2015-12-15-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For Setting and clearing the bits in SEC Block registers sec_clrbits32() and sec_setbits32() are used which work as per endianness of CAAM block. So these must be used with SEC register address as argument. If the value is read in a local variable, then the functions will not behave correctly where endianness of CAAM and core is different. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> CC: Alex Porosanu <alexandru.porosanu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * fsl_qspi: Pet the watchdog while reading/writingAlexander Stein2015-12-15-0/+5
| | | | | | | | | | | | | | | | | | When reading a large blob. e.g. a linux kernel (several MiBs) a watchdog timeout might occur meanwhile. So pet the watchdog while operating on the flash. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * move erratum a008336 and a008514 to soc specific fileYao Yuan2015-12-15-34/+0
| | | | | | | | | | | | | | | | As the errata A008336 and A008514 do not apply to all LS series SoCs (such as LS1021A, LS1043A) we move them to an soc specific file Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * qbman_portal.c: Update BUG_ON() call in qbman_swp_mc_submitTom Rini2015-12-13-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With gcc-5.x we get a warning about the ambiguity of BUG_ON(!a != b) and becomes BUG_ON((!a) != b). In this case reading of the function leads to us wanting to rewrite this as BUG_ON(a != b). Cc: Prabhakar Kushwaha <prabhakar@freescale.com> Cc: Geoff Thorpe <Geoff.Thorpe@freescale.com> Cc: Haiying Wang <Haiying.Wang@freescale.com> Cc: Roy Pledge <Roy.Pledge@freescale.com> Cc: York Sun <yorksun@freescale.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * fsl/ddr: updated ddr errata-A008378 for arm and power SoCsShengzhou Liu2015-12-13-3/+6
| | | | | | | | | | | | | | | | | | DDR errata-A008378 applies to LS1021-20-22A-R1.0, T1023-R1.0, T1024-R1.0, T1040-42-20-22-R1.0/R1.1, it has been fixed on LS102x Rev2. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * driver/ddr/fsl: Update timing config for heavy loadYork Sun2015-12-13-2/+24
| | | | | | | | | | | | | | In case four chip-selects are all active, the turnaround times need to increase to avoid overlapping under heavy load. Signed-off-by: York Sun <yorksun@freescale.com>
| * driver/ddr/fsl: Update workaround for A008511 for vref rangeYork Sun2015-12-13-7/+15
| | | | | | | | | | | | | | The workaround requires different setting for range 1 vs 2. Also adjust timeout value for waiting for controller to be idle. Signed-off-by: York Sun <yorksun@freescale.com>
| * driver/ddr/fsl: Update MR5 RTT parkYork Sun2015-12-13-4/+15
| | | | | | | | | | | | For four chip-selects enabled case, RTT is parked on all of them. Signed-off-by: York Sun <yorksun@freescale.com>
| * driver/ddr/fsl: Update DDR4 MR6 for Vref rangeYork Sun2015-12-13-0/+3
| | | | | | | | | | | | MR6 bit 6 is set accrodingly for range 1 or 2, per JEDEC spec. Signed-off-by: York Sun <yorksun@freescale.com>
| * driver/ddr/fsl: Update DDR4 RTT valuesYork Sun2015-12-13-2/+235
| | | | | | | | | | | | | | DDR4 has different RTT value and code according to JEDEC spec. Update the macros and options . Signed-off-by: York Sun <yorksun@freescale.com>
* | stm32: Convert serial driver to DMKamil Lulko2015-12-12-107/+96
|/ | | | | | Signed-off-by: Kamil Lulko <kamil.lulko@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-12-11-418/+415
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| * spi: xilinx: Add new compatible stringsMichal Simek2015-12-11-1/+2
| | | | | | | | | | | | | | | | | | Add xlnx,xps-spi-2.00.a/b which is compatible string listed in the Linux kernel. Remove origin one which has no real background. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * sf: Rename sf_ops.c to spi-flash.cJagan Teki2015-12-11-4/+5
| | | | | | | | | | | | | | | | | | Since all spi-flash core operations are moved into sf_ops.c then it's better to renamed as spi-flash.c Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * sf: Use static for file-scope functionsJagan Teki2015-12-11-5/+5
| | | | | | | | | | | | | | | | Used static for file-scope functions in sf_probe.c Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * sf: sf_probe: Remove spi_slave pointer argumentJagan Teki2015-12-11-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Since spi_slave is a spi pointer in spi_flash{} then assign spi_slave{} pointer to flash->spi and remove spi_slave pointer argument to - spi_flash_probe_slave - spi_flash_scan Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * sf: ops: Fix missing break on spansion read_barJagan Teki2015-12-11-0/+1
| | | | | | | | | | | | | | | | For assigning read_bar commands in spansion case, break is missing this patch add that break. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * sf: Remove unneeded SST_BP and SST_WPJagan Teki2015-12-11-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | SST parts added on sf_params.c supports both SST_WR which consits of both BP and WP and there is a spi controller ich which supports only BP so the relevent _write hook set based on "slave->op_mode_tx" hence there is no respective change required from flash side hance removed these. Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * sf: Remove unneeded header includesJagan Teki2015-12-11-5/+0
| | | | | | | | | | | | | | | | Removed unneeded header includes in sf_ops and sf_probe Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * sf: Flash power up read-only based on idcode0Jagan Teki2015-12-11-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Using macro's for flash power up read-only access code leads wrong behaviour hence use idcode0 for runtime detection, hence the flash which require this functionality gets detected at runtime. Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * sf: Use simple name for register access functionsJagan Teki2015-12-11-26/+26
| | | | | | | | | | | | | | | | | | | | Most of the register access function are static, so used simple name to represent each. Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * sf: Fix MakefileJagan Teki2015-12-11-5/+1
| | | | | | | | | | | | | | | | This patch removes unneeded ifdef and fixed accordingly. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * sf: Use static for file-scope functionsJagan Teki2015-12-11-23/+6
| | | | | | | | | | | | | | | | | | Use static for file-scope functions and removed them from header files. Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
generated by cgit v1.1 at 2024-10-25 09:21:47 +0000