summaryrefslogtreecommitdiff
path: root/drivers
Commit message (Collapse)AuthorAgeLines
...
| | * | | power: Explicitly select pmic device's busAaron Durbin2014-05-28-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current pmic i2c code assumes the current i2c bus is the same as the pmic device's bus. There is nothing ensuring that to be true. Therefore, select the proper bus before performing a transaction. Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | power: Add support for TPS65090 PMU chip.Tom Wai-Hong Tam2014-05-28-0/+311
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | power: Add PMIC_ prefix to CHARGER_EN/DISABLESimon Glass2014-05-28-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enum should be common across all PMICs rather than having it independently defined with the same name in multiple places. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | power: Rename CONFIG_PMIC_... to CONFIG_POWER_...Simon Glass2014-05-28-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit be3b51aa did this mostly, but several have been added since. Do the job again. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | mmc: s5p_sdhci: add the s5p_sdhci_core_init functionJaehoon Chung2014-05-16-25/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To reuse the code, added the s5p_sdhci_core_init function. Before applied this patch, didn't use the 8-bit mode at exynos baord. Because it didn't set "MMC_MODE_8BIT". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | mmc: exynos_dw_mmc: enable the DDR modeJaehoon Chung2014-05-16-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the ddr mode capability by default. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | mmc: dw_mmc: support the DDR modeJaehoon Chung2014-05-16-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support the DDR mode at dw-mmc controller Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | mmc: support the DDR mode for eMMCJaehoon Chung2014-05-16-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | mmc: remove the unnecessary define and fix the wrong bit controlJaehoon Chung2014-05-16-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Lukasz Majeski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | mmc: exynos_dw_mmc: restore the property into hostJaehoon Chung2014-05-16-73/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Restore the platdata(property of dt) into host struct. Then data's information is maintained and reused anywhere. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-06-05-33/+112
|\ \ \ \ \
| * | | | | driver/ddr/fsl: Fix printing unspecified module info for DDR4York Sun2014-06-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The offset of module information is at 128, different from DDR3. Signed-off-by: York Sun <yorksun@freescale.com>
| * | | | | powerpc/mpc85xx: Add workaround for DDR erratum A004508York Sun2014-06-05-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the DDR controller is initialized below a junction temperature of 0°C and then operated above a junction temperature of 65°C, the DDR controller may cause receive data errors, resulting ECC errors and/or corrupted data. This erratum applies to the following SoCs and their variants: MPC8536, MPC8569, MPC8572, P1010, P1020, P1021, P1022, P1023, P2020. Signed-off-by: York Sun <yorksun@freescale.com>
| * | | | | powerpc/espi: remove 80us delay to improve transfer performanceHou Zhiqiang2014-06-05-32/+106
| | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace 80 mircoseconds delay with polling flag ESPI_EV_TXE. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | | | phy: fix create_phy_by_mask for when its given an actual search maskCormier, Jonathan2014-06-05-3/+1
|/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | get_phy_id returns -EIO when it can't read from a phy at a given addr. This would cause create_phy_by_mask to return prematurely before it had tested the other addresses in the provided mask. Example usage: Replace phydev = phy_connect(bus, phy_addr, dev, phy_if) with phydev = phy_find_by_mask(bus, phy_mask, phy_if) if (phydev) phy_connect_dev(phydev, dev); Signed-off-by: Cormier, Jonathan <jcormier@criticallink.com> Cc: Joe Hershberger <joe.hershberger@gmail.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-05-30-22/+536
|\ \ \ \ | |/ / /
| * | | mmc: atmel_mci: fix print incorrect buffer content for debugWu, Josh2014-05-27-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> [fix checkpatch line length warning] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | | gpio: at91: add sanity check for the NULL pointerWu, Josh2014-05-27-1/+2
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | We need check the NULL pointer as at91_pio_get_port() may return NULL. Also print a error message when at91_pio_get_port() failed otherwise we cannot notice the failure. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | net/designware: Make DMA burst length configurable and reduce by defaultIan Campbell2014-05-25-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The correct value for this setting can vary across SoCs and boards, so make it configurable. Also reduce the default value to 8, which is the same default as used in the Linux driver. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Cc: Alexey Brodkin <abrodkin@synopsys.com>
| * | net/designware: reorder struct dw_eth_dev to pack more efficiently.Ian Campbell2014-05-25-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Thu, 2014-05-08 at 22:26 +0100, Ian Campbell wrote: > The {r,t}xbuffs fields also need to be aligned. Previously this was done > implicitly because they immediately followed the descriptor tables. Make this > explicit and also move to the head of the struct. Looks like I managed to not actually commit the move of the field to the head of the struct! v3.1 follows.... Ian. 8<------------ >From 2937ba01841887317f6792709ed57cb86b5fc0cd Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Thu, 1 May 2014 19:45:15 +0100 Subject: [PATCH] net/designware: reorder struct dw_eth_dev to pack more efficiently. The {tx,rx}_mac_descrtable fields are aligned to ARCH_DMA_MINALIGN, which could be 256 or even larger. That means there is a potentially huge hole in the struct before those fields, so move them to the front where they are better packed. Moving them to the front also helps ensure that so long as dw_eth_dev is properly aligned (which it is since "net/designware: ensure device private data is DMA aligned.") the {tx,rx}_mac_descrtable will be too, or at least avoids having to worry too much about compiler specifics. The {r,t}xbuffs fields also need to be aligned. Previously this was done implicitly because they immediately followed the descriptor tables. Make this explicit and also move to the head of the struct. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Cc: Alexey Brodkin <abrodkin@synopsys.com> Tested-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
| * | net/designware: ensure cache invalidations are aligned to ARCH_DMA_MINALIGNIan Campbell2014-05-25-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is required at least on ARM. When sending instead of simply invalidating the entire descriptor, flush as little as possible while still respecting ARCH_DMA_MINALIGN, as requested by Alexey. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Cc: Alexey Brodkin <abrodkin@synopsys.com>
| * | net/designware: ensure device private data is DMA aligned.Ian Campbell2014-05-25-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct dw_eth_dev contains fields which are accessed via DMA, so make sure it is aligned to a dma boundary. Without this I see: ERROR: v7_dcache_inval_range - start address is not aligned - 0x7fb677e0 Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com> Acked-by: Marek Vasut <marex@denx.de>
| * | sunxi: mmc supportIan Campbell2014-05-25-0/+504
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote: > > + case 1: > > +#if CONFIG_MMC1_PG > Are you sure that this is correct and shouldn't be: > > +#ifdef CONFIG_MMC1_PG > > ? It's "correct" in so far as it works (the boards.cfg config stuff #defines things to 1), but I think you are right that it isn't the preferred style. But... > A quick scan through this patch series shows that this define > is not set at all. Perhaps its outdated? Or is it used to support > some other sunxi SoC? Not sure, perhaps it should be removed for > now. ...I had thought that it was to support some other board which wasn't being upstreamed right now, so eventually useful and harmless for now, but I've just checked and it isn't actually used by any of the boards in u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it. Rather than resend the entire series, here is v5.1 of this patch. > Other than this please add my: > > Reviewed-by: Stefan Roese <sr@denx.de> Thanks! 8<--------------------------------- >From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Fri, 7 Mar 2014 04:29:39 +0000 Subject: [PATCH v5.1 7/8] sunxi: mmc support This adds support for the MMC controller on the Allwinner A20 (sun7i) processor. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Cc: Aaron Maoye <leafy.myeh@allwinnertech.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | Add cli_ prefix to readline functionsSimon Glass2014-05-29-3/+4
| | | | | | | | | | | | | | | | | | This makes it clear where the code resides. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | move CLI prototypes to cli.h and add commentsSimon Glass2014-05-29-0/+1
| | | | | | | | | | | | | | | | | | | | | Move the CLI prototypes from common.h to cli.h as part of an effort to reduce the size of common.h. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: rename device struct to udeviceHeiko Schocher2014-05-27-75/+76
|/ / | | | | | | | | | | | | | | | | | | | | | | using UBI and DM together leads in compiler error, as both define a "struct device", so rename "struct device" in include/dm/device.h to "struct udevice", as we use linux code (MTD/UBI/UBIFS some USB code,...) and cannot change the linux "struct device" Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Marek Vasut <marex@denx.de>
* | Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'Albert ARIBAUD2014-05-23-0/+105
|\ \
| * | ARM: zynq: ehci: Added USB host driver supportMichal Simek2014-05-14-0/+105
| | | | | | | | | | | | | | | | | | | | | Added USB host driver for zynq. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | esdhc/usdhc: Fix warning when CONFIG_SYS_FSL_ESDHC_USE_PIO is not setTom Rini2014-05-23-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | In 7168977 we made calls to check_and_invalidate_dcache_range() conditional on !CONFIG_SYS_FSL_ESDHC_USE_PIO. Only define this function in this case as well. Signed-off-by: Tom Rini <trini@ti.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2014-05-23-16/+366
|\ \ \
| * | | mmc: provide a select_hwpart implementation for get_device()Stephen Warren2014-05-23-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables specifying which eMMC HW partition to target for any U-Boot command that uses the generic get_partition() function to parse its command-line arguments. Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | | eMMC: add support for operations in RPMB partitionPierre Aubert2014-05-23-0/+324
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds functions for read, write and authentication key programming for the Replay Protected Memory Block partition in the eMMC. Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
| * | | mmc: Handle switch error status bit in MMC card statusAndrew Gabbasov2014-05-23-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MMC switch command for unsupported feature (e.g. bus width) sets a switch error bit in card status. This bit should be checked, and, if it's set, no access with new controller settings should be performed. Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
| * | | mmc: postponed needless timer initializationMateusz Zalega2014-05-23-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mmc_init() doesn't call get_timer() anymore if MMC is already initialized. <panto> Minor formatting fix. Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
| * | | esdhc/usdhc: Fix PIO mode bug in fsl_esdhc driverYe.Li2014-05-22-14/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When configure the fsl_esdhc driver to PIO mode by defining "CONFIG_SYS_FSL_ESDHC_USE_PIO", the SD/MMC read and write will fail. Two bugs in the driver to cause the issue: 1. The read buffer was invalidated after reading from DATAPORT register, which should be only applied to DMA mode. The valid data in cache was overwritten by physical memory. 2. The watermarks are not set in PIO mode, will cause according state not be set. Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* | | | Merge branch 'fpga' of git://www.denx.de/git/u-boot-microblazeTom Rini2014-05-22-23/+153
|\ \ \ \
| * | | | fpga: Added support to load bit stream from SD/MMCSiva Durga Prasad Paladugu2014-05-20-0/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added support to load a bitstream image in chunks by reading it in chunks from SD/MMC. Command format: loadfs [dev] [address] [image size] [blocksize] <interface> [<dev[:part]>] <filename> Example: fpga loadfs 0 1000000 3dbafc 4000 mmc 0 fpga.bin Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | fpga: zynqpl: Clean partial bitstream handlingMichal Simek2014-05-20-12/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not do partial bitstream detection based on bitstream size and use bitstream_type argument which is passed from the fpga core. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | fpga: Define bitstream type based on command selectionMichal Simek2014-05-20-12/+19
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up partial, full and compressed bitstream handling. U-Boot supports full bitstream loading and partial based on detection which is not 100% correct. Extending fpga_load/fpga_loadbitstream() with one more argument which stores bitstream type. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-05-22-40/+356
|\ \ \ \
| * \ \ \ Merge remote-tracking branch 'u-boot/master'Albert ARIBAUD2014-05-20-369/+344
| |\ \ \ \ | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: boards.cfg Conflicts were trivial once u-boot-arm/master boards.cfg was reformatted (commit 6130c146) to match u-boot/master's own reformatting (commit 1b37fa83).
| * | | | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-05-16-1/+156
| |\ \ \ \
| | * \ \ \ Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-05-15-3159/+2638
| | |\ \ \ \
| | * | | | | video: Add support for imx25 lcd controllerThomas Diener2014-05-09-0/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the imx25 lcd display controller. Signed-off-by: Thomas Diener <dietho@gmx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
| | * | | | | power: Add support for LTC3676 PMICTim Harvey2014-05-09-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LTC3676 PMIC includes four DC/DC converters, and three 300mA LDO Regulators (two Adjustable). The DC/DC converters are adjustable based on a resistor devider (board-specific). This adds support for the LTC3676 by creating a namespace unique init function that uses the PMIC API to allocate a pmic and defines the registers. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Stefano Babic <sbabic@denx.de>
| | * | | | | power: make pfuze100 be able to coexist with other pmicsTim Harvey2014-05-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid uding pmic_init() as this forces the model of only allowing a single PMIC driver to be built at a time. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | | | | | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-05-16-1/+1
| |\ \ \ \ \ \ | | |_|_|_|_|/ | |/| | | | |
| | * | | | | mtd: nand: omap_gpmc: Fix update of read_ecc in oobBelisko Marek2014-05-13-1/+1
| | | |/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to flip only one bit not assign. Signed-off-by: Marek Belisko <marek.belisko@gmail.com> Acked-by: Pekon Gupta <pekon@ti.com>
| * | | | | Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'Albert ARIBAUD2014-05-15-5/+28
| |\ \ \ \ \
| | * | | | | ARM: tegra: add GPIO initialization table functionStephen Warren2014-05-13-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The HW-defined procedure for booting Tegra requires that some pins be set up as GPIOs immediately at boot in order to avoid glitches on those pins, when the pinmux is programmed. Add a feature to the GPIO driver which executes a GPIO configuration table. Board files will use this to implement the correct HW initialization procedure. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit v1.1 at 2024-09-19 14:07:01 +0000