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* | mmc: sdhci: disable the 8bit mode when host doesn't support itJaehoon Chung2017-01-11-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Buswidth is depeneded on Hardware schematic. Evne though host can support the 8bit buswidth, if hardware doesn't support 8bit mode, it doesn't work fine. So the buswidth mode selection leaves a matter in each SoC drivers. On the contrary to this, hardware supports 8bit mode, but host doesn't support it. then controller has to disable the MMC_MODE_8BIT. (Host can check whether 8bit mode is supported or not, since V3.0) Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
* | Merge git://git.denx.de/u-boot-dmTom Rini2017-01-10-15/+174
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| * | drivers: usb: gadget: ether/rndis: convert driver to adopt device driver modelMugunthan V N2017-01-09-15/+174
| |/ | | | | | | | | | | Adopt usb ether gadget and rndis driver to adopt driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2017-01-10-1/+1
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| * spl: sunxi: Fix build error with CONFIG_SPL_SPI_SUNXIPriit Laes2017-01-04-1/+1
| | | | | | | | | | | | | | Fix typo introduced in ebc4ef61d76fc182773fe225151adc9b913c62eb Signed-off-by: Priit Laes <plaes@plaes.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2017-01-04-2/+2
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| * | pci: kconfig: fix spelling in descriptionMarcel Ziswiler2017-01-03-1/+1
| | | | | | | | | | | | | | | | | | | | | Fix 'driver model' rather than 'driver mode' in description. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | video: tegra: fix spelling in commentMarcel Ziswiler2017-01-03-1/+1
| |/ | | | | | | | | | | | | Get rid of spurious 'are' in the comment. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2017-01-04-13/+37
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| * | mtd: nand: mxs_nand_spl: Fix to remove twise 'NAND' printJagan Teki2017-01-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPL from nand will print 'NAND' in boot_from_devices based on the image_loader name, remove the extra 'NAND ' in mxs_nand_spl driver. Original behaviour: ------------------- U-Boot SPL 2017.01-rc2-gf84dd8b (Jan 02 2017 - 22:24:19) Trying to boot from NANDNAND : 512 MiB After the fix: ------------- U-Boot SPL 2017.01-rc2-gf84dd8b-dirty (Jan 02 2017 - 23:17:00) Trying to boot from NAND: 512 MiB Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
| * | spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possibleVignesh R2017-01-04-6/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to Section 11.15.4.9.1 Indirect Read Controller of K2G SoC TRM SPRUHY8D[1], the external master is only permitted to issue 32-bit data interface reads until the last word of an indirect transfer So, make sure that QSPI indirect reads are 32 bit sized except for the final read. If the rxbuf is unaligned then use bounce buffer, so that readsl() can be used instead of readsb() to avoid non 32-bit accesses. [1]www.ti.com/lit/ug/spruhy8d/spruhy8d.pdf Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possibleVignesh R2017-01-04-6/+20
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to Section 11.15.4.9.2 Indirect Write Controller of K2G SoC TRM SPRUHY8D[1], the external master is only permitted to issue 32-bit data interface writes until the last word of an indirect transfer otherwise indirect writes is known to fails sometimes. So, make sure that QSPI indirect writes are 32 bit sized except for the last write. If the txbuf is unaligned then use bounce buffer to avoid data aborts. So, now that the driver uses bounce_buffer, enable CONFIG_BOUNCE_BUFFER for all boards that use Cadence QSPI driver. [1]www.ti.com/lit/ug/spruhy8d/spruhy8d.pdf Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLSYork Sun2017-01-04-64/+64
| | | | | | | | | | | | | | | | These two macros are used for the same thing, the total number of DDR controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and merge existing usage. Signed-off-by: York Sun <york.sun@nxp.com>
* | ddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to KconfigYork Sun2017-01-04-0/+14
| | | | | | | | | | | | | | | | Use option NUM_DDR_CONTROLLERS in ddr Kconfig and clean up existing usage in ls102xa and fsl-layerscape. Remove all powerpc macros in config header and board header files. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to KconfigYork Sun2017-01-04-0/+15
| | | | | | | | | | | | Use Kconfig to select errata workaround. Signed-off-by: York Sun <york.sun@nxp.com>
* | mmc: move CONFIG_SYS_FSL_ERRATUM_ESDHC* to KconfigYork Sun2017-01-04-0/+12
| | | | | | | | | | | | | | | | | | | | Add option SYS_FSL_ERRATUM_ESDHC111, SYS_FSL_ERRATUM_ESDHC13, SYS_FSL_ERRATUM_ESDHC135, SYS_FSL_ERRATUM_ESDHC_A001 to mmc Kconfig. Move existing macros to related Kconfig. Signed-off-by: York Sun <york.sun@nxp.com> [trini: Migrate bk4r1] Signed-off-by: Tom Rini <trini@konsulko.com>
* | arm: layerscape: Move CONFIG_SYS_FSL_ERRATUM_* to KconfigYork Sun2017-01-04-0/+21
| | | | | | | | | | | | Use Kconfig to select errata workaround. Signed-off-by: York Sun <york.sun@nxp.com>
* | fsl_ddr: Move DDR config options to driver KconfigYork Sun2017-01-04-1/+125
| | | | | | | | | | | | | | | | | | Create driver/ddr/fsl/Kconfig and move existing options. Clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com> [trini: Migrate sbc8641d, xpedite537x and MPC8536DS, run a moveconfig.py -s] Signed-off-by: Tom Rini <trini@konsulko.com>
* | powerpc: mpc85xx: Remove variant SoCs T1020/T1022/T1013/T1014York Sun2017-01-04-2/+0
| | | | | | | | | | | | | | Remove these SoCs from Kconfig because they don't have individual configuration. Clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* | crypto: Move CONFIG_SYS_FSL_SEC_LE and _BE to KconfigYork Sun2017-01-04-0/+6
| | | | | | | | | | | | | | Use Kconfig option to set little- or big-endian access to secure boot and trust architecture. Signed-off-by: York Sun <york.sun@nxp.com>
* | crypto: Move SYS_FSL_SEC_COMPAT into driver KconfigYork Sun2017-01-04-0/+33
|/ | | | | | | Instead of define CONFIG_SYS_FSL_SEC_COMPAT in header files for PowerPC and ARM SoCs, move it to Kconfig under the driver. Signed-off-by: York Sun <york.sun@nxp.com>
* imx: thermal: Kconfig: add MX7Peng Fan2017-01-02-1/+1
| | | | | | | The thermal drivers support i.MX6 and i.MX7, add MX7 in Kconfig file. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* mmc: move MMC_SDHCI_IO_ACCESSORS to KconfigMasahiro Yamada2016-12-29-0/+8
| | | | | | | | | | This is a user-unconfigurable option that is selected by the drivers that need to overwrite SDHCI IO memory accessors. (BCM2835 SDHCI seems the only driver that needs to do so.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* mmc: move some SDHCI related options to KconfigMasahiro Yamada2016-12-29-10/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While I moved the options, I also renamed them so that they are all prefixed with MMC_SDHCI_. This commit was created in the following steps. [1] Rename with the following command find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \ -type f -print | xargs sed -i -e ' s/CONFIG_MMC_SDMA/CONFIG_MMC_SDHCI_SDMA/g s/CONFIG_BCM2835_SDHCI/CONFIG_MMC_SDHCI_BCM2835/g s/CONFIG_KONA_SDHCI/CONFIG_MMC_SDHCI_KONA/g s/CONFIG_MV_SDHCI/CONFIG_MMC_SDHCI_MV/g s/CONFIG_S5P_SDHCI/CONFIG_MMC_SDHCI_S5P/g s/CONFIG_SPEAR_SDHCI/CONFIG_MMC_SDHCI_SPEAR/g ' [2] create the Kconfig entries in drivers/mmc/Kconfig [3] Move the options by the following command tools/moveconfig.py -y MMC_SDHCI_SDMA MMC_SDHCI_BCM2835 \ MMC_SDHCI_KONA MMC_SDHCI_MV MMC_SDHCI_S5P MMC_SDHCI_SPEAR [4] Sort drivers/mmc/Makefile for readability Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* mmc: move CONFIG_SDHCI to Kconfig, renaming to CONFIG_MMC_SDHCIMasahiro Yamada2016-12-29-1/+17
| | | | | | | | | | | | | | | | | | | | | | | Move CONFIG_SDHCI to Kconfig and rename it to CONFIG_MMC_SDHCI. My motivation for the rename is, ultimately, to make all the MMC options prefixed with MMC_ and SDHCI options with MMC_SDHCI_, like Linux. This commit was created as follows: [1] Rename the config option with the following command: find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \ -type f -print | xargs sed -i -e 's/CONFIG_SDHCI/CONFIG_MMC_SDHCI/g' [2] create the entry for MMC_SDHCI in drivers/mmc/Kconfig [3] run "tools/moveconfig.py -y MMC_SDHCI" [4] add "depends on MMC_SDHCI" to existing SDHCI driver entries Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* mmc: make MMC driver entries dependent on MMCMasahiro Yamada2016-12-29-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, CONFIG_MMC is not related to any other options by "depends on" or "select". One of big advantages of using Kconfig is automatic dependency tracking, but the current state is lacking it. As the first step, make the existing MMC driver entries depend on MMC. This commit was created by the following steps: [1] Run the following script: --------------------8<-------------------- rm -f tmp.txt for d in $(find . -path './configs/*_defconfig') do if grep -q -e 'CONFIG_MSM_SDHCI=y' $d || grep -q -e 'CONFIG_ATMEL_SDHCI=y' $d || grep -q -e 'CONFIG_ROCKCHIP_DWMMC=y' $d || grep -q -e 'CONFIG_SH_SDHI=y' $d || grep -q -e 'CONFIG_PIC32_SDHCI=y' $d || grep -q -e 'CONFIG_ZYNQ_SDHCI=y' $d || grep -q -e 'CONFIG_ROCKCHIP_SDHCI=y' $d || grep -q -e 'CONFIG_MMC_UNIPHIER=y' $d || grep -q -e 'CONFIG_SANDBOX_MMC=y' $d then echo CONFIG_MMC=y >> $d echo ${d#./configs/} >> tmp.txt fi done tools/moveconfig.py -y -s -d tmp.txt rm tmp.txt --------------------8<-------------------- [2] surround MMC driver entries with "if MMC" and "endif" Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* mmc: complete unfinished move of CONFIG_MMCMasahiro Yamada2016-12-29-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | Commit 7a777f6d6f35 ("mmc: Add generic Kconfig option") created a Kconfig entry for this option without any actual moves, then commit 44c798799f66 ("sunxi: Use Kconfig CONFIG_MMC") moved instances only for SUNXI. We generally do not like such partial moves. This kind of work is automated by tools/moveconfig.py, so it is pretty easy to complete this move. I am adding "default ARM || PPC || SANDBOX" (suggested by Tom). This shortens the configs and will ease new board porting. This commit was created as follows: [1] Edit Kconfig (remove the "depends on", add the "default", copy the prompt and help message from Linux) [2] Run 'tools/moveconfig.py -y -s -r HEAD MMC' Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* Update Maintainer and Author's email addressAjay Bhargav2016-12-27-6/+6
| | | | | | | | I am not longer using my old email address "ajay.bhargav@einfochips.com". For U-Boot development email address is now updated to contact@8051projects.net Signed-off-by: Ajay Bhargav <contact@8051projects.net>
* timer: Support clocks via phandleZakharov Vlad2016-12-27-3/+14
| | | | | | | | | | | | | Earlier timer driver needed a clock-frequency property in compatible device-tree nodes. Another way is to reference a clock via a phandle. So now timer_pre_probe tries to get clock by reference through device tree. In case it is impossible to get clock device through the reference, clock-frequency property of the timer node is read to provide backward compatibility. Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* regulator: fixed: Add support to handle enable-active-high DT propertyVignesh R2016-12-27-1/+6
| | | | | | | | | Add support to handle enable-active-high DT property. This property is used to drive the gpio controlling fixed regulator as active high when claiming gpio line. Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2016-12-23-295/+0
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| * spi: Zap armada100_spi.c and envJagan Teki2016-12-21-204/+0
| | | | | | | | | | | | | | | | armada100_spi.c and related env is zapping becuase of "no DM conversion". Cc: Ajay Bhargav <ajay.bhargav@einfochips.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
| * spi: Zap mpc52xx_spi.c, config and related codeJagan Teki2016-12-21-91/+0
| | | | | | | | | | | | | | | | | | armada100_spi.c, related config options and related codes are zapping becuase of "no DM conversion". Cc: Werner Pfister <Pfister_Werner@intercontrol.de> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini2016-12-23-0/+69
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| * | power: pmic: add the max8998 controller for DMJaehoon Chung2016-12-22-0/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the max8998 controller for Driver model. Samsung S5P series are using max8998 pmic controller. In future, it should be supported the regulator framework. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | mmc: Extend dependencies for zynq sdhciMichal Simek2016-12-22-1/+1
| | | | | | | | | | | | | | | | | | | | | There is hard dependency on BLK and DM_MMC which is also used by ATMEL and ROCKCHIP. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | mmc: spear: remove the entire spear_sdhci.c fileJaehoon Chung2016-12-22-28/+0
|/ / | | | | | | | | | | | | | | | | Remove the entire spear_sdhci.c file. There is no use case. This is dead codes. Also there is no place to call "spear_sdhci_init()" anywhere. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-12-20-18/+115
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| * | gpio: zynq: Remove empty lineMichal Simek2016-12-20-1/+0
| | | | | | | | | | | | | | | | | | Trivial coding style fix. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | block: Move ceva driver to DMMichal Simek2016-12-20-2/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch also includes ARM64 zynqmp changes: - Remove platform non DM initialization - Remove hardcoded sata base address Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | dm: Add support for scsi/sata based devicesMichal Simek2016-12-20-9/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All sata based drivers are bind and corresponding block device is created. Based on this find_scsi_device() is able to get back block device based on scsi_curr_dev pointer. intr_scsi() is commented now but it can be replaced by calling find_scsi_device() and scsi_scan(). scsi_dev_desc[] is commented out but common/scsi.c heavily depends on it. That's why CONFIG_SYS_SCSI_MAX_DEVICE is hardcoded to 1 and symbol is reassigned to a block description allocated by uclass. There is only one block description by device now but it doesn't need to be correct when more devices are present. scsi_bind() ensures corresponding block device creation. uclass post_probe (scsi_post_probe()) is doing low level init. SCSI/SATA DM based drivers requires to have 64bit base address as the first entry in platform data structure to setup mmio_base. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | net: xilinx: Use mdio_register_seq() to support multiple instancesMichal Simek2016-12-20-6/+3
| |/ | | | | | | | | | | | | | | | | | | | | | | axi_emac, emaclite and gem have the same issue with registering multiple instances with mdio busses. mdio bus name has to be uniq but drivers are setting up only one name for all. Use mdio_register_seq() and pass dev->seq number to allow multiple mdio instances registration. Reported-by: Phani Kiran Kara <phanikiran.kara@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2016-12-20-2/+2
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| * i2c: mv_i2c.c: Correct address endiannessBradley Bolen2016-12-19-2/+2
| | | | | | | | | | | | | | | | | | | | 0c0f719ad2f46c8566a56daee37ebdb7c078c3b1 accidentally changed the endianness of the i2c read and write addresses. This was noticable when accessing EEPROMs that use 2 byte addressing as the LSB was being sent first. Signed-off-by: Bradley Bolen <bradleybolen@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
* | serial: 16550: Add Ingenic JZ4780 supportMarek Vasut2016-12-19-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Add compatibility string for the Ingenic JZ4780 SoC, the necessary UART enable bit into FCR and register shift. Neither are encoded in the DTS coming from Linux, so we need to support it this way. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | serial: 16550: Add port type as driver dataMarek Vasut2016-12-19-10/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver data to each compatible string to identify the type of the port. Since all the ports in the driver are entirely compatible with 16550 for now, all are marked with PORT_NS16550. But, there are ports which have specific quirks, like the JZ4780 UART, which do not have any DT property to denote the quirks. Instead, Linux uses the compatible string to discern such ports and enable the necessary quirks. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org>
* | serial: 16550: Add getfcr accessorMarek Vasut2016-12-19-2/+16
| | | | | | | | | | | | | | | | | | | | | | Add function which allows fetching the default FCR register setting from platform data for DM , while retaining old behavior for non-DM by returning UART_FCRVAL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-12-18-185/+437
|\ \ | |/ |/| | | | | | | Migrate CONFIG_ARCH_USE_MEMSET/MEMCPY with this merge. Signed-off-by: Tom Rini <trini@konsulko.com>
| * i2c: mxc: Make 'no gpio pinctrl state' print as debugJagan Teki2016-12-16-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some I2C bus devicetree nodes, doesn't require to have gpio pinctrl so replace the dev_info to debug so the print never comes on the console and for bus that uses gpio pinctrl anyway have dev_err. Before: ------ U-Boot> i2c dev 1 Setting bus to 1 i2c bus 1 at 0x21a4000, no gpio pinctrl state. After: ------ U-Boot> i2c dev 1 Setting bus to 1 Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Heiko Schocher <hs@denx.de>
| * i2c: mxc: Print hex instead of decimal for bus addressJagan Teki2016-12-16-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Better to print the hex value for bus address instead of decimal, for more readbility on bus addressing. Before: ------ U-Boot> i2c dev 1 Setting bus to 1 i2c bus 1 at 35274752, no gpio pinctrl state. After: ------ U-Boot> i2c dev 1 Setting bus to 1 i2c bus 1 at 0x21a4000, no gpio pinctrl state. Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Heiko Schocher <hs@denx.de>