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* scsi/ahci: add support for non-PCI controllersRob Herring2011-07-26-8/+62
| | | | | | | Add support for AHCI controllers that are not PCI based. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Wolfgang Denk <wd@denx.de>
* scsi/ahci: ata id little endian fixRob Herring2011-07-26-1/+1
| | | | | | The ata id string always needs swapping, not just on BE machines. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* andes_spi: add andes_spi interfaceMacpaul Lin2011-07-25-0/+431
| | | | | | | | | andes_spi is an spi interface developed by Andes Tech. Signed-off-by: Macpaul Lin <macpaul@andestech.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* net: designware: fix uninitialized phy_addr usageMike Frysinger2011-07-25-0/+2
| | | | | | | | | | | | When CONFIG_DW_SEARCH_PHY is disabled, the local phy_addr variable never gets initialized which causes random behavior at runtime and a gcc warning. So set it by default to the stored phy address. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Vipin Kumar <vipin.kumar@st.com> Fix commit message. Signed-off-by: Wolfgang Denk <wd@denx.de>
* net: designware: fix unused warning when CONFIG_DW_AUTONEG is enabledMike Frysinger2011-07-25-1/+3
| | | | | | | | The ctrl variable is only used when autoneg support is disabled, so only declare it under those conditions to avoid an unused variable warning. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mmcWolfgang Denk2011-07-19-6/+2025
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mmc: mmc: rescan fails on empty slot AT91:mmc:fix multiple read/write error mmc: Access mode validation for eMMC cards > 2 GiB mmc: sh_mmcif: add support for Renesas MMCIF mmc: fix the condition for MMC version 4 MMC: add marvell sdhci driver MMC: add sdhci generic framework MMC: add erase function to both mmc and sd MMC: unify mmc read and write operation mmc: Tegra2: Enable SD/MMC driver for Seaboard and Harmony mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3
| * AT91:mmc:fix multiple read/write errorelen.song2011-07-15-1/+12
| | | | | | | | | | | | | | According to datasheet,set block count before multiple read/write. Signed-off-by: elen.song <elen.song@atmel.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * mmc: Access mode validation for eMMC cards > 2 GiBŁukasz Majewski2011-07-15-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides handling of the two way handshake when SEND_OP_COND (CMD1) is send to mmc card. It is necessary to inform eMMC card if the host can work with high capacity cards (Jedec JESD84-A441, point 7.4.3). The extra flag MMC_MODE_HC (high capacity) is added to indicate if the host is capable of handling the high capacity eMMC cards. Since this change is added to the generic mmc framework, then it requires other boards to indicate if their mmc controllers can handle high capacity cards. As it is now - the old behaviour of the framework is preserved. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: sh_mmcif: add support for Renesas MMCIFYoshihiro Shimoda2011-07-15-0/+847
| | | | | | | | | | | | | | Some Renesas SuperH have MMCIF module. This driver supports it. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * mmc: fix the condition for MMC version 4Yoshihiro Shimoda2011-07-15-4/+11
| | | | | | | | | | | | | | | | | | | | Fix the problem that if we use the chip of MMC version 4 and the capacity is smaller than 2GB or equal, the mmc->capacity is invalid. According to the JEDEC Standard, the value of ext_csd's capacity is valid if the value is more than 2GB. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * MMC: add marvell sdhci driverLei Wen2011-07-15-0/+22
| | | | | | | | | | | | | | | | | | This could support both armada100 and pantheon serial in the mainline, while this driver also be tested to support upcoming mg, mmp2 and mmp3 hardware. Signed-off-by: Lei Wen <leiwen@marvell.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * MMC: add sdhci generic frameworkLei Wen2011-07-15-0/+434
| | | | | | | | | | | | | | | | | | Nowdays, there are plenty of mmc driver in uboot adopt the sd standard host design, aka as sdhci. It is better to centralize the common logic together to better maintenance. Signed-off-by: Lei Wen <leiwen@marvell.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * MMC: add erase function to both mmc and sdLei Wen2011-07-15-0/+102
| | | | | | | | | | | | | | | | | | | | | | Erase is a very basic function since the begin of sd specification is announced. Although we could write a bulk of full 0xff memory to the range to take place of erase, it is more convenient and safe to implement the erase function itself. Signed-off-by: Lei Wen <leiwen@marvell.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
| * mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3Tom Warren2011-07-15-0/+592
| | | | | | | | | | Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Andy Fleming <afleming@freescale.com>
* | MX31: Cleanup clock functionStefano Babic2011-07-18-2/+0
| | | | | | | | | | | | | | The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | Timer: Fix misuse of ARM *timer_masked() functions outside arch/armGraeme Russ2011-07-16-10/+13
| | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | imx: Add support for USB EHCI on imx25Matthias Weisser2011-07-14-8/+25
|/ | | | | | | Adding support for USB host on imx25 using the internal PHY. Changing the name of base address define for imx31 to get some unification. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* fsl_dma: fix support for 83xx DMA engineIra W. Snyder2011-07-06-0/+2
| | | | | | | | | | | | | Commit 359ec4931944adb885882deb9b781e4095eabc94 broke support for the Freescale DMA engine on the 83xx parts. This is due to using registers which do not exist on 83xx. Remove the attribute register accesses from the 83xx build. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Cc: York Sun <yorksun@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* driver/serial: delete at91rm9200_usartAndreas Bießmann2011-07-04-127/+0
| | | | | | The at91rm9200_usart driver could be fully replaced by atmel_usart driver. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* GPIO: Tegra2: add GPIO driver for Tegra2Tom Warren2011-07-04-0/+256
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* NAND: Add 16bit NAND support for the NDFCAlex Waterman2011-07-01-4/+29
| | | | | | | | | | | | | | | | | | | This patch adds support for 16 bit NAND devices attached to the NDFC on ppc4xx processors. Two config entries were added: CONFIG_SYS_NDFC_16 - Setting this tells the NDFC that a 16 bit device is attached. CONFIG_SYS_NDFC_EBC0_CFG - This is for the External Bus Controller configuration register. Also, a new ndfc_read_byte() function was added which does not first convert the data to little endian. The NAND SPL was also modified to do 16bit bad block testing when a 16 bit chip is being used. Signed-off-by: Alex Waterman <awaterman@dawning.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_util: drop trailing all-0xff pages if requestedBen Gardiner2011-07-01-3/+37
| | | | | | | | | | | | | | | | | | | | Add a flag to nand_read_skip_bad() such that if true, any trailing pages in an eraseblock whose contents are entirely 0xff will be dropped. The implementation is via a new drop_ffs() function which is based on the function of the same name from the ubiformat utility by Artem Bityutskiy. This is as-per the reccomendations of the UBI FAQ [1] [1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Artem Bityutskiy <dedekind1@gmail.com> Acked-by: Detlev Zundel <dzu@denx.de> CC: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_util: treat WITH_YAFFS_OOB as a modeBen Gardiner2011-07-01-0/+3
| | | | | | | | | | | | | When specified in the flags argument of nand_write, WITH_YAFFS_OOB causes an operation which is mutually exclusive with the 'usual' way of writing. Add a check that client code does not specify WITH_YAFFS_OOB along with any other flags and add a comment indicating that the WITH_YAFFS_OOB flag should not be mixed with other flags. Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_util: convert nand_write_skip_bad() to flagsBen Gardiner2011-07-01-4/+4
| | | | | | | | | | | | | | | | | | | | | | In a future commit the behaviour of nand_write_skip_bad() will be further extended. Convert the only flag currently passed to the nand_write_ skip_bad() function to a bitfield of only one allocated member. This should avoid an explosion of int's at the end of the parameter list or the ambiguous calls like nand_write_skip_bad(info, offset, len, buf, 0, 1, 1); nand_write_skip_bad(info, offset, len, buf, 0, 1, 0); Instead there will be: nand_write_skip_bad(info, offset, len, buf, WITH_YAFFS_OOB | WITH_OTHER); Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Acked-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_base: trivial: fix comment read/write commentBen Gardiner2011-07-01-1/+1
| | | | | | | | Replace an incorrect 'read' with 'write' in a comment. Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Acked-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* cfi_flash: reverse geometry for newer STM partsMike Frysinger2011-06-29-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | For newer STM parts where CFI >= 1.1, there is a byte in the extended structure that declares the flash layout type (just like the AMD parts), so key off of that to find out when we need to reverse the geometry. This can be seen with M29W640 parts where U-Boot does: Bank # 1: CFI conformant FLASH (16 x 16) Size: 8 MB in 135 Sectors AMD Standard command set, Manufacturer ID: 0x20, Device ID: 0x22ED Erase timeout: 8192 ms, write timeout: 1 ms Buffer write timeout: 1 ms, buffer size: 16 bytes Sector Start Addresses: 20000000 RO 20002000 RO 20004000 RO 20006000 RO 20008000 RO 2000A000 RO 2000C000 RO 2000E000 RO 20010000 RO 20020000 RO ... But Linux does: physmap platform flash device: 00800000 at 20000000 physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank. Manufacturer ID 0x000020 Chip ID 0x0022ed physmap-flash.0: Swapping erase regions for top-boot CFI table. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Stefan Roese <sr@denx.de>
* usb: convert to partial linkingMike Frysinger2011-06-25-2/+2
| | | | | | Looks like this was missed during the conversion to partial linking. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* ehci-pci: Fix PCI EHCI driver for 36-bitZhao Chenhui2011-06-25-3/+2
| | | | | | | Convert the PCI base address into a virtual address. Signed-off-by: Zhao Chenhui <b35336@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com>
* musb: process control messages after roothub accepted itCliff Cai2011-06-25-2/+5
| | | | | | | | | | When dealing with non-multipoint devices, if the software root hub code accepted the message, then we still need to process it normally. So only return quickly when the root hub skipped the message or is otherwise in an error state. Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-06-23-425/+211
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: run arm_pci_init after relocation IXP42x PCI rewrite update/fix PDNB3 board update/fix IXDP425 / IXDPG425 boards add dvlhost (dLAN 200 AV Wireless G) board IXP NPE: add support for fixed-speed MII ports update/fix AcTux4 board update/fix AcTux3 board update/fix AcTux2 board update/fix AcTux1 board use -ffunction-sections / --gc-sections on IXP42x support CONFIG_SYS_LDSCRIPT on ARM fix "depend" target in npe directory Fix IXP code to work after relocation was added trigger hardware watchdog in IXP42x serial driver add support for IXP42x Rev. B1 and newer add XScale sub architecture (IXP/PXA) to maintainer list Conflicts: arch/arm/lib/board.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * IXP42x PCI rewriteMichael Schwingen2011-06-23-423/+206
| | | | | | | | | | | | | | | | clean up IXP PCI handling: get rid of IXP-private bus scan, BAR assign etc. code and use u-boot's PCI infrastructure instead. Move board-specific PCI setup code (clock/reset) to board directory. Signed-off-by: Michael Schwingen <michael@schwingen.org>
| * trigger hardware watchdog in IXP42x serial driverMichael Schwingen2011-06-23-2/+5
| | | | | | | | Signed-off-by: Michael Schwingen <michael@schwingen.org>
* | ARM: drop unsupported 'trab' boardWolfgang Denk2011-06-22-6/+0
|/ | | | | | | | | | The 'trab' board configuration is broken, and there is nobody who is interested and willing to fix it. Drop it. This includes support for VFD displays which have always been used by this board only. Signed-off-by: Wolfgang Denk <wd@denx.de>
* macb: fix compile warningandreas.devel@googlemail.com2011-06-21-2/+3
| | | | | | | | | | | This patch fixes following compile warning: ---8<--- macb.c: In function 'macb_write_hwaddr': macb.c:525:2: warning: dereferencing type-punned pointer will break strict-aliasing rules --->8--- Signed-off-by: Andreas Bießmann <andreas.devel@gmail.com>
* at91_emac: fix compile warningandreas.devel@googlemail.com2011-06-21-5/+7
| | | | | | | | | | | This patch removes the warning ---8<--- at91_emac.c: In function 'at91emac_write_hwaddr': at91_emac.c:487:2: warning: dereferencing type-punned pointer will break strict-aliasing rules --->8--- Signed-off-by: Andreas Bießmann <andreas.devel@gmail.com>
* ATMEL spi_dataflash driver - fix to build againReinhard Meyer2011-06-21-2/+1
| | | | | | | | The rework effort for ATMEL (AT91/AVR32) accidentially broke build of this driver. Fix this to make it build again. However this driver should be reworked as soon as possible! Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* update arm/at91rm9200 work with rework rework110202Jens Scharsig2011-06-21-16/+16
| | | | | | | | | | | * convert at91rm9200ek and eb_cpux9k2 board to ATMEL_xxx name scheme * Fix: timer.c compile error io.h not found with arm/at91rm9200 * update arm920t/at91 to ATMEL_xxx name scheme * update arm920t/at91 soc lib * update at91_emac driver Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> Tested-by: Andreas Bießmann <andreas.devel@gmail.com>
* mxc_spi.c: typo fixedHelmut Raiger2011-06-21-1/+1
| | | | Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
* sf: kick watchdog when pollingPatrick Sestier2011-06-01-0/+3
| | | | | | | | The status polling can take a while, so make sure we kick the watchdog after each successful poll. Signed-off-by: Patrick Sestier <psestier@mircom.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* I2C: Add driver for ST-Ericsson U8500 i2cMichael Brandt2011-06-01-0/+808
| | | | | Signed-off-by: John Rigby <john.rigby@linaro.org> CC: Heiko Schocher <hs@denx.de>
* mvgbe: enable configurability of PORT_SERIAL_CONTROL_VALUEValentin Longchamp2011-05-31-0/+2
| | | | | | | | | | | | This allows this configuration to be defined differently for some boards that request it. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de> cc: Prafulla Wadaskar <prafulla@marvell.com>
* S5P: add set_mmc_clk for external clock controlJaehoon Chung2011-05-26-0/+4
| | | | | | | | | | | This patch added set_mmc_clk for external clock control. c210 didn't support host clock control. So We need external_clock_control function for c210. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* MMC S5P: Fix typoDirk Behme2011-05-26-1/+1
| | | | | | | | | | | | | | | Fix typo resulting in the compilation error s5p_mmc.c: In function 's5p_mmc_initialize': s5p_mmc.c:469: error: 'struct mmc' has no member named 'm_bmax' introduced by commit "MMC: make b_max unconditional" (8feafcc49c0b7a9c541904f95a43dbef2fecc38b) Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> CC: John Rigby <john.rigby@linaro.org> CC: Andy Fleming <afleming@freescale.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* mvsata: issue hard reset on initializationMichael Walle2011-05-23-1/+9
| | | | | | | | | | | | Before the actual initialization do a hard reset of the SATA port and the connected device. changes v1->v2: - add comment for udelay Signed-off-by: Michael Walle <michael@walle.cc> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* Minor coding style cleanup.Wolfgang Denk2011-05-19-8/+6
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* MMC: omap_hsmmc.c: Add missing prototype headerDirk Behme2011-05-18-0/+1
| | | | | | | | | | | | | | | | Add missing header file to fix compilation warning omap_hsmmc.c: In function 'omap_mmc_init': omap_hsmmc.c:474: warning: implicit declaration of function 'get_cpu_family' omap_hsmmc.c:474: warning: implicit declaration of function 'get_cpu_rev' introduced by commit "MMC: omap_hsmmc.c: disable multiblock rw on old rev omap34xx silicon" (4ca9244d74f146a0605f5bee28a66e39aae88d3e) Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> CC: Andy Fleming <afleming@freescale.com> CC: John Rigby <john.rigby@linaro.org>
* fsl_esdhc: Initialize mmc->b_maxFabio Estevam2011-05-18-0/+1
| | | | | | | commit 262951(MMC: make b_max unconditional) missed to update fsl_esdhc. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mmc: enable partition switch function for emmcLei Wen2011-05-18-1/+29
| | | | | | | | | | | | | | | | | | | For emmc, it may have up to 7 partitions: two boot partitions, one user partition, one RPMB partition and four general purpose partitions. (Refer to JESD84-A44.pdf/page 154) As bootloader may need to read out or reflashing images on those different partitions, it is better to enable the partition switch with console command support. Also for partition would be restore to user partition(part 0) when CMD0 is used, so change mmc_init routine to perform normal initialization only once for each slot, unless use the rescan command to force init again. Signed-off-by: Lei Wen <leiwen@marvell.com> Acked-by: Andy Fleming <afleming@freescale.com>
* cmd_mmc: eliminate device num in the mmc commandLei Wen2011-05-18-0/+5
| | | | | | | mmc command applied device, like ide and usb... Signed-off-by: Lei Wen <leiwen@marvell.com> Acked-by: Andy Fleming <afleming@freescale.com>
* mmc_spi: generate response for send status commandThomas Chou2011-05-18-0/+5
| | | | | | | | | | A "send status" command is added with the commit "mmc: checking status after commands with R1b response". But the status register returned from send status command of SPI protocol is different from that of MMC/SD protocol. We do a simple test and generate a response in stead of full bit-by-bit translation. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
generated by cgit v1.1 at 2024-11-10 06:36:07 +0000