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* MA-9763 Include init.${ro.hardware}.${ro.boot.soc_type}.rc based uboot's ↵rel_imx_4.9.x_1.0.0_gaimx_v2017.03_4.9.11_1.0.0_gaguoyin.chen2017-09-14-0/+28
| | | | | | | | | | | soc_type Append androidboot.soc_type based on the imx soc type, only add imx6/7 support. Change-Id: I3ae18bff42b434eb77728a7db70dd3baf6d7e0a6 Signed-off-by: guoyin.chen <guoyin.chen@nxp.com> Signed-off-by: Richard Liu <xuegang.liu@nxp.com>
* MA-9387 [Android] fastboot: fastboot gpt.img for sd card in androidzhang sanshan2017-07-19-4/+36
| | | | | | | | | we set gpt image in the last lba for sd boot. complete the gpt header, gpt entry and protective MBR according the last lba gpt rule. Change-Id: Icc356a66f82ad359c0243245ab9fdfaea3bccd4f Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
* MA-9822 Device has to be booted manually to recovery mode to apply the OTA ↵zhang sanshan2017-07-11-4/+4
| | | | | | | | | | | | update when booting from NAND uboot can't get the correct misc info. nand_info[0] is the info of mtd in v2016 or more older version. nand_info[0] hold the pointer of mtd info in v2017. Change-Id: I6b336efeafeed1e0f4e3224f738e72b83f1e09df Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
* MA-9789 [fastboot]System doesn't enter fastboot mode automatically while ↵zhang sanshan2017-07-10-1/+1
| | | | | | | | | there is no valid gpt partition add command "fastboot 0" Change-Id: Ibad6dcab5213d815ac968034aeef5ff5a0be3b1b Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
* MA-9409-3 Add base board support for android and android things.zhang sanshan2017-07-10-27/+48
| | | | | | | | | | | | | | | | | | * add board support for android and android things. mx6ul_nxpu_iopb, pico-6ul, pico-imx7d, aquila-6ul reorganize the Kconfig, and fix the redefine issue. * add android configure into configure-while * add a common file mx_android_common.h it will be included by android and android things. defconfig only include ANDROID_THINGS_SUPPORT or ANDROID_SUPPORT * move partition_table_valid into f_fastboot.c. it's a common code. * add invalidate_dcache_range in fixed order. It will have salt invalid issue if we do not add it in order * add display for pico-7d. Change-Id: I6f8a4876c2f8bbd098034d1e3f53033109300bca Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
* MA-9409-2 fix some issue for android and android thingszhang sanshan2017-07-10-33/+276
| | | | | | | | | | | | | * Add CONFIG_SYSTEM_RAMDISK_SUPPORT to support system's ramdisk * Normal boot: cmdline to bypass ramdisk in boot.img, but use Recovery boot: Use the ramdisk in boot.img * commandline is larger than 512, system can't bootup sometime for commandline issue. * support fastboot getvar. * Support "fastboot erase" command for emmc device. TODO: uboot community have api to operate flash, we can unify this part * support "fastboot flash" even on damaged gpt Change-Id: I080c25d6569d6cab56ff025601cd3b8df21cf3dd
* MA-9409-1 enable avb on android things.zhang sanshan2017-07-10-10/+259
| | | | | | | | | Fix issue for API changed from v2017. porting below patch from v2016. commit 44834fd12f60a090e3d10ab6f84a75460894d49d Change-Id: Ifaf0b86dd29648f9150646f00f54502676df9013 Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
* MA-9702-2 [Android] Enable booti for android arm64.sanshan zhang2017-07-10-6/+32
| | | | | | | | | | | | boot_addr_start for booti should be the addr of Image rather than boot.img, so need read Image into hdr->kernel_addr. change the offset for bootloader. booti do not call android_image_get_kernel to init android env. booti can't load boot.img, so it can't init android env. init android env through android_image_get_kernel. Change-Id: Ifb990ee9c5710ce7bd5fa9a0d4221dcb0e52d341 Signed-off-by: sanshan zhang <sanshan.zhang@nxp.com>
* MA-9382 [Android]uboot: fix compiler issue and command line issue.zhang sanshan2017-06-21-4/+6
| | | | | | | | Fix compile error when enable CONFIG_NAND_BOOT. Fix data abort issue in uboot. Change-Id: If41a7fafa40a2c851882c723a201ac5cdf31284f Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
* MA-9376 [Android IMX] uboot: enable lock&unlockzhang sanshan2017-06-21-47/+1591
| | | | | | | | | | | | | | | | Fix compile error for api change. Porting below patches from v2015.o4: MA-7875 Enable CAAM for i.MX6 MA-7875-1 Support fastboot lock&unlock in u-boot MA-7875-2 Support fastboot lock/unlock in i.MX6 platform MA-7875-3 Support fastboot lock/unlock in i.MX6UL MA-8425 fastboot: return OKAY in fastboot erase MA-8418 fix return value check for get_device_and_partition MA-8622 - [brillo] fix uboot compile warnings and code style warnings Change-Id: I2370c3e5851cc1f92aaa93c200e6c079f7929af2 Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
* MA-9375 [Android IMX] uboot: enable BCB and bootctrlzhang sanshan2017-06-21-124/+1053
| | | | | | | | | * Add API to read\write MISC partition. * get the boot mode from BCB command when boot up. * get the boot up tactics from bootctrl. Change-Id: Icbba6340e10983dddc1b04804ecc012a3a3c57d0 Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
* MLK-14930-2 dwc_ahsata: Fix memory issue in reset_sataYe Li2017-05-24-0/+3
| | | | | | | | The reset_sata should reset the sata device info and free the probe_ent memory. Otherwise, it will cause memory leak if we init the sata again. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 39c9261fd057b0fa98f9dfdee7d368aa029ff736)
* MLK-14772 net: fec: set the device->seq id to priv->dev_idFugang Duan2017-05-12-5/+3
| | | | | | | | | i.MX6UL/ULL evk board net get the wrong MAC address from fuse, exp, eth1 get MAC0 address, eth0 get MAC1 address from fuse. Set the priv->dev_id to device->seq as the real net interface alias id then .fec_get_hwaddr() read the related MAC address from fuse. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
* MLK-14864: regulator: pfuze100: unsigned compared against 0Peng Fan2017-05-11-3/+9
| | | | | | Fix coverity:392391 392382 392385 Unsigned compared against 0 Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-14840: pinctrl: imx: fix resource leakPeng Fan2017-05-11-0/+5
| | | | | | | | | The device managed API actually not free the memory, so need to use devm_kfree to free the memory to avoid leakage. Coverity: 392384 resource leak Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-14878 qspi: Fix issue when enabling DDR modeYe Li2017-05-10-7/+13
| | | | | | | | | | | | | | | There are two problems in enabling DDR mode in this new driver: 1. The TDH bits in FLSHCR register should be set to 1. Otherwise, the TX DDR delay logic won't be enabled. Since u-boot driver does not have DDR commands in LUT. So this won't cause explicit problem. 2. When doing read/write/readid/erase operations, the MCR register is overwritten, the bits like DDR_EN are cleared during these operations. When we using DDR mode QSPI boot, the TDH bit is set to 1 by ROM. if the DDR_EN is cleared, there is no clk2x output for TX data shift. So these operations will fail. The explicit problem is users may get "SF: unrecognized JEDEC id bytes: ff, ff, ff" error after using DDR mode QSPI boot on 6UL/ULL EVK boards. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14750 mxc_fec: Add compatible string for i.mx6slYe Li2017-04-25-0/+1
| | | | | | | The compatible string "fsl,imx6sl-fec" is missed for i.mx6sl in u-boot FEC driver, so that FEC can't be recognized. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14698 imx: lpi2c: fix clock issue when NACK detectedGao Pan2017-04-20-4/+9
| | | | | | | | | | For LPI2C IP, NACK is detected by the rising edge of the ninth clock. In current uboot driver, once NACK is detected, it will reset and then disable LPI2C master. As a result, we can never see the falling edge of the ninth clock. Signed-off-by: Gao Pan <pandy.gao@nxp.com> (cherry picked from commit dd139ee52b709c95af3e0c968bcbc3cf42cca408)
* MLK-14707 fsl_esdhc: Fix eMMC 1.8v setting issueYe Li2017-04-20-4/+4
| | | | | | | | | | | | Current USDHC driver will reset VSELECT to 0 (3.3v) during mmc init, then set to 1 for 1.8v eMMC I/O. When booting from eMMC, since ROM has already set VSELECT to 1.8v before running the u-boot. This reset in USDHC driver causes a short 2.2v pulse on CMD pin. Fix this issue by not reset VSELECT to 0 when 1.8v flag is set. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit f01ebfdaa57b4c74ede32a6a40cf9cf9184ce049)
* MLK-14708 mmc: fsl_esdhc: fix wrong usage device_get_supply_regulatorPeng Fan2017-04-20-0/+4
| | | | | | | Fix wrong usage of device_get_supply_regulator. device_get_supply_regulator returns 0 on success. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-14627 android: Fix cache unaligned warningYe Li2017-04-06-3/+36
| | | | | | | | The sparse image writing and boot image reading may have cache unaligned problem. The u-boot v2017 will print warning at runtime. This patch fixes the unaligned problem. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14621 fsl_qspi: Set endianness for i.MX platformsYe Li2017-04-05-0/+10
| | | | | | | | The endianness is not set at qspi driver initialization. So if we don't boot from QSPI, we will get wrong endianness when accessing from AHB address directly. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14608 fsl_esdhc: Fix wp_enable issueYe Li2017-04-05-5/+13
| | | | | | | | | | The wp-gpios property is used for gpio, if this is set, the WP pin is muxed to gpio function, can't be used as internal WP checking. This patch changes to examine the "fsl,wp-controller" for using internal WP checking. And wp-gpios for using gpio pin. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14605 mx7ulp: Modify the lpi2c seq numberYe Li2017-04-05-3/+3
| | | | | | | | Change the i2c alias seq number to align with device index. So in lpi2c driver we don't need to add 4 to get the device index. This codes may not valid on other platforms. Signed-off-by: Ye Li <ye.li@nxp.com>
* MA-9263-3 [Android] Partition: enable GPT partition on imx devicesSanshan Zhang2017-04-05-12/+71
| | | | | | | | | | | | | 1. pass androidboot.storage_type to android, 'init' use it to parse different init.freescale.storage.rc. 2. store new ptable with gpt partition. 3. we use the last LBA as backup gpt table, there is many warning log when boot, change print to debug Change-Id: I84070735e9d4c2741b0e240bc1c61b357dabc5b8 Signed-off-by: Sanshan Zhang <sanshan.zhang@nxp.com> (cherry picked from commit da0ce2787256a323371641b0764266d386d767a5) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12527-2 android: Add FSL android fastboot supportYe Li2017-04-05-0/+1766
| | | | | | | | | | | | | | | | | | | | | | Integrate the FSL android fastboot features into community's fastboot. 1. Use USB gadget g_dnl driver 2. Integrate the FSL SD/SATA/NAND flash operations, since the GPT and EFI partitions are not support by i.MX. 3. Add FDT support to community's android image. 4. Add a new boot command "boota" for android image boot. The boota implements to load ramdisk and fdt to their loading addresses specified in boot.img header, while bootm won't do it for android image. 5. Support the authentication of boot.img at the "load_addr" for both SD and NAND. 6. We use new configuration CONFIG_FSL_FASTBOOT for Freescale's fastboot with relevant header file "fsl_fastboot.h". While disabling the configuration, the community fastboot is used. 7. Overwrite the cmdline in boot.img by using bootargs saved in local environment. 8. Add recovery and reboot-bootloader support. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 23d63ff185929fff5e392efc853d69b606ba081a)
* MLK-12527-1 mxc_keyb: Add MXC keyboard driverYe Li2017-04-05-0/+593
| | | | | | | | | | | | | | | The i.MX6SL EVK needs this driver in android fastboot support. Add this driver to u-boot. To use the driver, user must define: CONFIG_MXC_KPD Enable the driver CONFIG_MXC_KEYMAPPING Key mapping matrix CONFIG_MXC_KPD_COLMAX The column size of key mapping matrix CONFIG_MXC_KPD_ROWMAX The row size of the key mapping matrix Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 5096e572667ff41217deb4ba9b1bd15e93fa6b59)
* MLK-14484-1 mtd/spi: Add MT35XU512ABA NOR flash supportYe Li2017-04-05-0/+4
| | | | | | | | | | | | Add MT35XU512ABA parameters to NOR flash parameters array. Since the manufactory ID is changed to 0x2C, add it for micron and using it for relevant settings. The MT35XU512ABA only supports 1 bit mode and 8 bits. It can't support dual and quad. Because the 8 bits is not support by u-boot framework and driver. We only use 1 bit mode for this flash. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-13929-3 video: Update LCDIF driver to support MIPI-DSIYe Li2017-04-05-0/+43
| | | | | | | | | | The LCDIF provides video source for MIPI DSI host at DPI-2 interface. When the LCDIF Framebuffer driver is enabled, it uses the panel parameters setup by environments to create a panel device and register it to DSI host driver and then enable the DSI host. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 85659ea5ee975fa2d5fa7215e17a01f7006c39bf)
* MLK-13929-2 video: Add mipi panel driver for hx8363Ye Li2017-04-05-0/+149
| | | | | | | | Add the mipi dsi panel driver for device HX8363 from kernel. The panel driver needs work with mipi_dsi_northwest driver. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 0c6d0f4202bae7f61d38ecff1c9d255261f022f2)
* MLK-13929-1 video: Add MIPI DSI host controller driver for i.MX7ULPYe Li2017-04-05-0/+727
| | | | | | | | | | | | | | | | Add the host driver base from kernel for MIPI DSI controller on i.MX7ULP. The controller provides a DPI-2 interface for LCDIF video stream, and a APB interface for packet transmission. The driver provides APIs to register a MIPI panel device and its driver. The panel driver can use the write packet function provided by the host driver to send control packets to panel device via APB interface. MIPI DSI has its PHY and dedicated PLL. The driver will setup them when enabling the DSI host. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit e02115dd1c5d36ec06eabcb5a0b8e09aaf0f29a0)
* MLK-14445-5 ehci-mx6: Add OTG ID detecting by GPIOYe Li2017-04-05-0/+27
| | | | | | | | | The i.MX7ulp EVK board uses GPIO to detect ID for USB OTG0, but when using DM USB driver, it is hard coded to use OTG ID pin. Add a board override function that when extcon property is provided, the function can check the GPIO to get ID. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14474-2 pinctrl: imx7ulp: Add new info instance for iomuxc1Ye Li2017-04-05-3/+7
| | | | | | | | In mx7ulp pinctrl driver, we should create two info instances for iomuxc0 and iomuxc1 respective, otherwise they will share the same info instance, and cause problem in get base address... etc. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14474-1 pinctrl-imx: Fix wrong mask when SHARE_MUX_CONF_REG is setYe Li2017-04-05-1/+1
| | | | | | | when using SHARE_MUX_CONF_REG, wrong mask is used for writing config value. which causes mux value is cleared. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-13776 ocotp: Add fuse word checking before programming it on i.MX7ULPYe Li2017-04-05-1/+19
| | | | | | | | | | | On i.MX7ULP, the fuse words (except bank 0 and 1) only supports to write once, because they use ECC mode. Multiple writes may damage the ECC value and cause a wrong fuse value decoded when reading. This patch adds a checking before the fuse word programming, only can write when the word value is 0. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit e8447d649a631ec98120d84fab124ca29fbe39f0)
* MLK-13450-17 sf: Add Macronix MX25R6435F SPI NOR flash to flash parameters arrayYe Li2017-04-05-0/+1
| | | | | | | On mx7ulp EVK board, we use MX25R6435F NOR flash, add its parameters and IDs to flash parameter array. Otherwise, the flash probe will fails. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-13450-16 fsl_qspi: Update changes for mx7ulpYe Li2017-04-05-1/+24
| | | | | | | | | | | | The mx7ulp has small TX/RX FIFO (64Bytes) and AHB buffer size (128Bytes) than other i.MX. Change some parameters for it. Also found when the DDR_EN bit is set, sometime the page programming will fail during large data programming. The 64 bytes data is not programmed into flash. But when DDR_EN is clear, there is no such issue. Suspect this is a IC issue. We have disable the DDR_EN for mx7ulp. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-13450-15 ehci-mx6: Add powerup_fixup implementationYe Li2017-04-05-1/+27
| | | | | | | | | | | | | | | | | | | | | When doing port reset, the PR bit of PORTSC1 will be automatically cleared by our IP, but standard EHCI needs explicit clear by software. The EHCI-HCD driver follow the EHCI specification, so after 50ms wait, it clear the PR bit by writting to the PORTSC1 register with value loaded before setting PR. This sequence is ok for our IP when the delay time is exact. But when the timer is slower, some bits like PE, PSPD have been set by controller automatically after the PR is automatically cleared. So the writing to the PORTSC1 will overwrite these bits set by controller. And eventually the driver gets wrong status. We implement the powerup_fixup operation which delays 50ms and will check the PR until it is cleared by controller. And will update the reg value which is written to PORTSC register by EHCI-HCD driver. This is much safer than depending on the delay time to be accurate and aligining with controller's behaiver. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 8dfdf83abaff44efb487f801cd1757a729d427c5)
* MLK-13450-14 ehci-mx6: Update EHCI driver to support OTG0 on i.MX7ULPYe Li2017-04-05-15/+42
| | | | | | | | | | | | The ULP has two USB controllers. These two controllers have similar NC registers layout as i.MX7D. But OTG0 uses UTMI PHY simliar as i.MX6, not the integrated PHY on i.MX7D. The OTG1 needs off-chip HSIC PHY or ULPI PHY to work. This patch only supports OTG0 with UTMI PHY. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 1ac22cabb96a14ac4ca58df60ae2025fb5e94db6)
* mmc: fsl_esdhc: support i.MX7ULPPeng Fan2017-04-05-0/+8
| | | | | | | | | Add compatible property for i.MX7ULP. Add a weak init_usdhc_clk function, i.MX7ULP use this to init the clock. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
* serial: lpuart: add i.MX7ULP supportPeng Fan2017-04-05-9/+104
| | | | | | | | | | | | | | Add i.MX7ULP support. The buadrate calculation on i.MX7ULP is different,so add a new setbrg function for i.MX7ULP. Add a enum lpuart_devtype for runtime check for different platforms. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: York Sun <york.sun@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@nxp.com> Cc: Alison Wang <b18965@freescale.com>
* serial: lpuart: restructure lpuart driverPeng Fan2017-04-05-125/+142
| | | | | | | | | | | | | | | | Drop CONFIG_LPUART_32B_REG. Move the register structure to a common file include/fsl_lpuart.h Define lpuart_serial_platdata structure which includes the reg base and flags. For 32Bit register access, use lpuart_read32/lpuart_write32 which handles big/little endian. For 8Bit register access, still use the orignal code. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: York Sun <york.sun@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@nxp.com> Cc: Alison Wang <b18965@freescale.com>
* i2c: lpi2c: add lpi2c driver for i.MX7ULPPeng Fan2017-04-05-0/+469
| | | | | | | | | | | Add lpi2c driver for i.MX7ULP. Need to enable the two options to use this driver: CONFIG_DM_I2C=y CONFIG_SYS_I2C_IMX_LPI2C=y Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* pinctrl: Add i.MX7ULP pinctrl driverPeng Fan2017-04-05-4/+65
| | | | | | | | | Add i.MX7ULP pinctrl driver. Select CONFIG_PINCTRL_IMX7ULP to use this driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by : Stefano Babic <sbabic@denx.de>
* wdog: Add the watchdog driver for MX7ULP.Ye Li2017-04-05-0/+107
| | | | | | | | | | | | | This driver implements the HW WATCHDOG functions. Which needs to set CONFIG_HW_WATCHDOG to use them. This is disabled by default for mx7ulp. Use watchdog for reset cpu. Implement this in the driver. Need to define CONFIG_ULP_WATCHDOG to build it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* mxc_ocotp: Update driver to support OCOTP controller on i.MX7ULPPeng Fan2017-04-05-1/+51
| | | | | | | | | | | | | Update the mxc_ocotp driver to support i.MX7ULP. The read/write sequence has some changes due to PDN and OUT_STATUS registers added and TIME register is removed. Also update the bank size and number. Add is_mx7ulp macro in sys_proto.h Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
* gpio: Add Rapid GPIO2P driver for i.MX7ULPPeng Fan2017-04-05-0/+232
| | | | | | | | | | | | | | | | | Add the imx_rgpio2p driver for Rapid GPIO2P controllers on i.MX7ULP. Have added all ports on RGPIO2P_0 and RGPIO2P_1. The configurations CONFIG_IMX_RGPIO2P and CONFIG_DM_GPIO must be set to y to enable the drivers. To use the GPIO function, the IBE and OBE needs to set in IOMUXC. We did not set the bits in driver, but leave them to IOMUXC settings of the GPIO pins. User should use IMX_GPIO_NR to generate the GPIO number for gpio APIs access. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
* MLK-13602-2 epdc: Add disable fuse checkingYe Li2017-04-05-0/+20
| | | | | | | | | Add fuse checking for EPDC module. Once the fused is programmed, the EPDC module is disabled, can't to access it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit ea7429b70c1eb2cf475028ee8df2ac9ed18b3c82)
* MLK-14371 fsl_qspi: update the driver to support mx6ul and mx7dYe Li2017-04-05-3/+16
| | | | | | | | | After porting to v2017.03. we start to use community's QSPI driver, not the one we maintained before in v2014-v2016. The new QSPI driver only supports i.MX6SX. This patch adds support for i.MX6UL and i.MX7D Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-13782 net: fec_mxc: specify the registered eth index by dev_idAndy Duan2017-04-05-2/+9
| | | | | | | Specify the registered eth index by dev_id. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> (cherry picked from commit df42b7b0c5e6847f32419075eb25f274ed039d6f)
generated by cgit v1.1 at 2024-12-18 09:29:34 +0000