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* | | | usb:composite: clear the whole common bufferJeroen Hofstee2014-06-25-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the struct fsg_common is calloced, reset it completely with zero's when reused. While at it, make checkpatch happy. cc: Lukasz Majewski <l.majewski@samsung.com> cc: Piotr Wilczek <p.wilczek@samsung.com> cc: Kyungmin Park <kyungmin.park@samsung.com> cc: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
* | | | usb: r8a66597: Fix initilization size of r8a66597 info structureYasuhisa Umano2014-06-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialization of r8a66597 info structure is not enough. Because initilization was used size of pointer. This fixes that use size of r8a6659 info structure. Signed-off-by: Yasuhisa Umano <yasuhisa.umano.zc@renesas.com>
* | | | usb: r8a66597: Fix initialization hub that using R8A66597_MAX_ROOT_HUByasuhisa umano2014-06-25-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver is processed as two USB hub despite one. The number of root hub is defined in R8A66597_MAX_ROOT_HUB. This fixes that register is accessed by using the definition of R8A66597_MAX_ROOT_HUB. Signed-off-by: Yasuhisa Umano <yasuhisa.umano.zc@renesas.com>
* | | | usb: cosmetic: double constJeroen Hofstee2014-06-25-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For plain array const can be either before or after the type definition. Adding both is simply redundand. Remove the later one. cc: marex@denx.de Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* | | | usb: ci_udc: fix typo in debug messageStephen Warren2014-06-25-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | s/ot/to/ Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | | usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDCStephen Warren2014-06-25-1/+7
| |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ci_udc.c's usb_gadget_unregister_driver() doesn't call driver->unbind() unlike other USB gadget drivers. Fix it to do this. Without this, when ether.c's CDC Ethernet device is torn down, eth_unbind() is never called, so dev->gadget is never set to NULL. For some reason, usb_eth_halt() is called both at the end of the first use of the Ethernet device, and prior to any subsequent use. Since dev->gadget is never cleared, all calls to usb_eth_halt() attempt to stop, disconnect, and clean up the device, resulting in double cleanup, which hangs U-Boot on my Tegra device at least. ci_udc allocates its own singleton EP0 request object, and cleans it up during usb_gadget_unregister_driver(). This appears necessary when using the USB gadget framework in U-Boot, since that does not allocate/free the EP0 request. However, the CDC Ethernet driver *does* allocate and free its own EP0 requests. Consequently, we must protect ci_ep_free_request() against double-freeing the request. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | dm: Cast away the const-ness of the global_data pointerSimon Glass2014-06-20-4/+4
| | | | | | | | | | | | | | | | | | | | | In a very few cases we need to adjust the driver model root device, such as when setting it up at initialisation. Add a macro to make this easier. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: Add missing header files in lists and rootSimon Glass2014-06-20-0/+2
| | | | | | | | | | | | | | | | | | | | | These files don't compile in some architectures. Fix it by adding the missing headers. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: Use case-insensitive comparison for GPIO banksSimon Glass2014-06-20-1/+1
| | | | | | | | | | | | | | | | | | | | | We want 'N0' and 'n0' to mean the same thing, so ensure that case is not considered when naming GPIO banks. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: Rename struct device_id to udevice_idSimon Glass2014-06-20-4/+4
| | | | | | | | | | | | | | | | | | | | | It is best to avoid having any occurence of 'struct device' in driver model, so rename to achieve this. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | pmic: tps65090: correct checking i2c busJeroen Hofstee2014-06-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function tps65090_init checks the i2c bus of p->bus. However the pointer p is not intialiased at this point. Check the local variable bus instead. cc: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Acked-by: Simon Glass <sjg@chromium.org>
* | | includes: move openssl headers to include/u-bootJeroen Hofstee2014-06-19-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 18b06652cd "tools: include u-boot version of sha256.h" unconditionally forced the sha256.h from u-boot to be used for tools instead of the host version. This is fragile though as it will also include the host version. Therefore move it to include/u-boot to join u-boot/md5.h etc which were renamed for the same reason. cc: Simon Glass <sjg@chromium.org> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2014-06-12-5/+10
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| * | | mmc: free allocated memory on initialization errorsDarwin Rambo2014-06-12-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleanup to balance malloc/free calls. Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Steve Rae <srae@broadcom.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * | | mmc: return meaningful error codes from mmc_select_hwpartStephen Warren2014-06-12-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than just returning -1 everywhere, try to return something meaningful from mmc_select_hwpart(). Note that most other MMC functions don't do this, including functions called from mmc_select_hwpart(), so I'm not sure how effective this will be. Still, it's one less place with hard-coded -1. Suggested-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* | | | i2c: kona: Resolve Kona I2C driver issueSteve Rae2014-06-12-1/+1
|/ / / | | | | | | | | | | | | | | | - "i2c mw" command hangs (with some compilers) Signed-off-by: Steve Rae <srae@broadcom.com>
* | | m68k: Fix warnings with gcc 4.6Simon Glass2014-06-11-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | Most of the warnings seem to be related to using 'int' for size_t. Change this and fix up the remaining warnings and problems. For bootm, the warning was masked by others, and there is an actual bug in the code. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2014-06-11-16/+23
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| * | | sf: probe: Fix quad bit set pathPoddar, Sourav2014-06-08-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, flash quad bit is set in "spi_flash_validate_params" and later at the end in the same api, we write 0 to status register for few flashes, thereby overriding the quad bit set. This fix moves the quad bit setting outside this api in "spi_flash_probe_slave" Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | spi: soft_spi: Support NULL din/dout buffersAndrew Ruder2014-06-08-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This mirrors the conventions used in other SPI drivers (kirkwood, davinci, atmel, et al) where the din/dout buffer can be NULL when the received/transmitted data isn't important. This reduces the need for allocating additional buffers when write-only/read-only functionality is needed. In the din == NULL case, the received data is simply not stored. In the dout == NULL case, zeroes are transmitted. Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: params: Added support for Spansion S25FL512S_512KSiva Durga Prasad Paladugu2014-06-08-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added support for Spansion chip "S25FL512S_512K". Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2014-06-10-43/+178
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| * | | | dfu: Disable default calculation of CRC32Lukasz Majewski2014-06-11-13/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch (SHA1: bd694244db7bc969954) dfu: Introduction of the "dfu_hash_algo" env variable for checksum method setting already introduced more generic handling of the crc32 calculation. Up till now the CRC32 of received data was calculated unconditionally. This patch changes this and from now - by default the crc32 is NOT calculated anymore. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
| * | | | usb: ci_udc: terminate ep0 INs with a zlp when requiredStephen Warren2014-06-11-3/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes, a zero-length packet is required at the end of an IN transaction so that the host knows the device is done sending data. Enhance ci_udc to send a zlp when necessary. See the comments for more details. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | | | usb: ci_udc: clean up all allocations in unregisterStephen Warren2014-06-11-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | usb_gadget_unregister_driver() is called to tear down the USB device mode stack. Fix the driver to stop the USB HW (which causes any attached host to notice the disappearance of the device), and free all allocations (which obviously prevents memory leaks). Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | | | usb: ci_udc: fix probe error cleanupStephen Warren2014-06-11-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If allocation of the ep0 req fails, clean up all the allocations that were made in ci_udc_probe(). Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | | | usb: ci_udc: fix freeing of ep0 reqStephen Warren2014-06-11-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ci_ep_alloc_request() avoids allocating multiple request objects for ep0 by keeping a record of the first req allocated for ep0, and always returning that instead of allocating a new req. However, if this req is ever freed, the record of the previous allocation is not cleared, so ci_ep_alloc_request() will keep returning this stale pointer. Fix ci_ep_free_request() to clear the record of the previous allocation. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | | | usb: ci_udc: call udc_disconnect() from ci_pullup()Stephen Warren2014-06-11-16/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ci_pullup()'s !is_on path contains a cut/paste copy of udc_disconnect(). Remove the duplication by simply calling udc_disconnect() instead. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | | | usb: ci_udc: complete ep0 direction handlingStephen Warren2014-06-01-7/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | handle_setup() currently assumes that the response to a Setup transaction will be an OUT transaction, and any subsequent packet (if any) will be an IN transaction. This appears to be valid in many cases; both USB enumeration and Mass Storage work OK with this restriction. However, DFU uses ep0 to transfer data in both directions. This renders the assumption invalid; when sending data from device to host, the Data Stage is an IN transaction, and the Status Stage is an OUT transaction. Enhance handle_setup() to deduce the correct direction for the USB transactions based on Setup transaction data. ep0's request object only needs to be automatically re-queued when the Data Stage completes, in order to implement the Status Stage. Once the Status Stage transaction is complete, there is no need to re-queue the USB request, so don't do that. Don't sent USB request completion callbacks for Status Stage transactions. These were queued by ci_udc itself, and only serve to confuse the USB function code. For example, f_dfu attempts to interpret the 0-length data buffers for Status Stage transactions as DFU packets. These buffers contain stale data from the previous transaction. This causes f_dfu to complain about a sequence number mismatch. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | | | usb: ci_udc: pre-allocate ep0 reqStephen Warren2014-06-01-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allocate ep0's USB request object when the UDC driver is probed. This solves a couple of issues in the current code: a) A request object always exists for ep0. Prior to this patch, if setup transactions arrived in an unexpected order, handle_setup() would need to reply to a setup transaction before any ep0 usb_req was created. This issue was introduced in commit 2813006fecda "usb: ci_udc: allow multiple buffer allocs per ep." b) handle_ep_complete no longer /has/ to queue the ep0 request again after every single request completion. This is currently required, since handle_setup() assumes it can find some request object in ep0's request queue. This patch doesn't actually stop handle_ep_complete() from always requeueing the request, but the next patch will. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | | | usb: ci_udc: use a single descriptor for ep0Stephen Warren2014-06-01-11/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ci_udc currently points ep->desc at separate descriptors for IN and OUT. These descriptors only differ in the ep address IN/OUT field. Modify the code to use a single descriptor, and change that descriptor's ep address to indicate IN/OUT as required. This removes some data duplication. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | | | usb: ci_udc: detect queued requests on ep0Stephen Warren2014-06-01-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The flipping of ep0 between IN and OUT relies on ci_ep_queue() consuming the current IN/OUT setting immediately. If this is deferred to a later point when the req is pulled out of ci_req->queue, then the IN/OUT setting may have been changed since the req was queued, and state will get out of sync. This condition doesn't occur today, but could if bugs were introduced later, and this error-check will save a lot of debugging time. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | | | dfu: Introduction of the "dfu_hash_algo" env variable for checksum method ↵Lukasz Majewski2014-06-01-5/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | setting Up till now the CRC32 of received data was calculated unconditionally. The standard crc32 implementation causes long delay when large images were uploaded. The "dfu_hash_algo" environment variable gives the opportunity to disable on demand the hash (crc32) calculation. It can be done without the need to recompile the u-boot binary. By default the crc32 is calculated, which means that legacy behavior has been preserved. Tests results: 400 MiB ums.img file With crc32 calculation: 65 sec [avg 6.29 MB/s] Without crc32 calculation: 25 sec [avg 16.17 MB/s] Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
* | | | | net: sh-eth: Fix typo from rESR_RTLF to EESR_RTLFNobuhiro Iwamatsu2014-06-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'r' of rESR_RTLF is a mistake of E. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | | | net: sh-eth: Fix coding styleNobuhiro Iwamatsu2014-06-10-22/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes checkpatch's warning. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | | | net: sh-eth: Add support R7S72100 of rmobileNobuhiro Iwamatsu2014-06-10-14/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The R7S72100 of ARM SoC that Renesas manufactured has one Ether port. This has the same IP SH-Ether. This patch adds support of the R7S72100 in SH-Ether. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-06-08-200/+743
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| * | | power: Add support for the TPS65218 PMICTom Rini2014-06-06-0/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a driver for the TPS65218 PMIC which is used by TI AM43xx SoCs and may be used by TI AM335x SoCs. Signed-off-by: Tom Rini <trini@ti.com>
| * | | ti: qspi: populate slave device to set flash quad bit.Sourav Poddar2014-06-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch populates the slave data which will be used by flash driver to set the flash quad enable bit. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
| * | | mtd: nand: omap: add support for BCH16_ECC - NAND driver updatespekon gupta2014-06-06-1/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support for BCH16_ECC to omap_gpmc driver. *need to BCH16 ECC scheme* With newer SLC Flash technologies and MLC NAND, and large densities, pagesizes Flash devices have become more suspectible to bit-flips. Thus stronger ECC schemes are required for protecting the data. But stronger ECC schemes have come with larger-sized ECC syndromes which require more space in OOB/Spare. This puts constrains like; (a) BCH16_ECC can correct 16 bit-flips per 512Bytes of data. (b) BCH16_ECC generates 26-bytes of ECC syndrome / 512B. Due to (b) this scheme can only be used with NAND devices which have enough OOB to satisfy following equation: OOBsize per page >= 26 * (page-size / 512) Signed-off-by: Pekon Gupta <pekon@ti.com>
| * | | mtd: nand: omap: add CONFIG_SYS_NAND_BUSWIDTH_16BIT to indicate NAND device ↵pekon gupta2014-06-06-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bus-width GPMC controller needs to be configured based on bus-width of the NAND device connected to it. Also, dynamic detection of NAND bus-width from on-chip ONFI parameters is not possible in following situations: SPL: SPL NAND drivers does not support ONFI parameter reading. U-boot: GPMC controller iniitalization is done in omap_gpmc.c:board_nand_init() which is called before probing for devices, hence any ONFI parameter information is not available during GPMC initialization. Thus, OMAP NAND driver expected board developers to explicitely write GPMC configurations specific to NAND device attached on board in board files itself. But this was troublesome for board manufacturers as they need to dive into lengthy platform & SoC documents to find details of GPMC registers and appropriate configurations to get NAND device working. This patch instead adds existing CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config hich indicates that connected NAND device has x16 bus-width. And then based on this config GPMC driver itself initializes itself based on NAND bus-width. This keeps board developers free from knowing GPMC controller specific internals. Signed-off-by: Pekon Gupta <pekon@ti.com>
| * | | mtd: nand: force NAND_CMD_READID onto 8-bit busBrian Norris2014-06-06-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per following Sections in ONFI Spec, NAND_CMD_READID should use only lower 8-bit for transfering command, address and data even on x16 NAND device. *Section: Target Initialization" "The Read ID and Read Parameter Page commands only use the lower 8-bits of the data bus. The host shall not issue commands that use a word data width on x16 devices until the host determines the device supports a 16-bit data bus width in the parameter page." *Section: Bus Width Requirements* "When the host supports a 16-bit bus width, only data is transferred at the 16-bit width. All address and command line transfers shall use only the lower 8-bits of the data bus. During command transfers, the host may place any value on the upper 8-bits of the data bus. During address transfers, the host shall set the upper 8-bits of the data bus to 00h." Thus porting following commit from linux-kernel to ensure that column address is not altered to align to x16 bus when issuing NAND_CMD_READID command. commit 3dad2344e92c6e1aeae42df1c4824f307c51bcc7 mtd: nand: force NAND_CMD_READID onto 8-bit bus Author: Brian Norris <computersforpeace@gmail.com> (preserving authorship) The NAND command helpers tend to automatically shift the column address for x16 bus devices, since most commands expect a word address, not a byte address. The Read ID command, however, expects an 8-bit address (i.e., 0x00, 0x20, or 0x40 should not be translated to 0x00, 0x10, or 0x20). This fixes the column address for a few drivers which imitate the nand_base defaults. Signed-off-by: Pekon Gupta <pekon@ti.com>
| * | | mtd: nand: don't use read_buf for 8-bit ONFI transfersBrian Norris2014-06-06-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Porting below commit from linux-tree, preserving original authorship & commit log commit bd9c6e99b58255b9de1982711ac9487c9a2f18be Author: Brian Norris <computersforpeace@gmail.com> mtd: nand: don't use read_buf for 8-bit ONFI transfers Use a repeated read_byte() instead of read_buf(), since for x16 buswidth devices, we need to avoid the upper I/O[16:9] bits. See the following commit for reference: commit 05f7835975dad6b3b517f9e23415985e648fb875 (from linux-tree) Author: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Date: Thu Dec 5 22:22:04 2013 +0100 mtd: nand: don't use {read,write}_buf for 8-bit transfers Now, I think that all barriers to probing ONFI on x16 devices are removed, so remove the check from nand_flash_detect_onfi(). Signed-off-by: Pekon Gupta <pekon@ti.com>
| * | | mtd: nand: omap: fix error-codes returned from omap-elm driverpekon gupta2014-06-06-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch omap-elm.c: replaces -ve integer value returned during errorneous condition, with proper error-codes. omap-gpmc.c: updates omap-gpmc driver to pass error-codes returned from omap-elm driver to upper layers Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | | mtd: nand: omap_gpmc: minor cleanup of omap_correct_data_bchpekon gupta2014-06-06-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch tries to avoid some local pointer dereferences, by using common local variables in omap_correct_data_bch() Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | | mtd: nand: omap_gpmc: rename struct nand_bch_priv to struct omap_nand_infopekon gupta2014-06-06-32/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch renames 'struct nand_bch_priv' which currently holds private data only for BCH ECC schemes, into 'struct omap_nand_info' so that same can be used for all ECC schemes Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | | mtd: nand: omap_gpmc: remove unused members of 'struct nand_bch_priv'pekon gupta2014-06-06-17/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch prepares to refactor 'struct nand_bch_priv' -> 'struct omap_nand_info' And thus performs following clean-ups: - remove nand_bch_priv.type: use nand_bch_priv.ecc_scheme instead - remove nand_bch_priv.mode: <unused> Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | | mtd: nand: omap_elm: use bch_type instead of nibble count to differentiate ↵pekon gupta2014-06-06-20/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | between BCH4/BCH8/BCH16 ELM hardware engine support ECC error detection for multiple ECC strengths like +------+------------------------+ |Type | ECC syndrome length | +------+------------------------+ |BCH4 | 6.5 bytes = 13 nibbles | |BCH8 | 13 byte = 26 nibbles | |BCH16 | 26 bytes = 52 nibbles | +------+------------------------+ Current implementation of omap_elm driver uses ECC syndrom length (in 'nibbles') to differentiate between BCH4/BCH8/BCH16. This patch replaces it with 'bch_type' Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | | mtd: nand: omap_elm: remove #include omap_gpmc.hpekon gupta2014-06-06-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no dependency of omap_elm.c on omap_gpmc.h Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | | Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2014-06-02-111/+495
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