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* ddr: altera: Fix debug message format in sequencerMarek Vasut2015-08-08-7/+7
| | | | | | | | | | The debug messages missed proper newlines and/or spaces in them. Fix the formatting. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@konsulko.com>
* ddr: altera: Fix typo in mp_threshold1 programmingMarek Vasut2015-08-08-1/+1
| | | | | | | | | | | It is the configuration data that should go into the register, not the register mask, just like the surrounding code does it. Fix this typo. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@konsulko.com>
* ddr: altera: Move struct sdram_prot_rule prototypeMarek Vasut2015-08-08-0/+13
| | | | | | | | | | | Move the structure prototype from sdram.h header file into sdram.c source file, since it is used only there and for local purpose only. There is no point in having it global. While at this move, fix the data types in the structure from uintNN_t to uNN and fix the coding style a bit. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Move sdram_config.h to board dirMarek Vasut2015-08-08-1/+6
| | | | | | | This file is absolutelly positively board specific, so move it into the correct place. Signed-off-by: Marek Vasut <marex@denx.de>
* driver/ddr/altera: Add the sdram calibration portionDinh Nguyen2015-08-08-0/+4985
| | | | | | This patch adds the DDR calibration portion of the Altera SDRAM driver. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* driver/ddr/altera: Add DDR driver for Altera's SDRAM controllerDinh Nguyen2015-08-08-0/+799
| | | | | | | | This patch enables the SDRAM controller that is used on Altera's SoCFPGA family. This patch configures the SDRAM controller based on a configuration file that is generated from the Quartus tool, sdram_config.h. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* net: designware: Rename the driver var name to eth_designwareMarek Vasut2015-08-08-1/+1
| | | | | | | | | The driver variable name is eth_sandbox, which is probably a copy-paste mistake. Fix it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: designware: Add SoCFPGA GMAC DT compatible stringMarek Vasut2015-08-08-0/+1
| | | | | | | | Add the OF compatible property to match the SoCFPGA GMAC. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* arm: socfpga: Fix FPGA bitstream programming routineMarek Vasut2015-08-08-0/+3
| | | | | | | | | In case the FPGA bitstream is aligned to 4 bytes, skip the part of the assembler which handles unaligned bitstream. Otherwise, that part will loop indefinitelly. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
* Merge git://git.denx.de/u-boot-dmTom Rini2015-08-06-1314/+2714
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| * dm: core: Add a way to set a device nameSimon Glass2015-08-06-0/+10
| | | | | | | | | | | | | | | | | | | | Some devices are bound entirely by probing and do not have the benefit of a device tree to give them a name. This is very common with PCI and USB. In most cases this is fine, but we should add an official way to set a device name. This should be called in the device's bind() method. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * devres: add debug command to dump device resourcesMasahiro Yamada2015-08-06-1/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This new command can dump all device resources associated to each device. The fields in every line shows: - The address of the resource - The size of the resource - The name of the release function - The stage in which the resource has been acquired (BIND/PROBE) Currently, there is no driver using devres, but if such drivers are implemented, the output of this command should look like this: => dm devres - root_driver - soc - extbus - serial@54006800 bfb541e8 (8 byte) devm_kmalloc_release BIND bfb54440 (4 byte) devm_kmalloc_release PROBE bfb54460 (4 byte) devm_kmalloc_release PROBE - serial@54006900 bfb54270 (8 byte) devm_kmalloc_release BIND - gpio@55000000 - i2c@58780000 bfb5bce8 (12 byte) devm_kmalloc_release PROBE bfb5bd10 (4 byte) devm_kmalloc_release PROBE - eeprom bfb54418 (12 byte) devm_kmalloc_release BIND Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
| * devres: make Devres optional with CONFIG_DEVRESMasahiro Yamada2015-08-06-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, Devres requires additional 16 byte for each allocation, which is not so insignificant in some cases. Add CONFIG_DEVRES to make this framework optional. If the option is disabled, devres functions fall back to non-managed variants. For example, devres_alloc() to kzalloc(), devm_kmalloc() to kmalloc(), etc. Because devres_head is also surrounded by an ifdef conditional, there is no memory overhead when CONFIG_DEVRES is disabled. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Suggested-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| * devres: add devm_kmalloc() and friends (managed memory allocators)Masahiro Yamada2015-08-06-0/+34
| | | | | | | | | | | | | | | | | | | | | | devm_kmalloc() is identical to kmalloc() except that the memory allocated with it is managed and will be automatically released when the device is removed/unbound. Likewise for the other variants. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
| * devres: introduce Devres (Managed Device Resource) frameworkMasahiro Yamada2015-08-06-1/+215
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In U-Boot's driver model, memory is basically allocated and freed in the core framework. So, low level drivers generally only have to specify the size of needed memory with .priv_auto_alloc_size, .platdata_auto_alloc_size, etc. Nevertheless, some drivers still need to allocate/free memory on their own in case they cannot statically know the necessary memory size. So, I believe it is reasonable enough to port Devres into U-boot. Devres, which originates in Linux, manages device resources for each device and automatically releases them on driver detach. With devres, device resources are guaranteed to be freed whether initialization fails half-way or the device gets detached. The basic idea is totally the same to that of Linux, but I tweaked it a bit so that it fits in U-Boot's driver model. In U-Boot, drivers are activated in two steps: binding and probing. Binding puts a driver and a device together. It is just data manipulation on the system memory, so nothing has happened on the hardware device at this moment. When the device is really used, it is probed. Probing initializes the real hardware device to make it really ready for use. So, the resources acquired during the probing process must be freed when the device is removed. Likewise, what has been allocated in binding should be released when the device is unbound. The struct devres has a member "probe" to remember when the resource was allocated. CONFIG_DEBUG_DEVRES is also supported for easier debugging. If enabled, debug messages are printed each time a resource is allocated/freed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dm: add DM_FLAG_BOUND flagMasahiro Yamada2015-08-06-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Currently, we only have DM_FLAG_ACTIVATED to indicate the device status, but we still cannot know in which stage is in progress, binding or probing. This commit introduces a new flag, DM_FLAG_BOUND, which is set when the device is really bound, and cleared when it is unbound. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dm: Support address translation for simple-busSimon Glass2015-08-06-6/+41
| | | | | | | | | | | | | | | | The 'ranges' property can be used to specify a translation from the system address to the bus address. Add support for this using the dev_get_addr() function, which devices should use to find their address. Signed-off-by: Simon Glass <sjg@chromium.org>
| * net: smsc95xx: Add driver-model supportSimon Glass2015-08-06-0/+142
| | | | | | | | | | | | | | Add support for driver model, so that CONFIG_DM_ETH can be defined and used with this driver. Signed-off-by: Simon Glass <sjg@chromium.org>
| * net: smsc95xx: Prepare for conversion to driver modelSimon Glass2015-08-06-122/+150
| | | | | | | | | | | | | | | | At present struct eth_device is passed around all over the place. This does not exist with driver model. Add explicit arguments instead, so that with driver model we can pass the correct things. Signed-off-by: Simon Glass <sjg@chromium.org>
| * net: smsc95xx: Correct the error numbersSimon Glass2015-08-06-22/+26
| | | | | | | | | | | | | | Instead of returning -1 on error, we should use a proper error number. Fix the code to conform to this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * net: smsc95xx: Rename AX_RX_URB_SIZE to RX_URB_SIZESimon Glass2015-08-06-5/+5
| | | | | | | | | | | | | | The AX_ prefix comes from the Asix driver. Since this is not that, we should avoid this confusing prefix. Signed-off-by: Simon Glass <sjg@chromium.org>
| * net: smsc95xx: Sort the include filesSimon Glass2015-08-06-2/+3
| | | | | | | | | | | | Tidy up the include file order before adding more. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: usb: Add driver-model support to dwc2Simon Glass2015-08-06-0/+97
| | | | | | | | | | | | | | Add driver model support to this driver so it can be used with the new USB stack. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: usb: Prepare dwc2 driver for driver-model conversionSimon Glass2015-08-06-54/+104
| | | | | | | | | | | | | | Put all global data in a structure and move (what will be) common code into common functions. This will make the driver-model conversion much easier. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: usb: Add an errno.h header to usb_ether.cSimon Glass2015-08-06-0/+1
| | | | | | | | | | | | This is required on some platforms, so add it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: Make regmap and syscon optionalSimon Glass2015-08-06-2/+21
| | | | | | | | | | | | | | | | Not all boards use garbage collection in their link step, so we should avoid adding options that rely on this for prevention of code bloat. Add separate Kconfig options for syscon and regmap uclasses. Signed-off-by: Simon Glass <sjg@chromium.org>
| * lib/fdtdec: Fix compiling warning caused by changing fdt_addr_t typeYork Sun2015-08-06-8/+8
| | | | | | | | | | | | | | | | fdt_addr_t is changed to phys_addr_t. The format in debug should be updated to %pa to match the type. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org>
| * exynos: video: Remove non-device-tree codeSimon Glass2015-08-05-22/+0
| | | | | | | | | | | | We always use device tree on exynos, so remove the unused code. Signed-off-by: Simon Glass <sjg@chromium.org>
| * video: Remove the old parade driverSimon Glass2015-08-05-232/+0
| | | | | | | | | | | | | | We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org>
| * cros_ec: Remove the old tunnel codeSimon Glass2015-08-05-267/+1
| | | | | | | | | | | | This is not needed with driver mode. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * power: Remove old TPS65090 driversSimon Glass2015-08-05-530/+0
| | | | | | | | | | | | | | Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: gpio: Check a GPIO is valid before using itSimon Glass2015-08-05-1/+5
| | | | | | | | | | | | | | | | | | Since a gpio_desc is allowed to be invalid we should return an error indicating that the operation cannot be completed. This can happen if the GPIO is optional - e.g. some devices may have a reset line and some may not. Signed-off-by: Simon Glass <sjg@chromium.org>
| * exynos: video: Correct debug outputSimon Glass2015-08-05-2/+2
| | | | | | | | | | | | | | | | | | We should not print a message from the driver when the display is set up. This is normal behaviour. Change this message to use debug(). Also remove the double newline on another debug message. Signed-off-by: Simon Glass <sjg@chromium.org>
| * exynos: Correct return value in exynos_mmc_init()Simon Glass2015-08-05-1/+1
| | | | | | | | | | | | This function should return 0 on success, not 1. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * exynos: spi: Convert the timeout to debug()Simon Glass2015-08-05-3/+3
| | | | | | | | | | | | | | | | | | | | | | Since the timeout is reported through normal channels, and is sometimes expected (e.g. if the bus is being probed for a non-existent device), don't display the message in the driver. In general, drivers should not write to the console as this limits their usefulness in error conditions. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: video: Add support for the NXP PTN3460 bridgeSimon Glass2015-08-05-0/+48
| | | | | | | | | | | | | | | | | | This chip provides an eDP to LVDS bridge which is useful for SoCs that don't support LVDS displays (or it would waste scarce pins). There is no setup required by this chip, other than to adjust power-down and reset pins, and those are managed by the uclass. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: video: Add support for the Parade PS8622/625 bridgeSimon Glass2015-08-05-0/+145
| | | | | | | | | | | | | | | | This chip provides an eDP to LVDS bridge which is useful for SoCs that don't support LVDS displays (or it would waste scarce pins). The setup is included in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
| * video: Work around lack of pinctrlSimon Glass2015-08-05-10/+18
| | | | | | | | | | | | | | | | | | | | We haven't quite got pinctrl ready to apply to mainline. We don't want to GPIO pull-up/down support to the driver model GPIO layer either. So work around this for now. We can address this when pinctrl is complete. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: video: Add support for video bridgesSimon Glass2015-08-05-0/+130
| | | | | | | | | | | | | | | | | | A video bridge typically converts video from one format to another, e.g. DisplayPort to LVDS. Add driver model support for these with a simple interface to control activation and backlight. The uclass supports GPIO control of power and reset lines. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: power: Don't return an error when regulators are not autosetSimon Glass2015-08-05-1/+3
| | | | | | | | | | | | | | | | | | Not all regulators can be set up automatically. Adjust the code so that regulators_enable_boot_on() will return success when some are skipped. Only genuine errors are reported. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
| * dm: pmic: max77686: Support all BUCK regulatorsSimon Glass2015-08-05-8/+10
| | | | | | | | | | | | | | Add support for all BUCK regulators, now that the correct register is accessed for each. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: power: max77686: Correct BUCK register accessSimon Glass2015-08-05-3/+7
| | | | | | | | | | | | | | | | Some regulators use the wrong voltage register and thus it is not possible to control them. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
| * dm: pmic: Correct the pmic_reg_write() implementationSimon Glass2015-08-05-1/+1
| | | | | | | | | | | | | | This should write the register, not read it. Fix this bug. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
| * dm: pmic: max77686: Correct a few nitsSimon Glass2015-08-05-3/+3
| | | | | | | | | | | | | | | | The driver name should not have a space in it. Also the regulator names should match the case of the device tree. Fix these problems. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
| * dm: power: Add support for S5M8767 regulatorsSimon Glass2015-08-05-0/+279
| | | | | | | | | | | | | | | | | | This PMIC is used with SoCs which need a combination of BUCKs and LDOs. The driver supports changing voltage and enabling/disabling each regulator. It supports the standard device tree binding and supports driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
| * dm: power: Add support for the S5M8767 PMICSimon Glass2015-08-05-0/+106
| | | | | | | | | | | | | | | | | | | | This PMIC is used with SoCs which need a combination of BUCKs and LDOs. The driver supports probing and basic register access. It supports the standard device tree binding and supports driver model. A regulator driver can be provided also. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
| * dm: power: Add support for TPS65090 FETsSimon Glass2015-08-05-0/+149
| | | | | | | | | | | | | | | | | | The TPS65090 has 7 FETs which are modelled as regulators. This allows them to be controlled by drivers easier, accessed through the 'regulator' command and used by other drivers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
| * dm: power: Add a new driver for the TPS65090 PMICSimon Glass2015-08-05-0/+104
| | | | | | | | | | | | | | | | | | The existing TPS65090 driver does not support driver model. Add a new one that does. This can be used as a base for a regulator driver also. It uses the standard device tree binding. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
| * exynos: Enable the debug UART in SPLSimon Glass2015-08-05-0/+2
| | | | | | | | | | | | | | | | As a debugging aid, allow UART3 to be used as a debug UART in SPL. This is a precursor to proper UART support, which requires a substantial refactor. Signed-off-by: Simon Glass <sjg@chromium.org>
| * exynos: Add debug UART support for Samsung S5P serialSimon Glass2015-08-05-0/+32
| | | | | | | | | | | | | | Add a debug UART implementation for this serial driver. It does not set up pinmux automatically - this must be done before calling debug_uart_init(). Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-10-09 17:17:42 +0000