summaryrefslogtreecommitdiff
path: root/drivers
Commit message (Collapse)AuthorAgeLines
* cros_ec: Drop unused CONFIG_DM_CROS_ECSimon Glass2015-04-18-336/+0
| | | | | | | Since all supported boards enable this option now, we can remove it along with the old code. Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: Reinit the cros_ec device when 'crosec init' is usedSimon Glass2015-04-18-2/+8
| | | | | | | This command is supposed to reinit the device. At present with driver model is does nothing. Implement this feature. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: cros_ec: Convert cros_ec LPC driver to driver modelSimon Glass2015-04-18-0/+50
| | | | | | | This is the last driver to be converted. It requires an LPC bus and a special check_version() method. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: x86: spi: Convert ICH SPI driver to driver modelSimon Glass2015-04-18-254/+265
| | | | | | | | | | | | Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: sf: Add driver model read/write/erase methodsSimon Glass2015-04-18-0/+16
| | | | | | | | Permit use of a udevice to talk to SPI flash. Ultimately we would like to retire the use of 'struct spi_flash' for this purpose, so create the new API for those who want to move to it. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: eth: Add support for using the 'lo' interfaceJoe Hershberger2015-04-18-2/+69
| | | | | | | | | | | | | | | The 'lo' interface on Linux doesn't support thinks like ARP or link-layer access like we use to talk to a normal network interface. A higher-level network API must be used to access localhost. As written, this interface is limited to not supporting ICMP since the API doesn't allow the socket to be opened for all IP traffic and be able to receive at the same time. UDP is far more useful to test with, so it was selected over ICMP. Ping won't work, but things like TFTP should work. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* sandbox: eth: Add a bridge to a real network for sandboxJoe Hershberger2015-04-18-0/+109
| | | | | | | | | | | | | | Implement a bridge between U-Boot's network stack and Linux's raw packet API allowing the sandbox to send and receive packets using the host machine's network interface. This raw Ethernet API requires elevated privileges. You can either run as root, or you can add the capability needed like so: sudo /sbin/setcap "CAP_NET_RAW+ep" /path/to/u-boot Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* sandbox: eth: Add ability to disable ping reply in sandbox eth driverJoe Hershberger2015-04-18-0/+17
| | | | | | | | This is needed to test the netretry functionality (make the command fail on a sandbox eth device). Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* sandbox: eth: Add ARP and PING response to sandbox driverJoe Hershberger2015-04-18-0/+107
| | | | | | | | | The sandbox driver will now generate response traffic to exercise the ping command even when no network exists. This allows the basic data pathways of the DM to be tested. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* sandbox: eth: Add network support to sandboxJoe Hershberger2015-04-18-0/+108
| | | | | | | Add basic network support to sandbox which includes a network driver. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: eth: Add basic driver model support to Ethernet stackJoe Hershberger2015-04-18-0/+9
| | | | | | | First just add support for MAC drivers. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* net: Remove the bd* parameter from net stack functionsJoe Hershberger2015-04-18-6/+5
| | | | | | | | | | | | | This value is not used by the network stack and is available in the global data, so stop passing it around. For the one legacy function that still expects it (init op on old Ethernet drivers) pass in the global pointer version directly to avoid changing that interface. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reported-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Trival fix to remove an unneeded variable declaration in 4xx_enet.c)
* common: Make sure arch-specific map_sysmem() is definedJoe Hershberger2015-04-18-0/+6
| | | | | | | | | | | In the case where the arch defines a custom map_sysmem(), make sure that including just mapmem.h is sufficient to have these functions as they are when the arch does not override it. Also split the non-arch specific functions out of common.h Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: x86: pci: Add a PCI driver for driver modelSimon Glass2015-04-18-0/+25
| | | | | | | Add a simple x86 PCI driver which uses standard functions provided by the architecture. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: sandbox: pci: Enable PCI for sandboxSimon Glass2015-04-18-0/+1
| | | | | | | Enable PCI options so that sandbox can be used for testing this bus with driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: sandbox: Add a emulated PCI device as an exampleSimon Glass2015-04-18-0/+285
| | | | | | | | This device sits on the sandbox PCI bus and provides a case-swapping service for sandbox. It illustrates the use of both PCI I/O and PCI memory accesses. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: sandbox: pci: Add a PCI emulation uclassSimon Glass2015-04-16-0/+68
| | | | | | | | Since sandbox does not have real devices (unless it borrows those from the host) it must use emulations. Provide a uclass which permits PCI operations to be passed through to an emulation device. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: sandbox: Add a simple PCI driverSimon Glass2015-04-16-0/+90
| | | | | | | Add a driver which can access emulations of devices and make them available in sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: pci: Add a uclass for PCISimon Glass2015-04-16-4/+714
| | | | | | | | | | | Add a uclass for PCI controllers and a generic one for PCI devices. Adjust the 'pci' command and the existing PCI support to work with this new uclass. Keep most of the compatibility code in a separate file so that it can be removed one day. TODO: Add more header file comments to the new parts of pci.h Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: pci: Move common PCI functions into their own fileSimon Glass2015-04-16-276/+299
| | | | | | | Driver model will share many functions with the existing PCI implementation. Move these into their own file to avoid duplication and confusion. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Add a uclass pre_probe() method for devicesSimon Glass2015-04-16-2/+10
| | | | | | | | | | | | Some uclasses want to set up a device before it is probed. Add a method for this. An example is with PCI, where a PCI uclass wants to set up its private data for later use. This allows the device's uclass() method to make calls whcih use that data (for example, read PCI memory regions from device tree, set up bus numbers). Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Mark device as active before calling its probe() methodSimon Glass2015-04-16-3/+4
| | | | | | | | | | | | | | | | | | At present the device is not active when the probe() method is called. But some probe() methods want to set up the device and this can involve accessing it through normal methods. For example a PCI bus may wish to set up its PCI parameters using calls to pci_hose_write_config_dword() and similar. At present this does not work because every such call within the probe() method sees that the device is not active and attempts to probe it. Already we mark the device as probed before calling the uclass post_probe() method. This is a subtle change but I believe the new approach is better. Since the scope of the change is only the probe() method and all its callees it should still be within the control of the board author. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Add dev_get_uclass_priv() to access uclass private dataSimon Glass2015-04-16-42/+52
| | | | | | | | Add a convenience function to access the private data that a uclass stores for each of its devices. Convert over most existing uses for consistency and to provide an example for others. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add a x86_ prefix to the x86-specific PCI functionsSimon Glass2015-04-16-8/+8
| | | | | | | | | | | | These functions currently use a generic name, but they are for x86 only. This may introduce confusion and prevents U-Boot from using these names more widely. In fact it should be possible to remove these at some point and use generic functions, but for now, rename them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: spi: Add support for lynxpointSimon Glass2015-04-16-1/+2
| | | | | | | Add Lynxpoint to the driver so that the Asus Chromebox can be supported. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* x86: video: Allow keyboard presence to be controlled by device treeSimon Glass2015-04-16-8/+21
| | | | | | | | At present a VGA console assumes a keyboard unless a CONFIG option is set. This difference can be dealt with by a device tree option, allowing boards that are otherwise the same to use the same configuration. Signed-off-by: Simon Glass <sjg@chromium.org>
* ti: dwc3: Enable clocks in enable_basic_clocks() in hw_data.cKishon Vijay Abraham I2015-04-16-16/+0
| | | | | | | | | | | | | | | | Commit d3cfcb3 (ARM: DRA7: Enable clocks for USB OTGSS and USB PHY) changed the member names of prcm_regs from cm_l3init_usb_otg_ss_clkctrl to cm_l3init_usb_otg_ss1_clkctrl and from cm_coreaon_usb_phy_core_clkctrl to cm_coreaon_usb_phy1_core_clkctrl in order to differentiate between the two dwc3 controllers present in dra7xx/am43xx and enabled these clocks in enable_basic_clocks() in hw_data.c. However these clocks continued to be enabled in board files/driver files for dwc3 host mode functionality causing compilation break with few configs. Fixed it here by making all the clocks enabled in enable_basic_clocks() and removing it from board files/driver files here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-04-16-153/+185
|\
| * i2c: mvtwsi: Support for up to 4 different controllersPaul Kocialkowski2015-04-15-29/+99
| | | | | | | | | | | | | | | | | | | | | | | | Orion5x, Kirkwood and Armada XP platforms come with a single TWSI (I2C) MVTWSI controller. However, other platforms using MVTWSI may come with more: this is the case on Allwinner (sunxi) platforms, where up to 4 controllers can be found on the same chip. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: axp221: Use vbus-available rather then vbus-usable for vbus-detectHans de Goede2015-04-15-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vbus-usable may not get set if power is provided through both the power barrel connector and external 5v is also present on the otg connector, at least on boards where vbus is also controlled through the axp221-pmic. One way to reproduce this is to bootup an Ippo-q8h board with a usb-host cable plugged into the otg (so that it will get powered), then unplug the usb-host cable and plug in a charger, and then do "reset" on the u-boot console, vbus-usable will then report 0, leading to uboot trying to provide power to the otg port even though external 5v is present, this commit fixes this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * power: axp209: Registers definitions in headerPaul Kocialkowski2015-04-15-38/+0
| | | | | | | | | | | | Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * power: axp152: Registers definitions in headerPaul Kocialkowski2015-04-15-11/+0
| | | | | | | | | | | | Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Complete mmc pin mux for each supported platform, configured with KconfigPaul Kocialkowski2015-04-15-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | Sunxi platforms have different possible mmc pin mux setups (except for mmc0), which are different across platforms. This lets users configure which is used through the CONFIG_MMC*_PINS Kconfig options. This is especially relevant when a second (in addition to mmc0) port is used and CONFIG_MMC_SUNXI_SLOT_EXTRA is enabled. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: GPIO pin mux hardware-feature-specific function index definesPaul Kocialkowski2015-04-15-5/+5
| | | | | | | | | | | | | | | | | | | | | | Each hardware feature exposed through the GPIO pin mux is usually using the same function index (for a given port), so there is no need to define one value per pin: one value per hardware feature per port is sufficient, avoids duplication and makes everything easier to understand. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: common VBUS detection logic in usbcPaul Kocialkowski2015-04-15-29/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | VBUS detection could be needed not only by the musb code (to prevent host mode), but also by e.g. gadget drivers to start only when a cable is connected. In addition, this allows more flexibility in vbus detection, as it could easily be extended to other USBC indexes. Eventually, this would help making musb support independent from a hardcoded USB controller index (0). Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * power: axp209: VBUS detection supportPaul Kocialkowski2015-04-15-1/+9
| | | | | | | | | | | | Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: usb: Drop AXP-sepcific VBUS detection and drive logicPaul Kocialkowski2015-04-15-29/+19
| | | | | | | | | | | | | | | | | | VBUS detection and enable is now be used with virtual AXP GPIOs, so all the USB code has to use GPIO in every case and let sunxi_gpio do the heavy lifting. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * power: axp221: Virtual VBUS detect and enable GPIOs to replace separate logicPaul Kocialkowski2015-04-15-31/+53
| | | | | | | | | | | | | | | | | | This converts the VBUS detection and enable logic to GPIO instead of separate axp functions and checks that have to be used aside usual GPIO functions. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | fastboot: add support for reboot-bootloader commandAlexey Firago2015-04-14-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "fastboot reboot-bootloader" command is defined to re-enter into fastboot mode after rebooting into bootloader. This command is usually used after updating bootloader via fastboot. This commit implements only a generic side of the command - setting of the reset flag and then resetting. Setting of the reset flag is implemented using __weak fb_set_reboot_flag() function. The actual setting and checking of the reset flag should be implemented by a boot script and/or board/SoC specific code. Signed-off-by: Alexey Firago <alexey_firago@mentor.com> Tested-by: Steve Rae <srae@broadcom.com> [Test HW: bcm28155_ap board]
* | usb: gadget: thor: Claim EP after allocating it in thor gadgetMarek Szyprowski2015-04-14-0/+3
| | | | | | | | | | | | | | Storing thor device struct as an EP private data. It is necessary for DWC3 operation. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
* | usb: dwc3: Correct clean up code for requestsLukasz Majewski2015-04-14-24/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For u-boot dwc3 driver the scatter gather list support has been removed from original linux code. It is correct, since we try to send one request at a time. However, the cleanup left spurious break, which caused early exit from loop at dwc3_cleanup_done_reqs() function. As a result the dwc3_gadget_giveback() wasn't called and caused USB Mass Storage to hang. This commit removes this problem and refactor the code to remove superfluous do { } while(1) loop. Test HW: Odroid XU3 (with ./test/ums/ums_gadget_test.sh) Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
* | usb: dwc3: gadget: Set non EP0 max packet limit to 512BLukasz Majewski2015-04-14-1/+1
| | | | | | | | | | | | | | | | | | | | Commit "drivers/dwc3: add a workaround for too small OUT requests" sets max packet for OUT requests when transfer is smaller. Until this change the default maxpacket for non EP0 EPs was 1024. This is too much, since UMS LBA size is 512B Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
* | usb: dwc3: gadget: Set all ctrl fields of Transfer Control Blocks (TRB) to ↵Lukasz Majewski2015-04-14-13/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | be LST It turned out that current dwc3 gadget code is preparing multiple TRBs for a transfer. Unfortunately, when multiple requests are in the same queue, only for the last one the LST (last) ctrl bit is set. Due to that dwc3 HW executes all TRBs up till the one marked as last. Unfortunately, UMS requires call of ->complete callback after any send TRB. This is the reason for "hangs" in executing UMS. This code simplifies this situation and set each TRB's ctrl field bit to be last (LST bit). Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
* | usb: dwc3: optimize interrupt loopMarek Szyprowski2015-04-14-9/+13
| | | | | | | | | | | | | | | | There is no point in calling dwc3_thread_interrupt() if no event is pending. There is also no point in flushing event cache in EVERY loop iteration. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
* | usb: dwc3: gadget: add common endpoint configuration for dwc3 udc driverMarek Szyprowski2015-04-14-1/+31
| | | | | | | | | | | | | | | | | | This patch adds code to select standard, commonly used usb endpoint configuration (ep1in-bulk, ep2out-bulk, ep3in-int) to dwc3 driver. This ensures compatibility with old userspace and windows drivers, which expects hardcoded endpoint numbers. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
* | usb: dwc3: add a workaround for too small OUT requestsMarek Szyprowski2015-04-14-0/+8
| | | | | | | | | | | | | | DWC3 hangs on OUT requests smaller than maxpacket size, so HACK the request length to be at least equal to maxpacket size. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
* | usb: dwc3: make dwc3_set_mode to staticJoonyoung Shim2015-04-14-2/+1
| | | | | | | | | | | | | | This commit makes the dwc3_set_mode() as static, to prevent collisions. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
* | usb: dwc3: Remove BIT(x) macro from DWC3's gadget codeLukasz Majewski2015-04-14-2/+2
| | | | | | | | | | | | | | The BIT() macro is used only in those places, so it is reasonable to replace it by a constant value. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
* | usb: composite: Add .reset callback to usb_gadget_driver structureLukasz Majewski2015-04-14-0/+1
| | | | | | | | | | | | | | DWC3 UDC driver requires presence of .reset callback in a composite driver. This setting is similar to the one nowadays present in linux kernel. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
* | usb: modify usb_gadget_handle_interrupts to take controller indexKishon Vijay Abraham I2015-04-14-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we support multiple dwc3 controllers to be existent at the same time, in order to handle the interrupts of a particular dwc3 controller usb_gadget_handle_interrutps should take controller index as an argument. Hence the API of usb_gadget_handle_interrupts is modified to take controller index as an argument and made the corresponding changes to all the usb_gadget_handle_interrupts calls. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
generated by cgit v1.1 at 2024-10-30 07:28:28 +0000