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* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-06-12-0/+7
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| * sunxi: musb: Properly turn of musb controller before bootingHans de Goede2016-06-10-0/+7
| | | | | | | | | | | | | | | | Turn of the clock and assert the reset when musb_stop gets called, so that the os gets the musb controller in a pristine state. This fixes a spurious VBus error interrupt triggering as soon as the Linux musb driver loads. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-06-12-0/+457
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| * | spi: pic32_spi: add SPI master driver for PIC32 SoC.Purna Chandra Mandal2016-06-10-0/+457
| |/ | | | | | | | | | | | | | | | | | | | | | | This driver implements SPI protocol in master mode to communicate with the SPI device connected on SPI bus. It handles /CS explicitly by controlling respective pin as gpio ('cs-gpios' property in dt node) and uses PIO mode for SPI transaction. It is configurable based on driver-model only. Cc: Jagan Teki <jteki@openedev.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-06-12-5/+5
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| * | block: dwc_ahsata: support i.MX6DQPlusPeng Fan2016-05-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i.MX6DQPlus support sata interface, so not return failure when CPU is i.MX6DQPlus. In this patch, also use simpler runtime cpu dections macros to replace is_cpu_type. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Tang Yuantian <Yuantian.Tang@freescale.com> Cc: Shaohui Xie <Shaohui.Xie@freescale.com> Cc: Bin Meng <bmeng.cn@gmail.com>
| * | net: fec_mxc: use simpler runtime cpu dection macrosPeng Fan2016-05-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * | ocotp: mxc: use simpler runtime cpu dection macrosPeng Fan2016-05-24-2/+2
| | | | | | | | | | | | | | | | | | | | | Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
| * | mtd: nand: mxs: use simpler runtime cpu dection macrosPeng Fan2016-05-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Scott Wood <oss@buserror.net>
* | | Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-06-12-12/+0
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| * | | x86: broadwell: gpio: Remove the codes to set up pin controlBin Meng2016-06-12-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have set up pin control in cpu_init_r(), remove the duplicated codes in the broadwell gpio driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | x86: Probe pinctrl driver in cpu_init_r()Bin Meng2016-06-12-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present pinctrl driver gets probed in ich6_gpio driver's probe routine, which has two issues: - Pin's PADs only gets configured when GPIO driver is probed, which is not done by default. This leaves the board in a partially functional state as we must initialize PADs correctly to get perepherals fully working. - The probe routine of pinctrl driver is called multiple times, as normally there are multiple GPIO controllers. It should really be called just once. Move the call to syscon_get_by_driver_data() from ich6_gpio driver to cpu_init_r(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: George McCollister <george.mccollister@gmail.com> Tested-by: George McCollister <george.mccollister@gmail.com>
| * | | x86: ich6_gpio: Output return value of syscon_get_by_driver_data()Bin Meng2016-06-12-1/+3
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | The call to syscon_get_by_driver_data() does not save its return value. Print it out to aid debugging. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | drivers: i2c: mxc: Add early initYuan Yao2016-06-10-0/+32
|/ / | | | | | | | | | | | | | | Add early i2c init function with conservative divider when the exact clock rate is not available. Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | dfu, nand, ubi: fix erasing after write finishHeiko Schocher2016-06-09-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | writting to ubi nand partitions need after write ends an erase of the remaining sectors. This fail, if dfu write size was not a multiple of erasesize, example log: Failure erase: -1 Fix this error. Signed-off-by: Heiko Schocher <hs@denx.de>
* | mtd: nand: omap: allow to switch to BCH16Heiko Schocher2016-06-09-0/+4
| | | | | | | | | | | | | | support in omap_nand_switch_ecc() also an eccstrength from 16. Signed-off-by: Heiko Schocher <hs@denx.de>
* | nand: add nand mtd concat supportHeiko Schocher2016-06-09-0/+41
| | | | | | | | | | | | | | | | add for nand devices mtd concat support. Generic MTD concat support is already ported to mainline, and used in the cfi_mtd driver. This patch adds it similiar for nand devices. Signed-off-by: Heiko Schocher <hs@denx.de>
* | mmc: omap_hsmmc: enable 8bit interface for eMMC for AM33xxHeiko Schocher2016-06-09-0/+1
| | | | | | | | | | | | | | Enable 8bit interface on HSMMC2 for am33xx to support 8bit eMMC chips. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | mmc: revert mmc: Handle switch error status bit in MMC card statusHeiko Schocher2016-06-09-3/+1
| | | | | | | | | | | | | | | | | | revert patch: commit: 6b2221b008e0: mmc: Handle switch error status bit in MMC card status to get eMMC working on shc board Signed-off-by: Heiko Schocher <hs@denx.de>
* | Merge http://git.denx.de/u-boot-samsungTom Rini2016-06-06-1275/+2166
|\ \ | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: configs/peach-pi_defconfig configs/peach-pit_defconfig
| * | exynos: video: Drop old unused codeSimon Glass2016-05-25-74/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we are using driver model, we can drop the weak functions and LCD init in the board file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: video: Convert several boards to driver model for videoSimon Glass2016-05-25-198/+357
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update several boards to use driver model for video. This involves changes to the EDP and FIMD (frame buffer) drivers. Existing PWM, simple-panel and pwm-backlight drivers are used. These work without additional configuration since they use the device tree settings in the same way as Linux. Boards converted are: - snow - spring - peach-pit - peach-pi All have been tested. Not converted: - MIPI display driver - s5pc210_universal - smdk5420 - smdk5250 - trats - trats2 Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: video: Rename variables for driver modelSimon Glass2016-05-25-372/+369
| | | | | | | | | | | | | | | | | | | | | | | | Use 'priv' for a private pointer and 'regs' for a register pointer. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: video: Rename edp_device_info to exynos_dp_privSimon Glass2016-05-25-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rename this function to better fit with driver model. It is the private data for the exynos EDP driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: Simplify calling of exynos_dp_phy_ctrl()Simon Glass2016-05-25-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | This function controls enabling the EDP PHY. Rename it and drop the existing weak functions, which are confusing. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: pwm: Add a driver for the exynos5 PWMSimon Glass2016-05-25-0/+130
| | | | | | | | | | | | | | | | | | | | | | | | This driver supports the standard PWM API. There are 5 PWMs. Four are used normally and the last is normally used as a timer. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: video: Combine LCD driver into one fileSimon Glass2016-05-25-406/+387
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present exynos_fimd.c is the controller and exynos_fb.c is the U-Boot LCD interface. With driver model we want these in one file, so join them in preparation. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: video: Move mipi_lcd_device_dt into a functionSimon Glass2016-05-25-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for making this a parameter, move it into the function that sets it up. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: video: Move struct exynos_platform_mipi_dsim into vidinfoSimon Glass2016-05-25-16/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Put the pointer to this structure in struct vidinfo so that we can reference it without it being global. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: video: Move dsim_config_dt into a functionSimon Glass2016-05-25-18/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for making this a parameter, move it into the function that sets it up. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: video: Drop static variables in exynos_dp_lowlevel.cSimon Glass2016-05-25-285/+351
| | | | | | | | | | | | | | | | | | | | | | | | Drop these and use parameters instead. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: video: Drop static variables in exynos_fb.cSimon Glass2016-05-25-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | Drop these and use the existing variables instead. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: video: Drop static variables in exynos_fimd.cSimon Glass2016-05-25-23/+30
| | | | | | | | | | | | | | | | | | | | | | | | Drop these and use parameters instead. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: video: Drop the static lcd_base_addr variableSimon Glass2016-05-25-34/+15
| | | | | | | | | | | | | | | | | | | | | | | | Drop this and use parameters instead. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: video: Remove use of vidinfo_t typedefSimon Glass2016-05-25-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use 'struct vidinfo' instead so that we can change this to a struct with a different name in future. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: video: Drop dead codeSimon Glass2016-05-25-26/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We always use device tree with video, so can drop these #ifdefs. Some of the hardware addresses are not needed either. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: video: Move driver files into their own directorySimon Glass2016-05-25-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | Move all the exynos video drivers into one place for ease of maintenance. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | serial: s5p: use clock api to get clock rateThomas Abraham2016-05-25-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Exynos platforms that support clock driver API, allow the driver to use clock api get the SCLK clock rate. Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | serial: s5p: get the port id number from the alias of the device nodeThomas Abraham2016-05-25-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The port id, if not specified in the device node, can be obtained from the alias of the device node listed in the aliases node. Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | clk: exynos: add clock driver for Exynos7420 SocThomas Abraham2016-05-25-0/+307
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a clock driver for Exynos7420 SoC. There are about 25 clock controller blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks are added in this initial version of the driver. Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | pinctrl: Add pinctrl driver support for Exynos7420 SoCThomas Abraham2016-05-25-0/+359
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl driver support for Samsung's Exynos7420 SoC. The changes have been split into Exynos7420 specific and common Exynos specific portions so that this implementation is reusable on other Exynos SoCs as well. The Exynos pinctrl driver supports only device tree based pin configuration. The bindings used are similar to the ones used in the linux kernel. Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | pinctrl: add the DM_UC_FLAG_SEQ_ALIAS flag for numbering the devicesThomas Abraham2016-05-25-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is possible to have multiple pin controllers in the system. Use the DM_UC_FLAG_SEQ_ALIAS flag so that the pinctrl instances are assigned a sequence number. Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-06-06-7/+7
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modified: configs/ls1012afrdm_qspi_defconfig configs/ls1012aqds_qspi_defconfig configs/ls1012ardb_qspi_defconfig include/configs/ls1012afrdm.h include/configs/ls1012aqds.h include/configs/ls1012ardb.h Signed-off-by: Tom Rini <trini@konsulko.com>
| * | | usb: move CONFIG_USB_XHCI_DWC3 to KconfigMasahiro Yamada2016-06-04-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Create an entry for "config USB_XHCI_DWC3" in Kconfig and switch over to it for all boards. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | usb: move CONFIG_USB_XHCI to Kconfig with renamingMasahiro Yamada2016-06-04-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move CONFIG_USB_XHCI to defconfig files for all boards, renaming it into CONFIG_USB_XHCI_HCD. As commented in the help of "config USB_XHCI" entry, this has been a TODO for a long time; now CONFIG_USB_XHCI_HCD and CONFIG_USB_XHCI have been unified in favor of the former. Note: Some boards define CONFIG_USB_XHCI in their headers without CONFIG_USB, which does not meet the "depends on" in Kconfig. I added CONFIG_USB=y for those boards when converting. Otherwise, they would fail to build. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2016-06-04-0/+322
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| * | | | dm: test: Add GPIO open drain testsmario.six@gdsys.cc2016-06-03-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add some tests for the new open drain setting feature of the GPIO uclass, and extend the capabilities of the sandbox GPIO driver accordingly. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | dm: gpio: Implement open drain for MPC85XX GPIOmario.six@gdsys.cc2016-06-03-3/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements the open-drain setting feature for the MPC85XX GPIO controller. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | dm: gpio: Add methods for open drain settingmario.six@gdsys.cc2016-06-03-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Certain GPIO devices have the capability to switch their GPIOs into open-drain mode, that is, instead of actively driving the output (Push-pull output), the pin is connected to the collector (for a NPN transistor) or the drain (for a MOSFET) of a transistor, respectively. The pin then either forms an open circuit or a connection to ground, depending on the state of the transistor. This patch adds functions to the GPIO uclass to switch GPIOs to open-drain mode on devices that support it. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | dm: gpio: Add driver for MPC85XX GPIO controllermario.six@gdsys.cc2016-06-03-0/+214
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a driver for the built-in GPIO controller of the MPC85XX SoC (probably supporting other PowerQUICC III SoCs as well). Each GPIO bank is identified by its own entry in the device tree, i.e. gpio-controller@fc00 { #gpio-cells = <2>; compatible = "fsl,pq3-gpio"; reg = <0xfc00 0x100> } By default, each bank is assumed to have 32 GPIOs, but the ngpios setting is honored, so the number of GPIOs for each bank in configurable to match the actual GPIO count of the SoC (e.g. the 32/32/23 banks of the P1022 SoC). The usual functions of GPIO drivers (setting input/output mode and output value setting) are supported. The driver has been tested on MPC85XX, but it is likely that other PowerQUICC III devices will work as well. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
generated by cgit v1.1 at 2024-11-02 14:08:17 +0000