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* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-09-26-292/+224
|\ | | | | | | | | | | | | trini: Drop local memset() from examples/standalone/mem_to_mem_idma2intr.c Signed-off-by: Tom Rini <trini@konsulko.com>
| * driver: ddr: fsl_mmdc: Pass board parameters through data structureYork Sun2016-09-26-19/+19
| | | | | | | | | | | | | | | | | | Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig option ARCH_LS1046AYork Sun2016-09-26-1/+1
| | | | | | | | | | | | | | | | | | Move this option to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> CC: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * ddr: fsl: fix a compile issueShaohui Xie2016-09-14-1/+6
| | | | | | | | | | | | | | | | | | | | When CONFIG_SYS_FSL_ERRATUM_A009801 is defined but CONFIG_SYS_FSL_ERRATUM_A008511 not defined, there is compile error that temp32 undeclared, this patch fixes it. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012aShengzhou Liu2016-09-14-0/+157
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080a: Remove debug server supportYork Sun2016-09-14-251/+0
| | | | | | | | | | | | Debug server feature has been dropped from roadmap. Signed-off-by: York Sun <york.sun@nxp.com>
| * driver/ddr/fsl: Revise workaround A008511 for A009803York Sun2016-09-14-36/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DDR controller 5.2.1 has this erratum A008511 partially fixed. The workaround needs to be adjusted to take advantage of Vref training. This patch enables the training and force output enable to be off. Erratum A009803 requires the controller to be idel before enabling address parity. It was combined with workaround for A008511. With new A008511 flow, this flow needs to be changed to enabling data init (D_INIT) after the address parity is enabled. Signed-off-by: York Sun <york.sun@nxp.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
| * driver/ddr/fsl: Add more debug registersYork Sun2016-09-14-3/+3
| | | | | | | | | | | | | | 32 more debug registers are added for newer DDR controllers. Signed-off-by: York Sun <york.sun@nxp.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
| * net: fm: fix spi flash probe for using driver modelQianyu Gong2016-09-14-0/+10
| | | | | | | | | | | | | | | | | | | | | | The current code would always use the speed and mode set by CONFIG_ENV_SPI_MAX_HZ and CONFIG_ENV_SPI_MODE. But if using SPI driver model it should get the values from DT. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | kconfig: introduce kconfig for UBIHeiko Schocher2016-09-26-0/+100
| | | | | | | | | | | | | | | | | | move the UBI config options into Kconfig. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andrew F. Davis <afd@ti.com> Reviewed by: Evgeni Dobrev <evgeni at studio-punkt.com>
* | i2c: mvtwsi.c: Add support for Marvell Armada 7K/8KStefan Roese2016-09-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By adding the "marvell,mv78230-i2c" compatible property, we can enable this I2C driver to support these new ARM64 chips as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Heiko Schocher <hs@denx.de>
* | i2c: mv_i2c.c: Validate read length in I2C commandjinghua2016-09-26-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The I2C bus will get stuck when reading 0 byte. So we add validation of the read length in i2c_read(). This issue only occurs on read operation. Signed-off-by: jinghua <jinghua@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Heiko Schocher <hs@denx.de>
* | i2c: mv_i2c.c: Enable runtime speed selection (standard vs fast mode)Stefan Roese2016-09-26-7/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds runtime speed configuration to the mv_i2c driver. Currently standard (max 100kHz) and fast mode (max 400kHz) are supported. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Heiko Schocher <hs@denx.de>
* | i2c: mv_i2c.c: Add DM supportStefan Roese2016-09-26-48/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Heiko Schocher <hs@denx.de>
* | i2c: mv_i2c.c: Prepare driver for DM conversionStefan Roese2016-09-26-126/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To prepare for the DM conversion, we add a layer of compatibility functions to be used by both the legacy and the DM functions. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Heiko Schocher <hs@denx.de>
* | i2c: mv_i2c.c: Remove CONFIG_HARD_I2CStefan Roese2016-09-26-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_HARD_I2C is not needed, lets remove it. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Heiko Schocher <hs@denx.de>
* | i2c: mv_i2c.c: cosmetic: Coding style cleanupsStefan Roese2016-09-26-34/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some mostly indentation coding style cleanups. Also, move this driver to use debug() for debug output. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Heiko Schocher <hs@denx.de>
* | usb: ehci-generic: support reset control for generic EHCIMasahiro Yamada2016-09-23-0/+13
| | | | | | | | | | | | | | This driver is designed in a generic manner, so resets should be handled generically as well. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Move ENOTSUPP defines to include/linux/errno.hMasahiro Yamada2016-09-23-2/+0
| | | | | | | | | | | | Collect a couple of duplicated defines into a single place. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | treewide: replace #include <asm-generic/errno.h> with <linux/errno.h>Masahiro Yamada2016-09-23-19/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Now, include/linux/errno.h is a wrapper of <asm-generic/errno.h>. Replace all include directives for <asm-generic/errno.h> with <linux/errno.h>. <asm-generic/...> is supposed to be included from <asm/...> when arch-headers fall back into generic implementation. Generally, they should not be directly included from .c files. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Add drivers/usb/host/xhci-rockchip.c] Signed-off-by: Tom Rini <trini@konsulko.com>
* | treewide: replace #include <asm/errno.h> with <linux/errno.h>Masahiro Yamada2016-09-23-118/+118
| | | | | | | | | | | | | | | | | | | | | | Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com>
* | treewide: use #include <...> to include public headersMasahiro Yamada2016-09-23-21/+21
| | | | | | | | | | | | | | | | | | We are supposed to use #include <...> to include headers in the public include paths. We should use #include "..." only for headers in local directories. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | drivers: squash lines for immediate returnMasahiro Yamada2016-09-23-38/+9
| | | | | | | | | | | | Remove unneeded variables and assignments. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | usb: squash lines for immediate returnMasahiro Yamada2016-09-23-6/+1
| | | | | | | | | | | | This makes functions much simpler. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | usb: replace ehci_*_remove() with usb_deregister()Masahiro Yamada2016-09-23-90/+8
| | | | | | | | | | | | | | | | The remove callbacks of EHCI drivers are often just a wrapper of ehci_deregister. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Stephen Warren <swarren@nvidia.com>
* | video: squash lines for immediate returnMasahiro Yamada2016-09-23-27/+5
| | | | | | | | | | | | | | | | | | | | | | | | For vidconsole_post_probe(), it is common coding style to let a probe method return the value of a register function. The others will become simple wrapper functions. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
* | mmc: squash lines for immediate returnMasahiro Yamada2016-09-23-62/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | These functions can be much simpler by squashing lines for immediate return. For *_bind() callbacks, they will be a simple wrapper function of an upper-level bind API. For mmc_set_{boot_bus_width,part_conf}, they will be a wrapper of mmc_switch(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* | Merge git://git.denx.de/u-boot-rockchipTom Rini2016-09-22-17/+856
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| * | clk: rk3288: add PWM clock get rateKever Yang2016-09-22-0/+2
| | | | | | | | | | | | | | | | | | | | | This patch add clk_get_rate for PWM device. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | clk: rk3399: add pmucru controller supportKever Yang2016-09-22-4/+173
| | | | | | | | | | | | | | | | | | | | | | | | pmucru is a module like cru which is a clock controller manage some PLL and module clocks. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | usb: host: add Kconfig for USB_XHCI_ROCKCHIPKever Yang2016-09-22-0/+7
| | | | | | | | | | | | | | | | | | | | | Add a Kconfig for Rockchip xhci controller. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Marek Vasut <marex@denx.de>
| * | usb: xhci-rockchip: add rockchip dwc3 controller driverMengDongyang2016-09-22-0/+212
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support for rockchip dwc3 controller, which corresponding to the two type-C port on rk3399 evb. Only support usb2.0 currently for we have not enable the usb3.0 phy driver and PD(fusb302) driver. Signed-off-by: MengDongyang <daniel.meng@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | rk_pwm: remove grf setting code from driverKever Yang2016-09-22-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | We consider the grf setting for pwm controller select as the system operation instead of driver operation, move it to soc init, let's remove it from pwm driver first. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | rk_pwm: use clock framework API to get module clockKever Yang2016-09-22-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch use clock API instead of hardcode for get pwm clock. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Fix printf() to debug() nit: Signed-off-by: Simon Glass <sjg@chromium.org>
| * | pinctrl: add driver for rk3399Kever Yang2016-09-22-0/+449
| | | | | | | | | | | | | | | | | | | | | This patch add pinctrl driver for rk3399. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | ns16650: Make sure we have CONFIG_CLK set before using infrastructureTom Rini2016-09-22-2/+5
| | | | | | | | | | | | | | | | | | | | | We cannot call on the CONFIG_CLK based clk_get_rate function unless CONFIG_CLK is set. Signed-off-by: Tom Rini <trini@konsulko.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2016-09-22-82/+81
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| * | | clk: uniphier: allow to have clock node under syscon nodeMasahiro Yamada2016-09-23-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | To sync the DT binding with Linux, the register base must be taken from the parent syscon node. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | clk: uniphier: move U_BOOT_DRIVER entry to core codeMasahiro Yamada2016-09-23-75/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move U_BOOT_DRIVER() entry from the data file (clk-uniphier-mio.c) to the core support file (clk-uniphier-core.c) because I do not want to repeat the driver boilerplate when I add more clock data. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | clk: uniphier: constify clock data arrays/structuresMasahiro Yamada2016-09-23-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | Clarify these clock data are constant. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2016-09-22-193/+176
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| * | | | spi: Kconfig: Move FSL_QSPI entry to non-dm placeJagan Teki2016-09-22-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since FSL_QSPI driver still supporting non-dm code better to move the Kconfig from DM undefined place. Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | | | sf: Move flags macro's to spi_flash_params{} membersJagan Teki2016-09-22-13/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves flags macro's to respective member position on spi_flash_params{}, for better readabilty and finding the respective member macro's easily. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | | | sf: Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flashJagan Teki2016-09-22-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash code from header file. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | | | sf: Remove SECT_32KJagan Teki2016-09-22-16/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SECT_32K never used anywhere in the code. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | | | spi: Use mode for rx mode flagsJagan Teki2016-09-22-18/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make rx mode flags as generic to spi, earlier mode_rx is maintained separately because of some flash specific code. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | | | sf: Remove e_rd_cmd from param tableJagan Teki2016-09-22-117/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | e_rd_cmd is maintained separately for fastest read command code, since the read commands are computed normally this e_rd_cmd is not required in spi_flash_params table. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | | | sf: Simplify fastest read cmd codeJagan Teki2016-09-22-18/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fastest read command code look for fastest read command taking inputs from spi->mode_rx and flags from param table and controller mode_rx is always been a priority. Since mode_rx is always set from controller side this optimized code doesn't require much and this code required exctra overhead like 1) Maintain e_rx_cmd in param table 2) Maintain mode_rx in spi_slave {} Hence removed this code, and look for read command from normal spi->mode from spi_slave{} and params->flags Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | | | spi: ti_qspi: Remove unnecessary udelay for AM437xVignesh R2016-09-22-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This udelay() was added as an HACK and is no longer required. All read/write/erase operations work fine even without this delay. Hence, remove the udelay() call. Tested read/write/erase operation on AM437x SK. Also tested QSPI Boot. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | | | spi: ti_qspi: use 128 bit transfer mode when writing to flashVignesh R2016-09-22-6/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TI QSPI has four 32 bit data registers which can be used to transfer 16 bytes of data at once. The register group QSPI_SPI_DATA_REG_3, QSPI_SPI_DATA_REG_2, QSPI_SPI_DATA_REG_1 and QSPI_SPI_DATA_REG is treated as a single 128-bit word for shifting data in and out. The bit at QSPI_SPI_DATA_REG_3[31] position is the first bit to be shifted out in case of 128 bit transfer mode. Therefore the first byte to be written to flash should be at QSPI_SPI_DATA_REG_3[31-25] position. Instead of writing 1 byte at a time when interacting with SPI NOR flash, make use of all the four registers so that 16 bytes can be transferred in one go. With this patch, the flash write speed increases from ~250KBs/ to ~650KB/s on DRA74 EVM. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
generated by cgit v1.1 at 2024-11-09 14:25:26 +0000