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| * usb: dwc3: Move CONFIG_USB_DWC3_GADGET/HOST to KconfigSam Protsenko2016-04-20-0/+23
| | | | | | | | | | | | Description was borrowed from kernel dwc3 Kconfig. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
| * usb: gadget: Move CONFIG_USB_GADGET_DOWNLOAD to KconfigSam Protsenko2016-04-20-0/+6
| | | | | | | | | | | | | | While at it, remove obsolete CONFIG_USBDOWNLOAD_GADGET option from some config headers. This is also probably fixes am335x_baltos board. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
| * usb: gadget: Move CONFIG_USB_GADGET_DUALSPEED to KconfigSam Protsenko2016-04-20-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move CONFIG_USB_GADGET_DUALSPEED option to Kconfig and make all UDC controllers select USB_GADGET_DUALSPEED: - add next options to Kconfig selecting USB_GADGET_DUALSPEED: - USB_GADGET_ATMEL_USBA - USB_GADGET_DWC2_OTG - USB_DWC3 - CI_UDC - make USB_MUSB_GADGET select USB_GADGET_DUALSPEED While at it, make some related fixes: - remove DUALSPEED from configs that don't enable gadget support: - kwb.h - tseries.h - add missing USB_GADGET option to next configs: - novena_defconfig - pcm051_rev*_defconfig - xfi3_defconfig Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
| * usb: gadget: Move CONFIG_USB_GADGET_VBUS_DRAW to KconfigSam Protsenko2016-04-20-0/+21
| | | | | | | | | | | | | | | | | | | | | | The description was borrowed from kernel. Definitions were added to defconfig files in a way that "make savedefconfig" generates exactly the same file as used defconfig. Boards using 0 mA as CONFIG_USB_GADGET_VBUS_DRAW value were moved to use 2 mA (as minimal allowed by Kconfig). Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
| * USB: g_dnl: Change device classJohn Tobias2016-04-20-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The USB Mass Storage (ums) works in Windows, Linux and OS X (EL Capitan). But, not in OS X (Yosemite). By applying the said patch, it extends the ums support. Signed-off-by: John Tobias <john.tobias.ph@gmail.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Test HW: Odroid XU3 (./test/py UMS + DFU tests) Tested-by: John Tobias <john.tobias.ph@gmail.com> Linux: - Run ums to expose all my eMMC partition - shows all correctly - Run ums to expose only 1 partition of my eMMC - show correctly Windows: - Run ums to expose all my eMMC partition - it detects but it prompts, if I want to format it (due to a non windows partition) - Run ums to expose only the FAT32 partition - it show the partition correctly.
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2016-04-20-87/+97
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| * | ddr: altera: Repair DQ window centering codeMarek Vasut2016-04-20-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code uses a lot of signed numbers, which ended up in variables of unsigned type, which resulted in all sorts of underflows. This in turn caused incorrect calibration on certain boards. Moreover, repair the readout of the DQ delay, which was being pulled from wrong register. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Staticize global variablesMarek Vasut2016-04-20-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Just staticize global variables in sequencer, since there is no point in having these symbols available outside of the DDR code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Make DLEVEL behavior inclusiveMarek Vasut2016-04-20-66/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Originally, the DLEVEL selects the debug level within the sequencer code, but only displays the messages on that particular debug level. Tweak the handling such that for particular debug level, debug messages on that level and lower are displayed. This allows better regulation of debug message verbosity. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Zero DM IN delay in scc_mgr_zero_group()Marek Vasut2016-04-20-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | This one last set of delay configuration registers was not properly zeroed out originally, fix it and zero them out. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Remove unnecessary ODT mode configMarek Vasut2016-04-20-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no point in resetting the ODT setting if the write test failed, since the code will always retry the calibration and thus reconfigure the ODT anyway OR the code will fail calibration and halt. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Remove unnecessary update of the SCCMarek Vasut2016-04-20-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Every invocation of the scc_mgr_set_dqs_en_delay_all_ranks() is followed by SCC manager update. Moreover, only this function triggers the SCC manager update internally. Thus, remove the internal invocation to avoid triggering the update twice. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Fix DRAM end value in protection ruleMarek Vasut2016-04-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hi address bitfield in the protection rule must be set to the last address in the region which the rule represents. The behavior is now in-line with code generated by Quartus 15.1 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Fix scc_mgr_set() argument orderMarek Vasut2016-04-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code should be setting registers to zero, not one register to value. Swap the order of arguments to correct the behavior. The behavior is now in-line with code generated by Quartus 15.1 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Tweak DQS tracking enable handlingMarek Vasut2016-04-20-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the most unlikely case the DQS tracking was to be disabled, make sure we do not errornously re-enable it. Note that DQS tracking is enabled on all systems observed thus far. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Replace ad-hoc constant with macroMarek Vasut2016-04-20-2/+2
| |/ | | | | | | | | | | | | | | | | The bit 22 is in fact DQS tracking enable bit (dqstrken) and there is a macro for this bit already, so use it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* | ahci: flush dcache before issuing commandTang Yuantian2016-04-18-0/+1
| | | | | | | | | | | | | | Ensure data the following sata command used is flushed out of dcache and written to physical memory or timeout error may happen. Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
* | serial: bcm283x_mu: make pending values more explicitStephen Warren2016-04-18-2/+2
| | | | | | | | | | | | | | | | | | | | dm_serial_ops.pending should return the number of characters, not just a valid C Boolean integer value. The existing code does already does this, but only as an accident since BCM283X_MU_LSR_RX_READY happens to be BIT(0). Enhance the code to be more explicit about the values it returns. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | memory: Move TI_AEMIF config to KCONFIGLokesh Vutla2016-04-18-0/+20
| | | | | | | | | | | | | | | | | | | | Not all Keystone2 devices has AEMIF NAND controller. So adding Kconfig entry for CONFIG_TI_AEMIF and enabling it in respective defconfigs on platforms with AEMIF controller. Reported-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | drivers/power/pmic/pm8916.c: Make usid be uint32_tTom Rini2016-04-18-1/+1
| | | | | | | | | | | | | | | | | | If get_dev_addr fails it will return FDT_ADDR_T_NONE and: >>> "priv->usid == 4294967295U" is always false regardless of the values of its operands. This occurs as the logical operand of if. Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reported-by: Coverity (CID: 143914) Signed-off-by: Tom Rini <trini@konsulko.com>
* | drivers/gpio/pm8916_gpio.c: Make pid be uint32_tTom Rini2016-04-18-1/+1
| | | | | | | | | | | | | | | | | | If get_dev_addr fails it will return FDT_ADDR_T_NONE and: >>> "priv->pid == 4294967295U" is always false regardless of the values of its operands. This occurs as the logical operand of if. Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reported-by: Coverity (CID: 143913) Signed-off-by: Tom Rini <trini@konsulko.com>
* | drivers: mmc: omap_hsmmc: request cd and wp gpios when DM_MMC is definedMugunthan V N2016-04-18-0/+5
| | | | | | | | | | | | | | | | Add request gpio for CD and WP gpios, so that the gpio can be used for the respective purposes. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | drivers: mmc: omap_hsmmc: Fix conversion of address to a pointerMugunthan V N2016-04-18-1/+2
|/ | | | | | | | | | | | | | | | | omap_hsmmc driver directly typecasts fdt_addr_t to a pointer. This is not strictly correct, as it gives a build warning when fdt_addr_t is u64. So, use map_physmem for a proper typecasts. This is inspired by commit 167efe01bc5a9 ("dm: ns16550: Use an address instead of a pointer for the uart base") drivers/mmc/omap_hsmmc.c: In function ‘omap_hsmmc_ofdata_to_platdata’: drivers/mmc/omap_hsmmc.c:776:20: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] priv->base_addr = (struct hsmmc *)dev_get_addr(dev); ^ Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* drivers/tpm/tpm_tis_sandbox.c: Fix uninitialized variable useTom Rini2016-04-15-1/+1
| | | | | | | | | | In rollback_space_kernel we were not initializing the reserved fields which should be for safety sake, and doing memset here means we don't need to set the version field specifically either. Reported-by: Coverity (CID: 143917) Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* fdt: implement dev_get_addr_name()Stephen Warren2016-04-15-0/+16
| | | | | | | | | This function parses the reg property based on an index found in the reg-names property. This is required for bindings that are written using reg-names rather than hard-coding indices in reg. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: device.c: Minor coding-style fixStefan Roese2016-04-14-6/+6
| | | | | | | | Fix multi-line comment indentation in device_bind() Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: core: device: set pinctrl state for pinctrl devicePeng Fan2016-04-14-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We may have pinmux settings for pinctrl device, like the following example: " &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog_1>; imx6ul-evk { pinctrl_hog_1: hoggrp-1 { fsl,pins = < MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */ MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT 0x17059 /* SD1 VSELECT */ MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 RESET */ MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x80000000 >; }; [......] }; " We should not only select pinctrl state for non pinctrl devices, we need also to handle pin mux settings such as pinctrl_log for pinctrl devices. So at the end of probing process of pinctrl device, select the default state of pinctrl device. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-04-13-96/+596
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| * dm: i2c: Add driver for Cadence I2C IPMoritz Fischer2016-04-13-0/+343
| | | | | | | | | | | | | | | | | | | | | | This is a possible drop in replacement for drivers/i2c/zynq-i2c.c Since this is cadence IP it has been renamed to cdns-i2c, to make sense with the compatible string. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * GPIO: pca953x: Remove compilation warnings on arm64Michal Simek2016-04-13-2/+2
| | | | | | | | | | | | | | | | | | | | | | Warnings: w+../drivers/gpio/pca953x.c: In function ‘do_pca953x’: w+../drivers/gpio/pca953x.c:220:5: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] w+../drivers/gpio/pca953x.c:233:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynqmp: Kconfig: Enable ZYNQ_GPIO for ZynqMPSiva Durga Prasad Paladugu2016-04-13-1/+1
| | | | | | | | | | | | | | | | Enable ZYNQ_GPIO for ZynqMP using Kconfig. It enables the GPIO driver support for ZynqMP. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * gpio: zynqmp: Add GPIO driver support for ZynqMPSiva Durga Prasad Paladugu2016-04-13-53/+147
| | | | | | | | | | | | | | Add GPIO driver support for ZynqMP platform Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * gpio: zynq: Move the definitions to driver fileSiva Durga Prasad Paladugu2016-04-13-0/+61
| | | | | | | | | | | | | | | | Move all the gpio definitions to driver file as there is no use of them in other files. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * gpio: zynq: Remove non driver model codeSiva Durga Prasad Paladugu2016-04-13-157/+1
| | | | | | | | | | | | | | | | | | Remove non driver model support as it moved to driver model. Dont need non driver model anymore. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * gpio: Kconfig: Enable Zynq GPIO driver using kconfigSiva Durga Prasad Paladugu2016-04-13-0/+7
| | | | | | | | | | | | | | | | Enable DM GPIO and ZYNQ GPIO using kconfig instead of the board config file. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * gpio: zynq: Convert Zynq GPIO to driver modelSiva Durga Prasad Paladugu2016-04-13-0/+151
| | | | | | | | | | | | | | Convert Zynq GPIO driver to driver model Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | mtd: cfi: Unlock current sector instead of sector 0 before buffered writeRouven Behr2016-04-13-1/+1
| | | | | | | | | | | | | | | | | | Unlock current sector instead of sector 0 before buffered write. [Patch subject and commit text slightly reworded, Stefan] Signed-off-by: Rouven Behr <u-boot@behr-iss.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-04-12-0/+4
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| * | gpio: mvebu_gpio: Add missing out value set to gpio_direction_output()Stefan Roese2016-04-12-0/+4
| |/ | | | | | | | | | | | | | | | | | | | | This patch adds the missing configuration of the output value to the gpio_direction_output() function. Without this, calling gpio_direction_output() does not set the out-value at all and only configures the gpio as output. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Kevin Smith <kevin.smith@elecsyscorp.com> Reviewed-by: Kevin Smith <kevin.smith@elecsyscorp.com>
* | sunxi: H3: Do not clear usb companion clk-gate / reset on removeHans de Goede2016-04-12-6/+14
|/ | | | | | | | | | | | | | | | | On the H3 we need to enable the clk and de-assert the reset of the companion to be able to talk to the actual usb host controller. Before this commit we were also disabling the companion clk-gate / asserting its reset on remove, causing the later remove callback of the companion itself to (sometimes) fail with: ERROR: USB HC reset timed out! This commit fixes this by not disabling the companion's clk-gate nor asserting its reset on remove. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* Merge branch 'master' of git://git.denx.de/u-boot-arcTom Rini2016-04-11-16/+0
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| * arc: get rid of running_on_hwAlexey Brodkin2016-04-11-16/+0
| | | | | | | | | | | | | | | | ISS is obsolete now and nSIM is used for simulation instead. In its turn nSIM properly handles baud-rate settings so get rid of now useless check. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | lib/crc8: Add crc start valueStefan Roese2016-04-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To make the usage of this function more flexible, lets add the CRC start value as parameter to this function. This way it can be used by other functions requiring different start values than 0 as well. For non-zero CRC start values to work, I've reworked the function a bit. The new implementation is copied from the Linux version in drivers/i2c/i2c-core.c / i2c_smbus_pec(). Which supports non-zero CRC stating values. I've double-checked that the results for zero starting values are identical to the results from the original version of this function. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* | bootcounter_ram: Flush dcache after data is written into SDRAMStefan Roese2016-04-11-0/+3
| | | | | | | | | | | | | | | | | | | | This patch adds a call to flush_dcache_range() to bootcount_store() to make sure, that the bootcounter data (including the patterns) is written to memory. Without this, platforms with dcache enabled may not have the bootcounter updated upon reset. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
* | stm32: stm32_flash: add memory barrier during flash writeVikas Manocha2016-04-11-0/+4
| | | | | | | | | | | | | | | | After writing data to flash space, next instruction is checking if flash controller is busy writing to the flash memory. Memory barrier is required here to avoid transaction re-ordering for data write and busy status check. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
* | spmi: Fix sandbox spmi driver memory corruptionMateusz Kulikowski2016-04-11-1/+2
|/ | | | | | | | | | | There is off-by-one error in sandbox_emul_gpio that causes segfault of certain tests. EMUL_GPIO_REG_END is the address of last valid (emulated) register. This patch fixed this (by adding one more element to emulated register array). Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
* Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2016-04-10-1/+0
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| * arm: socfpga: Nuke useless includeMarek Vasut2016-04-10-1/+0
| | | | | | | | | | | | | | | | | | | | The dwmmc.h include was forgotten during the migration of dwmmc probing to DM. Since the shiny DM is in place now, remove this relic of the past. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* | musb: Properly call musb_stop() on probe failureHans de Goede2016-04-10-1/+3
| | | | | | | | | | | | | | musb_lowlevelinit(): if no device is plugged in / detected call musb_stop() to undo the preceding musb_start() call. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | musb: sunxi: Do not allocate musb struct multiple timesHans de Goede2016-04-10-4/+7
| | | | | | | | | | | | | | | | | | | | The probe function of the musb host driver can be called multiple times. The code assumes that it can save the pointer to the allocated musb struct in the driver model priv_auto_alloc data, but this data gets free-ed on a probe failure or on removal, so we must save the pointer elsewhere. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
generated by cgit v1.1 at 2024-11-05 08:58:09 +0000