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* | cfb_console.c: checkpatch cleanupWolfgang Denk2011-08-01-6/+10
| | | | | | | | | | | | | | | | | | Fix the following: ERROR: do not initialise statics to 0 or NULL ERROR: do not use assignment in if condition Signed-off-by: Wolfgang Denk <wd@denx.de>
* | cfb_console.c: drop custom PRINTD() and use debug() insteadWolfgang Denk2011-08-01-9/+2
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Cosmetic: reformat drivers/video/cfb_console.cWolfgang Denk2011-08-01-484/+609
| | | | | | | | | | | | | | | | | | | | | | Run cfb_console.c through indent and manually fix some of he deficiencies of the automatic line breaking. Fix multiline comments, excessive line spacing and such. No changes to code done. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | cfb_console: fix build breakageAndreas Bießmann2011-07-29-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Commit 09c2e90c110ef99f1203685acd1059114a51b167 "unify version_string" introduced a build breakage in cfb_console.c ---8<--- cfb_console.c:1497: warning: format '%s' expects type 'char *', but argument 3 has type 'const char (*)[]' --->8--- Signed-off-by: Andreas Biemann <andreas.devel@googlemail.com>
* | cleanup: Fix typos and misspellings in various files.Mike Williams2011-07-28-6/+6
| | | | | | | | | | | | | | | | | | | | | | Recieve/Receive recieve/receive Interupt/Interrupt interupt/interrupt Addres/Address addres/address Signed-off-by: Mike Williams <mike@mikebwilliams.com>
* | unify version_stringAndreas Bießmann2011-07-28-1/+1
|/ | | | | | | | | | | | This patch removes the architecture specific implementation of version_string where possible. Some architectures use a special place and therefore we provide U_BOOT_VERSION_STRING definition and a common weak symbol version_string. Signed-off-by: Andreas Biemann <andreas.devel@googlemail.com> CC: Mike Frysinger <vapier@gentoo.org> CC: Peter Pan <pppeterpppan@gmail.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* fpga: support FPP Cyclone configurationMichael Jones2011-07-28-0/+10
| | | | | | Support FPGAs which use Fast Passive Parallel configuration Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
* altera: fix printf typoMichael Jones2011-07-28-1/+1
| | | | | Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Acked-by: Detlev Zundel <dzu@denx.de>
* cosmetic: spell fixes etc.Michael Jones2011-07-28-1/+1
| | | | | Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Acked-by: Detlev Zundel <dzu@denx.de>
* net: Add SMSC89128 supportPhil Edworthy2011-07-27-0/+2
| | | | | Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Cc: Ben Warren <biggerbadderben@gmail.com>
* phylib: Detect link on 10G devices correctlyAndy Fleming2011-07-27-2/+6
| | | | | | | | | | | | | | | | gen10g_startup() had 2 bugs: 1) It had a boolean logic error in checking the MMD mask, and always checked all of them. 2) It checked devices which don't actually report link state, which meant that it would never believe the link was fully up. Fix the boolean logic, and then mask the MMD mask so only link-reporting devices are checked. Signed-off-by: Andy Fleming <afleming@freescale.com> Reported-by: Ed Swarthout <Ed.Swarthout@freescale.com>
* serial: drop useless ctlr fieldMike Frysinger2011-07-26-20/+14
| | | | | | | | | | | | | | | | | | | The multi serial support has a "ctlr" field which almost no one uses, but everyone is forced to set to useless strings. So punt it. Funny enough, the only code that actually reads this field (the mpc8xx driver) has a typo where it meant to look for the SCC driver. Fix it while converting the check to use the name field. Signed-off-by: Mike Frysinger <vapier@gentoo.org> CC: Heiko Schocher <hs@denx.de> CC: Anatolij Gustschin <agust@denx.de> CC: Tom Rix <Tom.Rix@windriver.com> CC: Minkyu Kang <mk7.kang@samsung.com> CC: Craig Nauman <cnauman@diagraph.com> CC: Marek Vasut <marek.vasut@gmail.com> CC: Prafulla Wadaskar <prafulla@marvell.com> CC: Mahavir Jain <mjain@marvell.com>
* serial: push default_serial_console to driversMike Frysinger2011-07-26-0/+47
| | | | | | | | | | | | | | | | | Rather than sticking arch/board/driver specific logic in the common serial code, push it all out to the respective drivers. The serial drivers declare these funcs weak so that boards can still override things with their own definition. Signed-off-by: Mike Frysinger <vapier@gentoo.org> CC: Heiko Schocher <hs@denx.de> CC: Anatolij Gustschin <agust@denx.de> CC: Tom Rix <Tom.Rix@windriver.com> CC: Minkyu Kang <mk7.kang@samsung.com> CC: Craig Nauman <cnauman@diagraph.com> CC: Prafulla Wadaskar <prafulla@marvell.com> CC: Mahavir Jain <mjain@marvell.com> Tested-by: Minkyu Kang <mk7.kang@samsung.com>
* sf: sst: support newer standardized flashesMike Frysinger2011-07-26-2/+20
| | | | | | | | | Newer SST flashes have dropped the Auto Address Increment (AAI) word programming (WP) modes in favor of the standard page programming mode that most flashes now support. So add a flags field to the different flashes to support both modes with new and old styles. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify write disable commandsMike Frysinger2011-07-26-1/+10
| | | | | | | | | Every spi flash uses the same write disable command, so unify this in the common code. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Fixed commit message. Signed-off-by: Wolfgang Denk <wd@denx.de>
* sf: eon/stmicro: inline useless ID definesMike Frysinger2011-07-26-20/+9
| | | | | | These defines are used in only one place, so just inline them. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: kill off now-unused local stateMike Frysinger2011-07-26-123/+61
| | | | | | | | Now that the common spi_flash structure tracks all the info that these drivers need, kill off their local state indirection and use just what the common code provides. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify write funcsMike Frysinger2011-07-26-324/+76
| | | | | | | Once we add a new page_size field for write lengths, we can unify the write methods for most of the spi flash drivers. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify write enable commandsMike Frysinger2011-07-26-8/+16
| | | | | | | Every spi flash uses the same write enable command, so unify this in the common code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Timer: Allow reset_timer() only for systems with low resolution timersGraeme Russ2011-07-26-0/+6
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* scaled down version of generic libraries for SPLAneesh V2011-07-26-0/+3
| | | | Signed-off-by: Aneesh V <aneesh@ti.com>
* disk/part.c: Make features optionalMatthew McClintock2011-07-26-0/+6
| | | | | | | | | If we don't want to build support for any partition types we can now add #undef CONFIG_PARTITIONS in a board config file to keep this from being compiled in. Otherwise boards assume this is compiled in by default Signed-off-by: Matthew McClintock <msm@freescale.com>
* scsi/ahci: add support for non-PCI controllersRob Herring2011-07-26-8/+62
| | | | | | | Add support for AHCI controllers that are not PCI based. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Wolfgang Denk <wd@denx.de>
* scsi/ahci: ata id little endian fixRob Herring2011-07-26-1/+1
| | | | | | The ata id string always needs swapping, not just on BE machines. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* andes_spi: add andes_spi interfaceMacpaul Lin2011-07-25-0/+431
| | | | | | | | | andes_spi is an spi interface developed by Andes Tech. Signed-off-by: Macpaul Lin <macpaul@andestech.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* net: designware: fix uninitialized phy_addr usageMike Frysinger2011-07-25-0/+2
| | | | | | | | | | | | When CONFIG_DW_SEARCH_PHY is disabled, the local phy_addr variable never gets initialized which causes random behavior at runtime and a gcc warning. So set it by default to the stored phy address. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Vipin Kumar <vipin.kumar@st.com> Fix commit message. Signed-off-by: Wolfgang Denk <wd@denx.de>
* net: designware: fix unused warning when CONFIG_DW_AUTONEG is enabledMike Frysinger2011-07-25-1/+3
| | | | | | | | The ctrl variable is only used when autoneg support is disabled, so only declare it under those conditions to avoid an unused variable warning. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mmcWolfgang Denk2011-07-19-6/+2025
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mmc: mmc: rescan fails on empty slot AT91:mmc:fix multiple read/write error mmc: Access mode validation for eMMC cards > 2 GiB mmc: sh_mmcif: add support for Renesas MMCIF mmc: fix the condition for MMC version 4 MMC: add marvell sdhci driver MMC: add sdhci generic framework MMC: add erase function to both mmc and sd MMC: unify mmc read and write operation mmc: Tegra2: Enable SD/MMC driver for Seaboard and Harmony mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3
| * AT91:mmc:fix multiple read/write errorelen.song2011-07-15-1/+12
| | | | | | | | | | | | | | According to datasheet,set block count before multiple read/write. Signed-off-by: elen.song <elen.song@atmel.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * mmc: Access mode validation for eMMC cards > 2 GiBŁukasz Majewski2011-07-15-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides handling of the two way handshake when SEND_OP_COND (CMD1) is send to mmc card. It is necessary to inform eMMC card if the host can work with high capacity cards (Jedec JESD84-A441, point 7.4.3). The extra flag MMC_MODE_HC (high capacity) is added to indicate if the host is capable of handling the high capacity eMMC cards. Since this change is added to the generic mmc framework, then it requires other boards to indicate if their mmc controllers can handle high capacity cards. As it is now - the old behaviour of the framework is preserved. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: sh_mmcif: add support for Renesas MMCIFYoshihiro Shimoda2011-07-15-0/+847
| | | | | | | | | | | | | | Some Renesas SuperH have MMCIF module. This driver supports it. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * mmc: fix the condition for MMC version 4Yoshihiro Shimoda2011-07-15-4/+11
| | | | | | | | | | | | | | | | | | | | Fix the problem that if we use the chip of MMC version 4 and the capacity is smaller than 2GB or equal, the mmc->capacity is invalid. According to the JEDEC Standard, the value of ext_csd's capacity is valid if the value is more than 2GB. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * MMC: add marvell sdhci driverLei Wen2011-07-15-0/+22
| | | | | | | | | | | | | | | | | | This could support both armada100 and pantheon serial in the mainline, while this driver also be tested to support upcoming mg, mmp2 and mmp3 hardware. Signed-off-by: Lei Wen <leiwen@marvell.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * MMC: add sdhci generic frameworkLei Wen2011-07-15-0/+434
| | | | | | | | | | | | | | | | | | Nowdays, there are plenty of mmc driver in uboot adopt the sd standard host design, aka as sdhci. It is better to centralize the common logic together to better maintenance. Signed-off-by: Lei Wen <leiwen@marvell.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * MMC: add erase function to both mmc and sdLei Wen2011-07-15-0/+102
| | | | | | | | | | | | | | | | | | | | | | Erase is a very basic function since the begin of sd specification is announced. Although we could write a bulk of full 0xff memory to the range to take place of erase, it is more convenient and safe to implement the erase function itself. Signed-off-by: Lei Wen <leiwen@marvell.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
| * mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3Tom Warren2011-07-15-0/+592
| | | | | | | | | | Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Andy Fleming <afleming@freescale.com>
* | MX31: Cleanup clock functionStefano Babic2011-07-18-2/+0
| | | | | | | | | | | | | | The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | Timer: Fix misuse of ARM *timer_masked() functions outside arch/armGraeme Russ2011-07-16-10/+13
| | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | imx: Add support for USB EHCI on imx25Matthias Weisser2011-07-14-8/+25
|/ | | | | | | Adding support for USB host on imx25 using the internal PHY. Changing the name of base address define for imx31 to get some unification. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* fsl_dma: fix support for 83xx DMA engineIra W. Snyder2011-07-06-0/+2
| | | | | | | | | | | | | Commit 359ec4931944adb885882deb9b781e4095eabc94 broke support for the Freescale DMA engine on the 83xx parts. This is due to using registers which do not exist on 83xx. Remove the attribute register accesses from the 83xx build. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Cc: York Sun <yorksun@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* driver/serial: delete at91rm9200_usartAndreas Bießmann2011-07-04-127/+0
| | | | | | The at91rm9200_usart driver could be fully replaced by atmel_usart driver. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* GPIO: Tegra2: add GPIO driver for Tegra2Tom Warren2011-07-04-0/+256
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* NAND: Add 16bit NAND support for the NDFCAlex Waterman2011-07-01-4/+29
| | | | | | | | | | | | | | | | | | | This patch adds support for 16 bit NAND devices attached to the NDFC on ppc4xx processors. Two config entries were added: CONFIG_SYS_NDFC_16 - Setting this tells the NDFC that a 16 bit device is attached. CONFIG_SYS_NDFC_EBC0_CFG - This is for the External Bus Controller configuration register. Also, a new ndfc_read_byte() function was added which does not first convert the data to little endian. The NAND SPL was also modified to do 16bit bad block testing when a 16 bit chip is being used. Signed-off-by: Alex Waterman <awaterman@dawning.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_util: drop trailing all-0xff pages if requestedBen Gardiner2011-07-01-3/+37
| | | | | | | | | | | | | | | | | | | | Add a flag to nand_read_skip_bad() such that if true, any trailing pages in an eraseblock whose contents are entirely 0xff will be dropped. The implementation is via a new drop_ffs() function which is based on the function of the same name from the ubiformat utility by Artem Bityutskiy. This is as-per the reccomendations of the UBI FAQ [1] [1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Artem Bityutskiy <dedekind1@gmail.com> Acked-by: Detlev Zundel <dzu@denx.de> CC: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_util: treat WITH_YAFFS_OOB as a modeBen Gardiner2011-07-01-0/+3
| | | | | | | | | | | | | When specified in the flags argument of nand_write, WITH_YAFFS_OOB causes an operation which is mutually exclusive with the 'usual' way of writing. Add a check that client code does not specify WITH_YAFFS_OOB along with any other flags and add a comment indicating that the WITH_YAFFS_OOB flag should not be mixed with other flags. Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_util: convert nand_write_skip_bad() to flagsBen Gardiner2011-07-01-4/+4
| | | | | | | | | | | | | | | | | | | | | | In a future commit the behaviour of nand_write_skip_bad() will be further extended. Convert the only flag currently passed to the nand_write_ skip_bad() function to a bitfield of only one allocated member. This should avoid an explosion of int's at the end of the parameter list or the ambiguous calls like nand_write_skip_bad(info, offset, len, buf, 0, 1, 1); nand_write_skip_bad(info, offset, len, buf, 0, 1, 0); Instead there will be: nand_write_skip_bad(info, offset, len, buf, WITH_YAFFS_OOB | WITH_OTHER); Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Acked-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_base: trivial: fix comment read/write commentBen Gardiner2011-07-01-1/+1
| | | | | | | | Replace an incorrect 'read' with 'write' in a comment. Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Acked-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* cfi_flash: reverse geometry for newer STM partsMike Frysinger2011-06-29-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | For newer STM parts where CFI >= 1.1, there is a byte in the extended structure that declares the flash layout type (just like the AMD parts), so key off of that to find out when we need to reverse the geometry. This can be seen with M29W640 parts where U-Boot does: Bank # 1: CFI conformant FLASH (16 x 16) Size: 8 MB in 135 Sectors AMD Standard command set, Manufacturer ID: 0x20, Device ID: 0x22ED Erase timeout: 8192 ms, write timeout: 1 ms Buffer write timeout: 1 ms, buffer size: 16 bytes Sector Start Addresses: 20000000 RO 20002000 RO 20004000 RO 20006000 RO 20008000 RO 2000A000 RO 2000C000 RO 2000E000 RO 20010000 RO 20020000 RO ... But Linux does: physmap platform flash device: 00800000 at 20000000 physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank. Manufacturer ID 0x000020 Chip ID 0x0022ed physmap-flash.0: Swapping erase regions for top-boot CFI table. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Stefan Roese <sr@denx.de>
* usb: convert to partial linkingMike Frysinger2011-06-25-2/+2
| | | | | | Looks like this was missed during the conversion to partial linking. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* ehci-pci: Fix PCI EHCI driver for 36-bitZhao Chenhui2011-06-25-3/+2
| | | | | | | Convert the PCI base address into a virtual address. Signed-off-by: Zhao Chenhui <b35336@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com>
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