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| | * | | ehci-mxc: Fix host power mask bit for i.MX25Benoît Thébaudeau2012-11-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance selection bit. This issue has been reported by Eric Bénard <eric@eukrea.com> and fixed by Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s had been copied. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de>
| | * | | ehci-mxc: Fix host power mask bit for i.MX35Benoît Thébaudeau2012-11-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance selection bit. This issue has been reported by Michael Burkey <mdburkey@gmail.com> and fixed by Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s had been copied. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
| | * | | spi: mxc_spi: Fix spi clock glitch durant resetFabio Estevam2012-11-19-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| | * | | spi: mxc_spi: Fix handling of chip selectFabio Estevam2012-11-19-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | ehci-mx5/6: Make board_ehci_hcd_init() optionalBenoît Thébaudeau2012-11-16-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A custom board_ehci_hcd_init() may be unneeded, so add a weak default implementation doing nothing. By the way, use simple __weak from linux/compiler.h for board_ehci_hcd_postinit() instead of weak alias with full attribute. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| | * | | ehci-mxc: Add support for i.MX35Benoît Thébaudeau2012-11-16-0/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| | * | | ehci-mxc: Define host offsetsBenoît Thébaudeau2012-11-16-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at SoC level. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| | * | | ehci-mxc: Make i.MX25 EHCI configurableBenoît Thébaudeau2012-11-16-8/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use EHCI MXC configuration options for i.MX25. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Matthias Weisser <weisserm@arcor.de>
| | * | | ehci-mxc: Make EHCI power/oc polarities configurableBenoît Thébaudeau2012-11-16-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make EHCI power and overcurrent polarities configurable. If not set, these new configurartions keep the default register values so that existing board files do not have to be changed. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| | * | | ehci-mx5: Add missing OC_DIS for i.MX53Benoît Thébaudeau2012-11-16-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX53 has MXC_H*_UCTRL_H*_OC_DIS_BIT bits to disable the oc pin. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| | * | | ehci-mx5: Fix *PM usage for i.MX53Benoît Thébaudeau2012-11-16-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MXC_*_UCTRL_*PM_BIT bits are available only on i.MX51. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| | * | | ehci-mx5: Fix OPM usageBenoît Thébaudeau2012-11-16-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MXC_OTG_UCTRL_OPM_BIT disables (masks) the power/oc pins if set, like MXC_H1_UCTRL_H1PM_BIT and MXC_H2_UCTRL_H2PM_BIT, not the opposite. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| | * | | ehci-mx5: Fix OC_DIS usageBenoît Thébaudeau2012-11-16-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MXC_OTG_PHYCTRL_OC_DIS_BIT disables the oc pin if set, like MXC_H1_OC_DIS_BIT, not the opposite. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| | * | | ehci-mx5: Clean upBenoît Thébaudeau2012-11-16-19/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up ehci-mx5: - Fix column alignments. - Fix comments. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| | * | | ehci-mxc: Clean upBenoît Thébaudeau2012-11-16-46/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up ehci-mxc: - Remove useless #if's. - Fix identation. - Issue a #error if used with an unsupported platform. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | | | mmc: tegra: support 4-bit operation too on 8-bit slotsStephen Warren2012-11-19-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a board has all 8 data lines routed, the SD/MMC controller can still operate in 4-bit (or presumably even 1-bit) mode. Adjust Tegra's MMC driver to report the 4-bit capability even for 8-bit slots. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | | tegra: add CONSOLE_MUX support to tegra-kbcAllen Martin2012-11-19-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for CONSOLE_MUX to tegra-kbc driver. This requires adding a flag to struct keyb to know the driver has already been initialized so if we try to initialize it again we can just return success. Also call into iomux_doenv() from drv_keyboard_init to re-evaluate the stdin string. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | | tegra: Support control of cache settings for LCDSimon Glass2012-11-19-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for selecting the required cache mode for the LCD: off, write-through or write-back. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | | tegra: Add LCD driverSimon Glass2012-11-19-0/+369
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver supports driving a single LCD and providing a U-Boot console on it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | | SPI: Add SPI Driver for EXYNOS.Rajeshwari Shinde2012-11-15-0/+368
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SPI driver for EXYNOS. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: jy0922.shim@samsung.com Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | | SOUND: Add WM8994 codecRajeshwari Shinde2012-11-15-0/+1179
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds driver for audio codec WM8994 Signed-off-by: R. Chandrasekar <rcsekar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | | SOUND: SAMSUNG: Add I2S driverRajeshwari Shinde2012-11-15-0/+633
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds driver for I2S interface specific to samsung. Signed-off-by: R. Chandrasekar <rcsekar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | | drivers: video: fix image positionPiotr Wilczek2012-11-15-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes image position on screen when images's height or width is biger then the lcd's. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | | drivers: video: Add ld9040 video driverPiotr Wilczek2012-11-15-0/+145
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | | s3c64xx: fix the compiler error and warningMinkyu Kang2012-11-15-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is fixing the following errors s3c64xx.c:175: error: variable 's3c64xx_serial_drv' has initializer but incomplete type s3c64xx.c:176: error: unknown field 'name' specified in initializer s3c64xx.c:176: warning: excess elements in struct initializer s3c64xx.c:176: warning: (near initialization for 's3c64xx_serial_drv') s3c64xx.c:177: error: unknown field 'start' specified in initializer s3c64xx.c:177: warning: excess elements in struct initializer s3c64xx.c:177: warning: (near initialization for 's3c64xx_serial_drv') s3c64xx.c:178: error: unknown field 'stop' specified in initializer s3c64xx.c:178: warning: excess elements in struct initializer s3c64xx.c:178: warning: (near initialization for 's3c64xx_serial_drv') s3c64xx.c:179: error: unknown field 'setbrg' specified in initializer s3c64xx.c:179: warning: excess elements in struct initializer s3c64xx.c:179: warning: (near initialization for 's3c64xx_serial_drv') s3c64xx.c:180: error: unknown field 'putc' specified in initializer s3c64xx.c:180: warning: excess elements in struct initializer s3c64xx.c:180: warning: (near initialization for 's3c64xx_serial_drv') s3c64xx.c:181: error: unknown field 'puts' specified in initializer s3c64xx.c:181: warning: excess elements in struct initializer s3c64xx.c:181: warning: (near initialization for 's3c64xx_serial_drv') s3c64xx.c:182: error: unknown field 'getc' specified in initializer s3c64xx.c:182: warning: excess elements in struct initializer s3c64xx.c:182: warning: (near initialization for 's3c64xx_serial_drv') s3c64xx.c:183: error: unknown field 'tstc' specified in initializer s3c64xx.c:183: warning: excess elements in struct initializer s3c64xx.c:183: warning: (near initialization for 's3c64xx_serial_drv') s3c64xx.c: In function 's3c64xx_serial_initialize': s3c64xx.c:188: warning: implicit declaration of function 'serial_register' s3c64xx.c: At top level: s3c64xx.c:191: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'struct' Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Marek Vasut <marex@denx.de>
| * | | | PMIC: MAX77686: Add support for MAX77686Rajeshwari Shinde2012-11-15-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds driver and register definitions for PMIC chip MAX77686. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | | dm: wdt: Move s5p watchdog timer to drivers/watchdog/Marek Vasut2012-11-15-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: David Müller <d.mueller@elsoft.ch> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: U-Boot DM <u-boot-dm@lists.denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | | gpio:fix: Proper handling of GPIO subsystem parts at Samsung devicesŁukasz Majewski2012-11-15-2/+4
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now proper GPIO parts numbering is handled at Samsung devices. This fix is necessary for code using GPIO located at other banks than first. Test HW: - Exynos4210 - Trats - S5PC110 - goni Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | mx6: use CONFIG_MX6 instead of CONFIG_MX6QTroy Kisky2012-11-10-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use CONFIG_MX6 when the particular processor variant isn't important. Reserve the use of CONFIG_MX6Q to specifically test for quad cores variant. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * | | Merge git://git.denx.de/u-bootStefano Babic2012-11-10-2727/+4718
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| * | | | pmic: Add support for mc34704Fabio Estevam2012-10-26-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the register layout for the MC34704 PMIC from Freescale. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | | pmic_fsl: Introduce FSL_PMIC_I2C_LENGTHFabio Estevam2012-10-26-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce FSL_PMIC_I2C_LENGTH to configure the number of bytes that are used to communicate with the PMIC via I2C. Instead of hardcoding the value, pass the number via a configurable option per PMIC type. This will be useful for adding support for PMIC MC34704 from Freescale, which uses only one byte in its I2C protocol. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2012-12-21-2/+11
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| * | | | | g_dnl: Properly terminate string list.Pantelis Antoniou2012-12-17-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Well, not terminating the list causes very interesting crashes. As in changing the vendor & product ID crashes. Fun. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * | | | | g_dnl: Issue connect/disconnect as appropriatePantelis Antoniou2012-12-17-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Call usb_gadget_connect/usb_gadget_disconnect in g_dnl_bind/g_dnl_unbind. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * | | | | pxa25x_udc: Remove usbdescriptors.hLukasz Dalek2012-12-17-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | usbdescriptors.h conflicts with linux/usb/ch9.h. Remove it. Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
* | | | | | driver/mtd/IFC:Wait tWB time, poll R/B before command executionPrabhakar Kushwaha2012-12-21-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IFC_FIR_OP_CMD0 issues command for execution without checking flash readiness. It may cause problem if flash is not ready. Instead use IFC_FIR_OP_CW0 which Wait for tWB time and poll R/B to return high or time-out, before issuing command. NAND_CMD_READID command implemention does not fulfill above requirement. So update its programming. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Hemant Nautiyal <hemant.nautiyal@freescale.com>
* | | | | | serial_sh: Add support Renesas SH7752Yoshihiro Shimoda2012-12-20-1/+1
| |_|_|_|/ |/| | | | | | | | | | | | | | | | | | | Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2012-12-17-4/+26
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| * | | | | net: sh_eth: add support for SH7752Yoshihiro Shimoda2012-12-15-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SH7752 has two fast ethernet controllers and two gigabit ethernet controllers. It is similar to SH7757. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | | | phy: Add support for Marvell 88E1118RMichal Simek2012-12-15-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Marvell 88E1118R has different uid then 88E1118. Signed-off-by: Michal Simek <monstr@monstr.eu> CC: Andy Fleming <afleming@freescale.com> CC: Zang Roy-R61911 <tie-fei.zang@freescale.com> CC: Kumar Gala <galak@kernel.crashing.org>
| * | | | | e1000e : Correct Rx Threshold granularityRuchika Gupta2012-12-15-0/+11
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In e1000e driver, Rx descriptor queue is used such that hardware can add only one descriptor at a time. So the WTHRESH granularity in RXDCTL should be set to single descriptor. This would ensure that every time controller fills a Rx descriptor, it is flushed to host memory. Earlier this granularity was in cache line units i.e 2 descriptors. This leads to controller always waiting for 2 descriptors before flushing them out. But since not more than one Rx BD is actually available , the accumulation condition never gets hit. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Vakul Garg <vakul@freescale.com> Acked-by: Roy Zang <tie-fei.zang@freescale.com>
* | | | | Merge remote-tracking branch 'origin/master'Scott Wood2012-12-14-61/+262
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| * | | | env: Add a baudrate env handlerJoe Hershberger2012-12-13-0/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the hard-coded baudrate handler and use a callback instead Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | | designware_i2c.h: Define IC_CLK only if not already defined in config fileArmando Visconti2012-12-11-0/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Armando Visconti <armando.visconti@st.com>
| * | | | designware_i2c.h: Fixed the correct values for SCL low/high timeArmando Visconti2012-12-11-3/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Armando Visconti <armando.visconti@st.com>
| * | | | designware_i2c: Fixed the setting of the i2c bus speedArmando Visconti2012-12-11-15/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are three couple (hcnt/lcnt) of registers for each speed (SS/FS/HS). The driver needs to set the proper couple of regs according to what speed we are setting. Signed-off-by: Armando Visconti <armando.visconti@st.com>
| * | | | designware_i2c: Added s/w generation of stop bitArmando Visconti2012-12-11-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the newer versions of designware i2c IP there is the possibility of configuring it with IC_EMPTYFIFO_HOLD_MASTER_EN=1, which basically requires the s/w to generate the stop bit condition directly, as the h/w will not automatically generate it when TX_FIFO is empty. To avoid generation of an extra 0x0 byte sent as data, the IC_STOP command must be sent along with the last IC_CMD. This patch always writes bit[9] of ic_data_cmd even in the older versions, assuming that it is a noop there. Signed-off-by: Armando Visconti <armando.visconti@st.com>
| * | | | designware_i2c.c: Added the support for MULTI_BUSArmando Visconti2012-12-11-1/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the capability to switch between 10 different I2C busses (from 0 to 9). Signed-off-by: Armando Visconti <armando.visconti@st.com>
| * | | | drivers:i2c: Modify I2C driver for Exynos4Piotr Wilczek2012-12-11-7/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch modifies the S3C i2c driver to support both Exynos4 and Exynos5 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com>
generated by cgit v1.1 at 2024-11-07 22:11:44 +0000