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* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-08-29-5/+201
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| * pci: mx6: fix occasional link failuresTim Harvey2014-08-20-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable for SS function) must remain deasserted until the reference clock is running at the appropriate frequency. Without this patch we find a high link failure rate (>5%) on certain IMX6 boards at various temperatures. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-08-11-45/+1056
| |\ | | | | | | | | | | | | | | | | | | Conflicts: boards.cfg Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | pmic: pmic_pfuze100: Use a shorter name for PMIC nameFabio Estevam2014-08-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is redundant to use 'PFUZE100_PMIC' as the PMIC name because we already know it is a PMIC. Call it simply 'PFUZE100' instead. Cc: Tim Harvey <tharvey@gateworks.com> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-08-08-353/+1286
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| * | | spi: add config option to enable the WP pin function on st micron flashesHeiko Schocher2014-07-23-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable the W#/Vpp signal to disable writing to the status register on ST MICRON flashes like the N25Q128 thorugh the new config option CONFIG_SYS_SPI_ST_ENABLE_WP_PIN Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | pwm, imx6: add support for pwm modul on imx6Heiko Schocher2014-07-23-0/+162
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add basic support for the pwm modul found on imx6. Pieces of this code are based on linux code from drivers/pwm/pwm-imx.c Commit "cd3de83f1476 Linux 3.16-rc4" Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de>
* | | | net: cpsw: am335x: Drop constant link checking from rx/tx path'sStefan Roese2014-08-28-18/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We noticed on the DXR2 platform (AM335x with a SMSC LAN9303 switch connected to the CPSW MAC) that the network performance in U-Boot is quite poor. Only when the transfer is started without a cable connected, and the cable is plugged after the first timeout "T" occured, an increased in performance can be seen. Debugging has revealed, that the cpsw driver has constant link checking builtin into the rx and tx functions. This results in the bad performance and seems to be unnecessary. The link has already been checked in the init function, before the transfer is started. This usually is sufficient. BTW: I have seen no other network driver in U-Boot so far, that constantly checks for link in the rx / tx functions. The performance numbers on the DXR2 board are: 0.56 MiB/s cpsw_check_link() in rx and tx path 0.87 MiB/s cpsw_check_link() only in tx path 1.0 MiB/s cpsw_check_link() only in rx path 2.7 MiB/s no cpsw_check_link() in rx and tx path So with this patch the network performance on DXR2 increases from 0.56 to 2.7 MiB/s (nearly 5 times as fast). Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Samuel Egli <samuel.egli@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Cc: Vladimir Koutny <vladimir.koutny@streamunlimited.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Tom Rini <trini@ti.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-08-28-0/+218
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| * | | Merge branch 'u-boot-sunxi/master' into 'u-boot-arm/master'Albert ARIBAUD2014-08-09-0/+218
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| | * | | sunxi: add USB EHCI driverRoman Byshko2014-07-31-0/+202
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner aka sunxi SoCs have one or more USB host controllers. This adds a driver for their EHCI. Signed-off-by: Roman Byshko <rbyshko@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| | * | | ahci: provide sunxi SATA driver using AHCI platform frameworkIan Campbell2014-07-31-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done for sun7i only since I don't have access to any other sunxi platforms with sata included. The PHY setup is derived from the Alwinner releases and Linux, but is mostly undocumented. The Allwinner AHCI controller also requires some magic (and, again, undocumented) DMA initialisation when starting a port. This is added under a suitable ifdef. This option is enabled for Cubieboard, Cubieboard2 and Cubietruck based on contents of Linux DTS files, including SATA power pin config taken from the DTS. All build tested, but runtime tested on Cubieboard2 and Cubietruck only. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | | | mtd,ubi,ubifs: sync with linux v3.15Heiko Schocher2014-08-25-47/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | snyc with linux v3.15: commit 1860e379875dfe7271c649058aeddffe5afd9d0d Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Jun 8 11:19:54 2014 -0700 Linux 3.15 Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Scott Wood <scottwood@freescale.com> Cc: Tom Rini <trini@ti.com>
* | | | | mtd, ubi, ubifs: update for the sync with linux v3.14Heiko Schocher2014-08-25-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | while playing with the new mtd/ubi/ubifs sync, found some small updates for it: - add del_mtd_partition() to include/linux/mtd/mtd - mtd: add a debug_printf - remove some not used functions Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Scott Wood <scottwood@freescale.com> Cc: Tom Rini <trini@ti.com>
* | | | | mtd, ubi, ubifs: resync with Linux-3.14Heiko Schocher2014-08-25-4438/+10961
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | resync ubi subsystem with linux: commit 455c6fdbd219161bd09b1165f11699d6d73de11c Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Mar 30 20:40:15 2014 -0700 Linux 3.14 A nice side effect of this, is we introduce UBI Fastmap support to U-Boot. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Sergey Lapin <slapin@ossfans.org> Cc: Scott Wood <scottwood@freescale.com> Cc: Joerg Krause <jkrause@posteo.de>
* | | | | lib, linux: move linux specific defines to linux/compat.hHeiko Schocher2014-08-25-68/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - move linux specific defines from usb and video code into linux/compat.h - move common linux specific defines from include/ubi_uboot.h to linux/compat.h - add for new mtd/ubi/ubifs sync new needed linux specific defines to linux/compat.h Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Anatolij Gustschin <agust@denx.de> [trini: Add spin_lock_irqsave/spin_unlock_irqrestore dummies from usb/lin_gadet_compat.h] Signed-off-by: Tom Rini <trini@ti.com>
* | | | | Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingTom Rini2014-08-25-2/+3
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| * | | | | RTC: add support for DS1339 (using DS1307 driver)Markus Niebel2014-08-14-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
| * | | | | driver/qe: update status of QE microcodevijay rai2014-08-14-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This Patch updates error print for QE which should be easily understood Signed-off-by: Vijay Rai <vijay.rai@freescale.com>
| * | | | | pci: fix overflow in __pci_hose_bus_to_phys w/ large RAMStephen Warren2014-08-14-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a 32-bit system has 2GB of RAM, and the base address of that RAM is 2GB, then start+size will overflow a 32-bit value (to a value of 0). To avoid such an overflow, convert __pci_hose_bus_to_phys() to calculate the offset of a bus address into a PCI region, rather than comparing a bus address against the end of a PCI region. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | | | | e1000: add i210 supportMarek Vasut2014-08-21-27/+180
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add i210 support to the e1000 driver. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
* | | | | | e1000: Implement dcache supportMarek Vasut2014-08-21-22/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement proper support for cache flushing and invalidation into the Intel e1000 NIC driver. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
* | | | | | powerpc: mpc8xx: remove svm_sc8xx boardMasahiro Yamada2014-08-21-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board has been orphaned for a while and old enough. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | | | omap: remove omap5912osk board supportMasahiro Yamada2014-08-21-1507/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Emails to the board maintainer "Rishi Bhattacharya <rishi@ti.com>" have been bouncing. Tom suggested to remove this board. Remove also omap1510_udc.c because this is the last board to enable it. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Suggested-by: Tom Rini <trini@ti.com>
* | | | | | drivers: net: remove dead driversMasahiro Yamada2014-08-21-459/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following configs are not defined at all: - CONFIG_INCA_IP_SWITCH - CONFIG_PBL2800_ETHER - CONFIG_PHY_ICPLUS Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-08-20-1/+6
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| * | | | | powerpc/T4240QDS/eth: some fix for XFIShaohui Xie2014-08-20-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | XFI is supported on T4QDS-XFI board, which removed slot3, and four LANEs of serdes2 are routed to a SFP+ cages, which to house fiber cable or direct attach cable(copper), the copper cable is used to emulate the 10GBASE-KR scenario. So, for XFI usage, there are two scenarios, one will use fiber cable, another will use copper cable. For fiber cable, there is NO PHY, while for copper cable, we need to use internal PHY which exist in Serdes to do auto-negotiation and link training, which implemented in kernel. We use hwconfig to define cable type for XFI, and fixup dtb based on the cable type. For copper cable, set below env in hwconfig: fsl_10gkr_copper:<10g_mac_name> the <10g_mac_name> can be fm1_10g1, fm1_10g2, fm2_10g1, fm2_10g2. The four <10g_mac_name>s do not have to be coexist in hwconfig. For XFI ports, if a given 10G port will use the copper cable for 10GBASE-KR, set the <10g_mac_name> of the port in hwconfig, otherwise, fiber cable will be assumed to be used for the port. For ex. if four XFI ports will both use copper cable, the hwconfig should contain: fsl_10gkr_copper:fm1_10g1,fm1_10g2,fm2_10g1,fm2_10g2 For fiber cable: 1. give PHY address to a XFI port, otherwise, the XFI ports will not be available in U-boot, there is no PHY physically for XFI when using fiber cable, this is just to make U-boot happy and we can use the XFI ports in U-boot. 2. fixup dtb to use fixed-link in case of fiber cable which has no PHY. Kernel requests that a MAC must have a PHY or fixed-link. When using XFI protocol, the MAC 9/10 on FM1 should init as 10G interface. Change serdes 2 protocol 56 to 55 which has same feature as 56 since 56 is not valid any longer. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | | driver/qe: update status of QE microcodeVijay Rai2014-08-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This Patch updates error print for QE which should be easily understood Signed-off-by: Vijay Rai <vijay.rai@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | | | | video: ipu_disp: squash clang warningJeroen Hofstee2014-08-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since rgb2ycbcr_coeff and friends are declared const, but assigned to a void pointer, clang will warn that the const is implicity casted away. If the pointer is changed to void const * gcc will warn when it is implicitly casted to a const int array. Just add a correctly typed pointer instead to prevent these casts and hence the warnings. Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* | | | | | video: ipu_disp: wait for DP SF end irq when disabling sync BG flowsLiu Ying2014-08-11-19/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of waiting for DC triple buffer to be cleared, this patch changes to wait for a relevant DP sync flow end interrupt to come when disabling sync BG flows. In this way, we align the implement to the freescale internal IPUv3 driver. After applying this patch, an uboot hang up issue at the arch_preboot_os() stage, where we disable a relevant ipu display channel, is not observed any more on some MX6DL platforms. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* | | | | | video: Add support for TI's AM335x LCD-ControllerHannes Petermaier2014-08-10-0/+237
|/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Adds support for a minimal framebuffer driver of TI's AM335x SoC to be compatible with Wolfgang Denk's LCD-Framework (CONFIG_LCD, common/lcd.c) Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* | | | | omap: clean-up dead configsMasahiro Yamada2014-08-09-230/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following configs are not defined at all. - CONFIG_OMAP1510 - CONFIG_OMAP_1510P1 - CONFIG_OMAP_SX1 - CONFIG_OMAP3_DMA - CONFIG_OMAP3_ZOOM2 - CONFIG_OMAP_INNOVATOR Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
* | | | | vitesse: remove duplicated argument to ||maxin.john@enea.com2014-08-09-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the duplicated argument to || check Signed-off-by: Maxin B. John <maxin.john@enea.com>
* | | | | serial: sh: Add support External Clock modeNobuhiro Iwamatsu2014-08-09-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | R8A7780 and R7A7791 of rmobile supports External Clock mode, and these uses different from Internal Clock mode registers and calculations to the baud rate setting. This adds function for External Clock mode. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | | | serial: sh: Add support DL and CKS register for R8A7794Nobuhiro Iwamatsu2014-08-09-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | R8A7794 has DL and CKS register, and these registers are used in external clock mode. This adds support these for R8A7794. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | | | usb: ehci: rmobile: Remove xHCI addressNobuhiro Iwamatsu2014-08-09-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | echi-rmobile does not support xHCI. This removes xHCI address from address table. And this revise a value of CONFIG_USB_MAX_CONTROLLER_COUNT for lager board and koelsh board. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | | | | usb: ehci: rmobile: Add support R8A7794Nobuhiro Iwamatsu2014-08-09-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | R8A7794 has same IP of USB controller as R8A7790 and R8A7791. This addes support for R8A7794. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | | | | dfu: fix readback buffer overflow testStephen Warren2014-08-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The buffer is too small if it's < size to read, not if it's <= the size. This fixes the 1MB test case on Tegra, which has a 1MB buffer. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | | | dfu: add SF backendStephen Warren2014-08-09-0/+143
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows SPI Flash to be programmed using DFU. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | | | dfu: add free_entity() to struct dfu_entityStephen Warren2014-08-09-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows the backend to free any resources allocated during the relevant dfu_fill_entity_*() call. This will soon be used by the SF backend. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | | | dfu: allow backend to specify a maximum buffer sizeStephen Warren2014-08-09-7/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_DFU_DATA_BUF_SIZE may be large to allow for FAT/ext layouts to transfer large files. However, this means that individual write operations will take a long time. Allow backends to specify a maximum buffer size, so that each write operation is limited to a smaller data block. This prevents the DFU protocol from timing out when e.g. writing to SPI flash. I would guess that NAND might benefit from setting this value too, but I can't test that. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | | | dfu: defer parsing of device string to IO backendStephen Warren2014-08-09-21/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Devices are not all identified by a single integer. To support this, defer the parsing of the device string to the IO backed, so that it can apply the appropriate rules. SPI devices are specified as controller:chip_select. SPI/SF support will be added soon. MMC devices can also be specified as controller[.hwpart][:partition] in many commands, although we don't support that syntax in DFU. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | | | dfu: add write error handlingStephen Warren2014-08-09-22/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix calls to dfu_write() and dfu_flush() to detect errors in the I/O itself. This could happen due to problems with the storage medium, or simply when trying to write a FAT/ext file that is larger than the buffer dfu_mmc.c maintains for this purpose. Signal the error by switching the DFU state/status. This will be picked up by the DFU client when it sends the next DFU request. Note that errors can't simply be returned from e.g. dnload_request_complete(), since that function has no way to pass errors back to the DFU client; a call to dnload_request_complete() simply means that a USB OUT completed. This error state/status needs to be cleared when the next DFU client connects. While there is a DFU_CLRSTATUS request, no DFU client seems to send this. Hence, clear this when selecting the USB alternate setting on the USB interface. Finally, dfu.c relies on a call to dfu_flush() to clear up the internal state of the write transaction. Now that errors in dfu_write() are detected, dfu_flush() may no longer be called for every transaction. Separate out the cleanup code into a new function, and call it whenever dfu_write() fails, as well as from any call to dfu_flush(). Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | | | dfu: fix some issues with reads/uploadsStephen Warren2014-08-09-21/+76
|/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DFU read support appears to rely upon dfu->read_medium() updating the passed-by-reference len parameter to indicate the remaining size available for reading. dfu_read_medium_mmc() never does this, and the implementation of dfu_read_medium_nand() will only work if called just once; it hard-codes the value to the total size of the NAND device irrespective of read offset. I believe that overloading dfu->read_medium() is confusing. As such, this patch introduces a new function dfu->get_medium_size() which can be used to explicitly find out the medium size, and nothing else. dfu_read() is modified to use this function to set the initial value for dfu->r_left, rather than attempting to use the side-effects of dfu->read_medium() for this purpose. Due to this change, dfu_read() must initially set dfu->b_left to 0, since no data has been read. dfu_read_buffer_fill() must also be modified not to adjust dfu->r_left when simply copying data from dfu->i_buf_start to the upload request buffer. r_left represents the amount of data left to be read from HW. That value is not affected by the memcpy(), but only by calls to dfu->read_medium(). After this change, I can read from either a 4MB or 1.5MB chunk of a 4MB eMMC boot partion with CONFIG_SYS_DFU_DATA_BUF_SIZE==1MB. Without this change, attempting to do that would result in DFU read returning no data at all due to r_left never being set. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | | Change Andy Fleming's email addressAndy Fleming2014-08-06-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Messages to afleming@freescale.com now bounce, and should be directed to my personal address at afleming@gmail.com Signed-off-by: Andy Fleming <afleming@gmail.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2014-08-06-8/+25
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| * | | | spi, spi_mxc: do not hang in spi_xchg_singleHeiko Schocher2014-08-06-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | | spi: Support half-duplex mode in FDT decodeSimon Glass2014-08-06-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This parameter should also be supported. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | | exynos: spi: Fix calculation of SPI transaction start timeSimon Glass2014-08-06-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPI transaction delay is supposed to be measured from the end of one transaction to the start of the next. The code does not work that way, so fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | | cros_ec: Fix two bugs in the SPI implementationSimon Glass2014-08-06-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | An incorrect message version is passed to the EC in some cases and the parameters of one function are switched. Fix these problems. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
generated by cgit v1.1 at 2024-10-30 11:44:43 +0000