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* | dm: ns16550: Add support for reg-offset propertyMichal Simek2016-02-22-2/+4
| | | | | | | | | | | | | | | | | | | | reg-offset is the part of standard 8250 binding in the kernel. It is shifting start of address space by reg-offset. On Xilinx platform this offset is typically 0x1000. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | serial: zynq: Change logic in putcMichal Simek2016-02-22-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync logic with Linux kernel where TX empty flag is checked before char is sent. This logic is fixing problem with console on zynqmp platform. For example: DRAM: 2 GiB Enabling Caches... EL Level: �� sdhci@ff170000: 0 Using default environment Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
* | mmc: Kconfig: Add Arasan SDHCI entryMichal Simek2016-02-22-0/+6
|/ | | | | | Add Arasan SDHCI entry to Kconfig and fix all references. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-02-21-9/+429
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| * pinctrl: imx: Support i.MX7DPeng Fan2016-02-21-0/+56
| | | | | | | | | | | | | | | | | | | | | | Introudce i.MX7 pinctrl driver support. For now only i.MX7D supported. There are two iomux controllers in i.MX7D, iomuxc and iomuxc_lpsr. To iomuxc_lpsr, ZERO_OFFSET_VALID is set, means offset of mux_reg and conf_reg can begin at 0. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * pinctrl: imx: Introduce pinctrl driver for i.MX6Peng Fan2016-02-21-0/+352
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce pinctrl for i.MX6 1. pinctrl-imx.c is for common usage. It's used by i.MX6/7. 2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry. 3. To the pinctrl_ops implementation, only set_state is implemented. To i.MX6/7, the pinctrl dts entry is as following: &iomuxc { pinctrl-names = "default"; pinctrl_csi1: csi1grp { fsl,pins = < MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088 MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 >; }; [.....] }; there is no property named function or groups. So pinctrl_generic_set_state can not be used here. 5. This driver is a simple implementation for i.mx iomux controller, only parse the fsl,pins property and write value to registers. 6. With DEBUG enabled, we can see log when "i2c bus 0": " set_state_simple op missing imx_pinctrl_set_state: i2c1grp mux_reg 0x14c, conf_reg 0x3bc, input_reg 0x5d8, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x14c val 0x10 select_input: offset 0x5d8 val 0x1 write config: offset 0x3bc val 0x7f mux_reg 0x148, conf_reg 0x3b8, input_reg 0x5d4, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x148 val 0x10 select_input: offset 0x5d4 val 0x1 write config: offset 0x3b8 val 0x7f " this means imx6 pinctrl driver works as expected. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * imx: Refactoring CAAM Job Ring structure and Secure Memory for imx7Ulises Cardenas2016-02-21-9/+21
| | | | | | | | | | | | | | | | | | | | | | | | Refactored data structure for CAAM's job ring and Secure Memory to support i.MX7. The new memory map use macros to resolve SM's offset by version. This will solve the versioning issue caused by the new version of secure memory of i.MX7 Signed-off-by: Ulises Cardenas <raul.casas@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* | superio: Add SMSC SIO1007 driverBin Meng2016-02-21-0/+127
| | | | | | | | | | | | | | | | | | | | | | The SMSC SIO1007 superio chipset integrates two ns16550 compatible serial ports for legacy applications, 16 GPIO pins and some other functionalities like power management. This adds a simple driver to enable serial port and handle GPIO. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2016-02-20-92/+28
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| * | drivers: usb: ohci-at91: clean up the PLLB codeWenyou Yang2016-02-18-15/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Due to introducing the new PLLB clock handle functions, use these functions to clean up the PLLB enable/disable code. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Tested-by: Heiko Schocher <hs@denx.de>
| * | drivers: usb: atmel: clean up the UTMI PLL codeWenyou Yang2016-02-18-47/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Due to introducing the new UTMI PLL clock handle functions, use these function to reduce the duplicated code. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | drivers: at91: clean up peripheral clock codeWenyou Yang2016-02-18-29/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to introducing the new peripheral clock handle functions, use these functions to reduce the duplicated code. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> [fixup for missing clk.h in at91_emac.c] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2016-02-19-412/+908
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| * | | tegra: video: Move LCD driver to use the DM PWM driverSimon Glass2016-02-16-4/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the driver-model PWM driver in preference to the old code. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: Convert CONFIG_PWM_TEGRA to KconfigSimon Glass2016-02-16-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move this option to Kconfig and clean up the header files. Adjust the only user (the LCD driver) to work with the new driver. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: video: Move all fdt-decoding into a single functionSimon Glass2016-02-16-159/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Join the two functions which decode the device tree and put them in the ofdata_to_platdata() method. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: video: Move LCD enums into the driverSimon Glass2016-02-16-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to have these in a separate file as they are not referenced from anywhere else. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: video: Remove the static variablesSimon Glass2016-02-16-16/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can move the static variables into the driver-private data. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: video: Convert tegra20 LCD driver to driver modelSimon Glass2016-02-16-213/+172
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move this driver over to use driver model. This involves rearranging the code somewhat. The effect is that everything is run from the probe() method. Boards which use this are fixed up, but only seaboard is tested. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: video: Merge the two config structures togetherSimon Glass2016-02-16-19/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have a structure for the display panel and another for the controller. There is some overlap between them. Merge them to simplify the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: video: Move the check for CONFIG_OF_CONTROL to KconfigSimon Glass2016-02-16-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can check this in Kconfig now. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: video: Merge the display driver into one fileSimon Glass2016-02-16-0/+396
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present we have code in arch/arm and code in drivers/video. Move it all into drivers/video since it is a display driver and our current approach is to put all driver code in drivers/. Make a few functions static now that they are not used outside the file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: video: Rename CONFIG_VIDEO_TEGRA to CONFIG_VIDEO_TEGRA20Simon Glass2016-02-16-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This option refers only to the tegra20 video driver, so name it as such to avoid confusion with tegra124. Also move this option to Kconfig. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: nyan-big: Move the LCD driver to driver modelSimon Glass2016-02-16-194/+237
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: lcd: Merge tegra124-lcd.c into display.cSimon Glass2016-02-16-98/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There isn't a lot of benefit of have two separate files. With driver model the code needs to be in the same driver, so it's better to have it in the same file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: pwm: Add a driver for the tegra PWMSimon Glass2016-02-16-0/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This PWM supports four channels. The driver always uses the 32KHz clock, and adjusts the duty cycle accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: gpio: Show the GPIO value for outputsSimon Glass2016-02-16-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tegra GPIO controller has two ways of reading the value of a GPIO. It can supply the 'input' value (which is the value read from the pin) and the 'output' value (which is the value being driven from the pin. With a GPIO set to output mode, the 'input' value is always low which is not very useful. This has the unfortunate result that setting a GPIO high still leaves it showing as low in the 'gpio status' command. Adjust the driver to check which direction the GPIO is set to, then read the value from the appropriate register: 'input' for input GPIOs, 'output' for output GPIOs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: mmc: Fix comments in the MMC driver initSimon Glass2016-02-16-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the SoC names in two comments. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | dm: video: Flush the cache after a puts()Simon Glass2016-02-16-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This helps keep the display consistent. puts() is used when printing the prompt, so is a useful way to make sure the current display contents is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: keyboard: Fix the init orderSimon Glass2016-02-16-1/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | We need to add the base tables before adding the function tables. Fix the init order so the keyboard scans keys correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | net: phy: marvell: Fix problem with phy_reset() clearing BMCRStefan Roese2016-02-18-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With commit a058052c [net: phy: do not read configuration register on reset], phy_reset() will clear the BMCR register. Resulting in bit 12 being cleared (A/N enable). This leads to autonegotiation link problems, at least on the Marvell Armada ClearFog board. I suspect that other boards using this driver will be affected as well. At the of m88e1111s_config(), phy_reset() is called. This is not needed for the PHY to load the changed configuration, as phy_reset() is called a few lines before already. So lets call genphy_restart_aneg() here instead to start the AN correctly. Tested on clearfog. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Agner <stefan@agner.ch> Cc: Hao Zhang <hzhang@ti.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Andy Fleming <afleming@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: phy: marvell: Call phy_reset() where possibleStefan Roese2016-02-18-21/+2
|/ / | | | | | | | | | | | | | | | | | | | | | | | | Instead of coding the soft PHY reset function multiple times in marvell.c, lets call the common phy_reset() function from phy.c. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Agner <stefan@agner.ch> Cc: Hao Zhang <hzhang@ti.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Andy Fleming <afleming@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2016-02-14-83/+413
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| * | usb: remove UniPhier EHCI driverMasahiro Yamada2016-02-14-83/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now, all this driver does can be covered by the generic EHCI driver (drivers/usb/host/ehci-generic.c). UniPhier SoCs have switched to use it. Delete this driver rather than bothering to convert it to Driver Model. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Marek Vasut <marex@denx.de>
| * | clk: uniphier: add Media I/O clock driver for UniPhier SoCsMasahiro Yamada2016-02-14-0/+413
| | | | | | | | | | | | | | | | | | | | | This is the initial commit for the UniPhier clock drivers. Currently, only the Media I/O clock is supported. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | arasan: nfc: Add initial nand driver support for arasanSiva Durga Prasad Paladugu2016-02-12-0/+1155
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added initial nand driver support for arasan nand flash controller.This supports nand erase,nand read, nand write This uses the hardware ECC for read and write operations ZynqMP uses this driver. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> [scottwood: Fix checkpatch warnings] Signed-off-by: Scott Wood <oss@buserror.net>
* | | zynqmp: nand: Add Nand driver support for zynqmpSiva Durga Prasad Paladugu2016-02-12-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add nand driver support for zynqmp. The Nand controller used in ZynqMP is Arasan Nand Flash controller. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> [scottwood: Fix checkpatch warning] Signed-off-by: Scott Wood <oss@buserror.net>
* | | mtd: pxa3xx_nand: Don't alloc unneeded memoryKevin Smith2016-02-12-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The allocation size is reduced from what was introduced from the Linux kernel, as U-boot uses the statically allocated nand_info instead of needing to dynamically allocate an mtd_info instance. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Scott Wood <scottwood@freescale.com>
* | | mtd: pxa3xx_nand: Correct offset calculationKevin Smith2016-02-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct some pointer math in initialization. An offset was added to a struct-typed pointer instead of one casted to a byte-size, resulting in a much larger offset than intended. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Scott Wood <scottwood@freescale.com>
* | | mtd: pxa3xx_nand: Correct null dereferenceKevin Smith2016-02-12-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct a null pointer dereference in board_nand_init(). Zeroed memory was allocated, then immediately dereferenced. The dereference is completely removed, since this pointer is later initialized in alloc_nand_resources. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Scott Wood <scottwood@freescale.com>
* | | nand: mxs: fix error handling for mxs_nand_initPeng Fan2016-02-12-9/+15
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix error handling for mxs_nand_init. The original error handling is wrong for err2 and err1. Should first free desc[x], then free desc. This patch also correctly handle err3, should use MXS_DMA_CHANNEL_AHB_APBH_GPMI0 as the check point. Cc: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <Fabio.Estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Marek Vasut <marex@denx.de> Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2016-02-11-1/+13
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| * | dm: video: Add a temporary work-around for old stdout varSimon Glass2016-02-11-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Boards with a saved environment may use 'lcd' in their stdout environment variable, expecting that this will enable output to the LCD. When the board moves to use driver model for video, this will no-longer work. Add a work-around to fix this. A warning messages is printed, and we will remove the work-around at the end of 2016. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stephen Warren <swarren@nvidia.com>
| * | video: bcm2835: use bus_to_phys() on FB addressStephen Warren2016-02-06-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The FB address is generated by the firmware running on the GPU/VideoCore and is a "bus" address. This address is the other side of an IOMMU from the ARM upon which U-Boot is running. Use bus_to_phys() to convert this to an ARM physical address. Without this, U-Boot seems to work just fine, but once the Linux kernel boots on an RPi2, accessing the FB memory often causes a hard system hang. This is related to: 122426d46e31 ARM: bcm2835: use phys_to_bus() for mbox 5c0beb5c58c8 usb: dwc2: use phys_to_bus/bus_to_phys 79340db7f1f6 ARM: bcm2835: implement phys_to_bus/bus_to_phys Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | | s3c24xx: serial: Remove dead codeDavid Müller (ELSOFT AG)2016-02-08-6/+0
| | | | | | | | | | | | Signed-off-by: David Müller <d.mueller@elsoft.ch>
* | | Remove unused CONFIG_HWFLOW option and associated dead code.David Müller (ELSOFT AG)2016-02-08-35/+0
| | | | | | | | | | | | Signed-off-by: David Müller <d.mueller@elsoft.ch>
* | | Remove unused CONFIG_MODEM_SUPPORT option and associated dead code.David Müller (ELSOFT AG)2016-02-08-18/+0
| | | | | | | | | | | | Signed-off-by: David Müller <d.mueller@elsoft.ch>
* | | drivers: net: keystone_net: convert driver to adopt device driver modelMugunthan V N2016-02-08-40/+433
| | | | | | | | | | | | | | | | | | | | | Adopt keystone_net driver to adopt device driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | drivers: net: phy: micrel: fix build errors with CONFIG_DM_ETHMugunthan V N2016-02-08-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When Micrel phy is selected without CONFIG_PHY_MICREL_KSZ9031 or CONFIG_PHY_MICREL_KSZ9021 there is a build error. Fixing this by adding proper ifdefs drivers/net/phy/micrel.c:370:39: error: array type has incomplete element type static const struct ksz90x1_reg_field ksz9031_ctl_grp[] = ^ drivers/net/phy/micrel.c:372:39: error: array type has incomplete element type static const struct ksz90x1_reg_field ksz9031_clk_grp[] = ^ drivers/net/phy/micrel.c: In function ‘ksz9031_of_config’: drivers/net/phy/micrel.c:377:23: error: array type has incomplete element type struct ksz90x1_ofcfg ofcfg[] = { ^ drivers/net/phy/micrel.c:379:13: error: ‘ksz90x1_rxd_grp’ undeclared (first use in this function) { MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, 2, ksz90x1_rxd_grp, 4 }, ^ drivers/net/phy/micrel.c:379:13: note: each undeclared identifier is reported only once for each function it appears in drivers/net/phy/micrel.c:380:13: error: ‘ksz90x1_txd_grp’ undeclared (first use in this function) { MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, 2, ksz90x1_txd_grp, 4 }, ^ drivers/net/phy/micrel.c:386:3: warning: implicit declaration of function ‘ksz90x1_of_config_group’ [-Wimplicit-function-declaration] ret = ksz90x1_of_config_group(phydev, &(ofcfg[i])); ^ drivers/net/phy/micrel.c:377:23: warning: unused variable ‘ofcfg’ [-Wunused-variable] struct ksz90x1_ofcfg ofcfg[] = { ^ drivers/net/phy/micrel.c: At top level: drivers/net/phy/micrel.c:370:39: warning: ‘ksz9031_ctl_grp’ defined but not used [-Wunused-variable] static const struct ksz90x1_reg_field ksz9031_ctl_grp[] = ^ drivers/net/phy/micrel.c:372:39: warning: ‘ksz9031_clk_grp’ defined but not used [-Wunused-variable] static const struct ksz90x1_reg_field ksz9031_clk_grp[] = ^ scripts/Makefile.build:277: recipe for target 'drivers/net/phy/micrel.o' failed make[1]: *** [drivers/net/phy/micrel.o] Error 1 Makefile:1201: recipe for target 'drivers/net/phy' failed make: *** [drivers/net/phy] Error 2 make: *** Waiting for unfinished jobs.... Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | dm: pxa: serial: Drop serial_sa1100 serial driverSimon Glass2016-02-08-163/+0
| | | | | | | | | | | | | | | | | | | | | | | | This does not appear to be used, and has not been converted to driver model by the deadline (doc/driver-model/serial-howto.txt). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.1 at 2024-11-01 04:26:44 +0000