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| * | spi: xilinx_spi: Use BIT macroJagan Teki2015-10-27-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in xilinx_spi :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: ti_qspi: Use BIT macroJagan Teki2015-10-27-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in ti_qspi :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Reviewed-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: tegra: Use BIT macroJagan Teki2015-10-27-86/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in tegra*.c :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Tom Warren <twarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: sh_qspi: Use BIT macroJagan Teki2015-10-27-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in sh_qspi :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: omap3_spi: Use BIT macroJagan Teki2015-10-27-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in omap3_spi :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: mpc8xxx_spi: Use BIT macroJagan Teki2015-10-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in mpc8xxx_spi :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: ich: Use BIT macroJagan Teki2015-10-27-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in ich :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: fsl: Use BIT macroJagan Teki2015-10-27-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in fsl_*spi.c :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: York Sun <yorksun@freescale.com> Cc: Haikun Wang <Haikun.Wang@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: designware_spi: Use BIT macroJagan Teki2015-10-27-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in designware_spi :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: cadence_qspi_apb: Use BIT macroJagan Teki2015-10-27-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in cadence_qspi_apb :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Acked-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: bfin_spi6xx: Use BIT macroJagan Teki2015-10-27-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in bfin_spi6xx :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: atmel_spi: Use BIT macroJagan Teki2015-10-27-26/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in atmel_spi :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Bo Shen <voice.shen@atmel.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: zynq_[q]spi: Use GENMASK macroJagan Teki2015-10-27-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GENMASK macro used on zynq_spi.c and zynq_qspi.c GENMASK is used to create a contiguous bitmask([hi:lo]). Ex: (0x7 << 3) => GENMASK(5, 3) Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: zynq_[q]spi: Use BIT macroJagan Teki2015-10-27-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Used BIT macro on zynq_spi.c and zynq_qspi.c :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: zynq_qspi: Minor cleanupsJagan Teki2015-10-25-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | - Use __func__ on debug - Removed unnecessary comment - Fix function name in debug as zynq_qspi_xfer instead of spi_xfer Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | sf: Add FSR support to spi_flash_cmd_wait_readyJagan Teki2015-10-25-9/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds flag status register reading support to spi_flash_cmd_wait_ready. Cc: Simon Glass <sjg@chromium.org> Cc: Marek Vasut <marex@denx.de> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Stefan Roese <sr@denx.de> Cc: Tom Warren <twarren@nvidia.com> Cc: Tom Rini <trini@konsulko.com> Cc: Hou Zhiqiang <B48286@freescale.com> Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | sf: Update status reg check in spi_flash_cmd_wait_readyJagan Teki2015-10-25-58/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current flash wait_ready logic is not modular to add new register status check, hence updated the status check for adding few more register checks in future. Below are the sf speed runs with 'sf update' on whole flash, 16MiB. => sf update 0x100 0x0 0x1000000 device 0 whole chip 16777216 bytes written, 0 bytes skipped in 59.564s, speed 289262 B/s => sf update 0x100 0x0 0x1000000 device 0 whole chip 16777216 bytes written, 0 bytes skipped in 62.549s, speed 275036 B/s => sf update 0x100 0x0 0x1000000 device 0 whole chip 16777216 bytes written, 0 bytes skipped in 61.276s, speed 284359 B/s Cc: Simon Glass <sjg@chromium.org> Cc: Marek Vasut <marex@denx.de> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Stefan Roese <sr@denx.de> Cc: Tom Warren <twarren@nvidia.com> Cc: Tom Rini <trini@konsulko.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * | sf: Make flash->flags use for generic usageJagan Teki2015-10-25-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the flash->flags for generic usage, not only for dm-spi-flash, this will be used for future flag additions. [Correct the spi flash flags detect logic] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | sf: Optimize BAR write codeJagan Teki2015-10-25-28/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optimized spi-flash bar writing code and also removed unnecessary bank_sel in read_ops. Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | sf: Add spi_flash_read_barJagan Teki2015-10-25-19/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add spi_flash_read_bar function for reading bar and discovering bar commands at probe time. Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | sf: Return bank_sel, if flash->bank_curr == bank_selJagan Teki2015-10-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | If computed bank_sel is same as flash->bank_curr which is computed at probe time, then return the bank_sel instead of zero. Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: zynq_spi: Remove unneeded headersJagan Teki2015-10-25-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | - Removed unneeded inclusion of header files - Add "Xilinx" on license text Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: zynq_qspi: Fix to configure CPOL, CPHA maskJagan Teki2015-10-25-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | priv->mode is initialized when .set_speed triggers with mode value, so checking mode for configuring CPOL, CPHA using priv->mode is invalid hence use mode from .set_speed argument, and at the end priv->mode will initialized with mode. This patch also replaces formatting string to use speed instead of mode in .set_speed ops. Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | sf: params: Add IS25LP128 part supportJagan Teki2015-10-25-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Added support for IS25LP128 flash part. Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com>
| * | sf: params: Add IS25LP064 part supportJagan Teki2015-10-25-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Added support for IS25LP064 flash part. Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com>
| * | sf: params: Add IS25LP032 part supportJagan Teki2015-10-25-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Added support for IS25LP032 flash part. Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com>
| * | spi: zynq_spi: Store cs value into private dataJagan Teki2015-10-25-3/+5
| | | | | | | | | | | | | | | | | | | | | Store cs value into private data and use it while activating chipselect instead of passing through function. Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: zynq_spi: Rename baudrate divisor mask nameJagan Teki2015-10-25-2/+2
| | | | | | | | | | | | | | | | | | | | | Rename ZYNQ_SPI_CR_BRD_MASK to ZYNQ_SPI_CR_BAUD_MASK for more readable. Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: zynq_spi: Add config reg shift named macrosJagan Teki2015-10-25-3/+7
| | | | | | | | | | | | | | | | | | | | | Update the numerical values for baudrate and chipselect with config reg shift named macro's Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: Kconfig: Add Zynq QSPI controller entryJagan Teki2015-10-25-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add Zynq QSPI controller Kconfig entry. Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * | spi: Add zynq qspi controller driverJagan Teki2015-10-25-0/+623
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added zynq qspi controller driver for Xilinx Zynq APSOC, this driver is driver-model driven with devicetree support. => sf probe SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB => mw.b 0x100 0xCC 0x1000000 => sf update 0x100 0x0 0x1000000 device 0 whole chip 16777216 bytes written, 0 bytes skipped in 59.842s, speed 289262 B/s => sf read 0x3000000 0x0 0x1000000 device 0 whole chip SF: 16777216 bytes @ 0x0 Read: OK => cmp.b 0x3000000 0x100 0x1000000 Total of 16777216 byte(s) were the same Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Jagan Teki <jteki@openedev.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2015-10-28-0/+4
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| * | i2c: Instantiate I2C controllers when selectedMichal Simek2015-10-28-0/+4
| |/ | | | | | | | | | | | | | | Do not enable both I2C controllers by default. Enable them only when they are selected. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | Merge git://www.denx.de/git/u-boot-cfi-flashTom Rini2015-10-27-41/+41
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| * | cfi_flash: use specific width types for cwordRyan Harkin2015-10-27-41/+41
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the cword union to use specific length types that are architecture indepented. This patch also renames the members of the cword union to represent their usage, i.e.: c -> w8 s -> w16 l -> w32 ll -> w64 Where "w" stands for "width" in bits. I discovered this problem when enabling CFI flash on vexpress64. cword.l was an unsigned long int, but it was intended to be 32 bits wide. Unfortunately, it's 64-bits wide on a 64-bit system, meaning that a 64-bit system fails when attempting to use 32-bit wide CFI flash parts. Similar problems also existed with the other cword sizes. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge git://git.denx.de/u-boot-dmTom Rini2015-10-27-65/+86
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| * | dm: tpm: Drop CONFIG_DM_TPMSimon Glass2015-10-23-13/+4
| | | | | | | | | | | | | | | | | | | | | | | | Now that all TPM drivers use driver model, we can drop the special driver model CONFIG option. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
| * | dm: tpm: Every TPM drivers should depends on DM_TPMChristophe Ricard2015-10-23-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Every TPM drivers should now depends on DM_TPM and not only TPM. Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | dm: tpm: Remove every compilation switch for TPM driver modelChristophe Ricard2015-10-23-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As every TPM drivers support UCLASS_TPM, we can only rely on DM_TPM functions. This simplify a bit the code. Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | dm: tpm: Add Driver Model support for tpm_atmel_twi driverChristophe Ricard2015-10-23-19/+51
| | | | | | | | | | | | | | | | | | | | | | | | tpm_atmel_twi can fit perfectly to the new UCLASS_TPM class. Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | dm: tpm: Move tpm_tis_i2c to tpm_i2c_infineonChristophe Ricard2015-10-23-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As there is no TCG specification or recommendation for i2c TPM 1.2, move tpm_tis_i2c driver to tpm_i2c_infineon. Other tpm vendors like Atmel or STMicroelectronics may have a different transport protocol for i2c. Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | dm: Rename dev_get_parentdata() to dev_get_parent_priv()Simon Glass2015-10-23-29/+29
| | | | | | | | | | | | | | | | | | | | | | | | The current name is inconsistent with other driver model data access functions. Rename it and fix up all users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* | | UBI: Fastmap: Fix PEB array typeHeiko Schocher2015-10-26-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The PEB array is an array of __be32, so let's fix the scan_pool() prototype accordingly. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Heiko Schocher <hs@denx.de>
* | | ubi,ubifs: sync with linux v4.2Heiko Schocher2015-10-26-1347/+1860
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sync with linux v4.2 commit 64291f7db5bd8150a74ad2036f1037e6a0428df2 Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Aug 30 11:34:09 2015 -0700 Linux 4.2 This update is needed, as it turned out, that fastmap was in experimental/broken state in kernel v3.15, which was the last base for U-Boot. Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
* | | linux, compat: add missing definitions for ubiHeiko Schocher2015-10-26-5/+0
| |/ |/| | | | | | | | | | | | | | | | | | | | | add missing definitions for the ubi/ubifs sync with linux 4.2, also change "#define kfree ..." into a static inline, so prevent ubi compile error: CC drivers/mtd/ubi/fastmap.o drivers/mtd/ubi/fastmap.c: In function 'scan_pool': drivers/mtd/ubi/fastmap.c:475:3: error: called object 'free' is not a function Signed-off-by: Heiko Schocher <hs@denx.de>
* | Fix bad return value checks (detected with Coccinelle)Thomas Huth2015-10-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the "Getting Started with Coccinelle - KVM edition" presentation that has been held by Julia Lawall at the KVM forum 2015 (see the slides at http://events.linuxfoundation.org/sites/events/files/slides/tutorial_kvm_0.pdf), she pointed out some bad return value checks in U-Boot that can be detected with Coccinelle by using the following config file: @@ identifier x,y; identifier f; statement S; @@ x = f(...); ( if (x < 0) S | if ( - y + x < 0) S ) This patch now fixes these issues. Signed-off-by: Thomas Huth <huth@tuxfamily.org>
* | allow LED initialization without STATUS_LED_BOOTBernhard Nortmann2015-10-24-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For current U-Boot to initialize status LEDs via status_led_init(), it is required to have both CONFIG_STATUS_LED and STATUS_LED_BOOT defined. This may be a particular concern with GPIO LEDs, where __led_init() is required to correctly set up the GPIO (gpio_request and gpio_direction_output). Without STATUS_LED_BOOT the initialization isn't called, which could leave the user with a non-functional "led" command - due to the fact that the LED routines in gpio_led.c use gpio_set_value() just fine, but the GPIO never got set up properly in the first place. I think having CONFIG_STATUS_LED is sufficient to justify a corresponding call to status_led_init(), even with no STATUS_LED_BOOT defined. To do so, common/board_r.c needs call that routine, so it now is exposed via status_led.h. Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> [trini: Add dummy __led_init to pca9551_led.c] Signed-off-by: Tom Rini <trini@konsulko.com>
* | add generic stubs for GPIO LEDsBernhard Nortmann2015-10-23-0/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For boards that support LEDs driven via GPIO (CONFIG_GPIO_LED), it may be useful to have some generic stubs (wrapper functions) for the "colored" LEDs. This allows defining STATUS_LED_* values directly to GPIO numbers, e.g.: #define STATUS_LED_GREEN 248 /* = PH24 */ To keep those optional, it's probably best to introduce an additional configuration setting. I've chosen CONFIG_GPIO_LED_STUBS for that. Placing the code in drivers/misc/gpio_led.c also ensures that it automatically depends on CONFIG_GPIO_LED too. Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dm: keystone: serial: Add driver model supportLokesh Vutla2015-10-23-0/+49
| | | | | | | | | | | | | | Add driver model support for keystone serial driver. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
* | net: convert altera_tse to driver model and phylibThomas Chou2015-10-23-1047/+382
| | | | | | | | | | | | | | | | Convert altera_tse to driver model and phylib. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-08 17:55:06 +0000