summaryrefslogtreecommitdiff
path: root/drivers
Commit message (Collapse)AuthorAgeLines
* rtc, rv3029: add trickle charger support.Heiko Schocher2011-04-26-0/+87
| | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
* cfi_flash driver - Add delay after reset commandAaron Williams2011-04-21-0/+7
| | | | | | | | | | | | | I ran into a problem where the reset was failing except when I enabled debugging support. After talking with Garret Swalling at Spansion I was told that the GL-N series of devices require a 500ns wait for the reset to complete. The below patch adds a 1us delay after all reset commands. -Aaron Williams Signed-off-by: Aaron Williams <aaron.williams@caviumnetworks.com> Signed-off-by: Stefan Roese <sr@denx.de>
* mtd, cfi: read AMD 3-byte (expanded) device ids on 16bit devicesHeiko Schocher2011-04-21-2/+11
| | | | | | | | | | | | | | | | | | | | | tested on the a4m072 board with a S29GL512P flash. flinfo without this patch Bank # 1: CFI conformant flash (16 x 16) Size: 32 MB in 256 Sectors AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E Erase timeout: 16384 ms, write timeout: 2 ms Buffer write timeout: 5 ms, buffer size: 32 bytes [...] flinfo with this patch Bank # 1: CFI conformant flash (16 x 16) Size: 32 MB in 256 Sectors AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2301 Erase timeout: 16384 ms, write timeout: 2 ms Buffer write timeout: 5 ms, buffer size: 32 bytes [...] Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: reverse geometry for M29W800DT partsMike Frysinger2011-04-21-3/+4
| | | | | | | | | | | | | | | | | | | | | | The M29W800DT parts also report their geometry with the sector layout reversed. So add that ID to the flash_fixup_stm function. Otherwise, we get: bfin> flinfo Bank # 1: CFI conformant FLASH (16 x 16) Size: 1 MB in 19 Sectors AMD Standard command set, Manufacturer ID: 0x20, Device ID: 0x22D7 Erase timeout: 8192 ms, write timeout: 1 ms Sector Start Addresses: 20000000 20004000 20006000 20008000 20010000 20020000 20030000 20040000 20050000 20060000 20070000 20080000 20090000 200A0000 200B0000 200C0000 200D0000 200E0000 200F0000 Reported-by: Jianxi Fu <fujianxi@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'phylib' of git://git.denx.de/u-boot-mmcWolfgang Denk2011-04-20-1864/+2890
|\
| * fsl: Change fsl_phy_enet_if to phy_interface_tAndy Fleming2011-04-20-46/+49
| | | | | | | | | | | | | | | | | | | | | | | | The fsl_phy_enet_if enum was, essentially, the phy_interface_t enum. This meant that drivers which used fsl_phy_enet_if to deal with PHY interfaces would have to convert between the two (or we would have to have them mirror each other, and deal with the ensuing maintenance headache). Instead, we switch all clients of fsl_phy_enet_if over to phy_interface_t, which should become the standard, anyway. Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Detlev Zundel <dzu@denx.de>
| * tsec: Convert tsec to use PHY LibAndy Fleming2011-04-20-1505/+219
| | | | | | | | | | | | | | | | | | | | | | | | | | This converts tsec to use the new PHY Lib. All of the old PHY support is ripped out. The old MDIO driver is split off, and placed in fsl_mdio.c. The initialization is modified to initialize the MDIO driver as well. The powerpc config file is modified to configure PHYLIB if TSEC_ENET is configured. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Detlev Zundel <dzu@denx.de>
| * phylib: Add a bunch of PHY drivers from tsecAndy Fleming2011-04-20-0/+1500
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tsec driver had a bunch of PHY drivers already written. This converts them all into PHY Lib drivers, and serves as the first set of PHY drivers for PHY Lib. While doing that, cleaned up a number of magic numbers (though not all of them, as PHY vendors like to keep their numbers as magical as possible). Also, noticed that almost all of the vitesse/cicada PHYs had the same config/parse/startup functions, so those have been collapsed into one. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Detlev Zundel <dzu@denx.de>
| * Create PHY Lib for U-BootAndy Fleming2011-04-20-0/+831
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extends the mii_dev structure to participate in a full-blown MDIO and PHY driver scheme. The mii_dev structure and miiphy calls are modified in such a way to allow the original mii command and miiphy infrastructure to work as before, but also to support a new set of APIs which allow (among other things) sharing of PHY driver code and 10G support The mii command will continue to support normal PHY management functions (Clause 22 of 802.3), but will not be changed to support 10G (Clause 45). The basic design is similar to PHY Lib from Linux, but simplified for U-Boot's network and driver infrastructure. We now have MDIO drivers and PHY drivers An MDIO driver provides: read write reset A PHY driver provides: (optionally): probe config - initial setup, starting of auto-negotiation startup - waiting for AN, and reading link state shutdown - any cleanup needed The ethernet drivers interact with the PHY Lib using these functions: phy_connect() phy_config() phy_startup() phy_shutdown() Each PHY driver can be configured separately, or all at once using config_phylib_all_drivers.h (added in the patch which adds the drivers) We also provide generic drivers for Clause 22 (10/100/1000), and Clause 45 (10G) PHYs. We also implement phy_reset(), and call it in phy_connect(). Because phy_reset() is essentially the same as miiphy_reset, but: a) must support 10G PHYs, and b) should use the phylib primitives, we implement miiphy_reset, using phy_reset(), but only when CONFIG_PHYLIB is set. Otherwise, we just use the old version. In this way, we save on compile size, even if we don't manage to save code size. Pulled ethtool.h and mdio.h from: git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6 782d640afd15af7a1faf01cfe566ca4ac511319d With many, many deletions so as to enable compilation under u-boot Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Detlev Zundel <dzu@denx.de>
| * Remove instances of phy_read/writeAndy Fleming2011-04-20-107/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There were a few files which were already using phy_read and phy_write for their PHY function names. It's only a few places, and the name seems most appropriate for the high-level abstraction, so let's rename the other versions to something more specific. Also, uec_phy.c had a marvell_init function which I renamed to not conflict with the one in marvell.c Lastly, uec_phy.c was putting a space between the phy writing function names, and the open paren, so I fixed that Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Detlev Zundel <dzu@denx.de>
| * tsec: arrange the code to avoid useless function declarationMingkai Hu2011-04-20-440/+415
| | | | | | | | | | | | | | | | | | | | This is merely a rearrangement. No changes to the code, except to remove now-useless declarations. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Detlev Zundel <dzu@denx.de>
| * tsec: use IO accessors for IO accessesMingkai Hu2011-04-20-123/+126
| | | | | | | | | | | | | | Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Detlev Zundel <dzu@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2011-04-20-9/+13
|\ \
| * | NAND: rearrange ONFI revision checking, add ONFI 2.3Florian Fainelli2011-04-15-8/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch sync with Brian's patch on Linux in nand_flash_detect_onfi() commit b7b1a29d94c17e4341856381bccb4d17495bea60 Author: Brian Norris <computersforpeace@gmail.com> Date: Sun Dec 12 00:23:33 2010 -0800 mtd: nand: rearrange ONFI revision checking, add ONFI 2.3 In checking for the ONFI revision, the first conditional (for checking "unsupported" ONFI) seems unnecessary. All ONFI revisions should be backwards-compatible; even if this is not the case on some newer ONFI revision, it should simply fail the second version-checking if-else block (i.e., the bit-fields for 1.0, 2.0, etc. would not be set to 1). Thus, we move our "unsupported" condition after having checked each bit field. Also, it's simple enough to add a condition for ONFI revision 2.3. Note that this does *NOT* mean we handle all new features of ONFI versions above 1.0. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Florian Fainelli <ffainelli@freebox.fr> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Florian Fainelli <florian@openwrt.org>
| * | NAND: Fix integer overflow in ONFI detection of chips >= 4GiBFlorian Fainelli2011-04-15-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | This patch sync with David's patch on Linux in nand_flash_detect_onfi() commit 4ccb3b4497ce01fab4933704fe21581e30fda1a5 Author: David Woodhouse <David.Woodhouse@intel.com> Date: Fri Dec 3 16:36:34 2010 +0000 mtd: nand: Fix integer overflow in ONFI detection of chips >= 4GiB Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Florian Fainelli <florian@openwrt.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2011-04-20-31/+11
|\ \
| * | I2C: OMAP: detect more devices when probing an i2c busNick Thompson2011-04-14-31/+11
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The omap24xx driver only seems to support devices that have a single subaddress byte. With these types of devices, the first access in a bus transaction is usually a write (writes the subaddress) followed by either a read or write to access the devices registers. Many such devices will respond to a read as the first access, but there are at least some that will NACK such a read. (e.g. ADV7180.) The probe function attempts to detect a devices ACK to a read access only and fails to find devices that NACK a read. This commit modifies the probe function to start a write instead. This detects devices that respond to reads (since they must also respond to writes) as well as those that only respond to writes. The bus is immediately set to idle after a (N)ACK avoiding actually writing anything to the device. Signed-off-by: Nick Thompson <nick.thompson@ge.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mmcWolfgang Denk2011-04-20-49/+514
|\ \ | |/ |/|
| * MMC may wrongly regconize 2GB eMMC as high capacityRaffaele Recalcati2011-04-13-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hi Terry, > So I guess: > mmc_init calls mmc_send_op_cond  that set  high_capacity, > than it calls mmc_startup, that, with MMC_CMD_SEND_CSD  command, set > the capacity, using values in CSD register. > So I guess that mmc_change_freq should not recalculate high_capacity. > > It seems better, isn't it? > > Regards, > Raffaele > Finally I think that it is enough to apply the following patch in order to fix the issue. Regards, Raffaele Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: trace addedRaffaele Recalcati2011-04-13-0/+57
| | | | | | | | | | | | | | | | | | | | Defining CONFIG_MMC_TRACE in the include board file it is possible to activate a tracing support. This code helps in case of eMMC hw failure or to investigate possible eMMC initialization issues. Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: SEND_OP_COND considers card capabilities (voltage)Raffaele Recalcati2011-04-13-3/+18
| | | | | | | | | | | | | | | | | | | | | | The first SEND_OP_COND (CMD1) command added is used to ask card capabilities. After it an AND operation is done between card capabilities and host capabilities (at the moment only for the voltage field). Finally the correct value is sent to the MMC, waiting that the card exits from busy state. Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: checking status after commands with R1b responseRaffaele Recalcati2011-04-13-3/+59
| | | | | | | | | | | | | | | | | | | | It is recommended to check card status after these kind of commands. This is done using CMD13 (SEND_STATUS) JEDEC command until the card is ready. In case of error the card status field is displayed. Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: remove duplicated header fileMinkyu Kang2011-04-13-1/+0
| | | | | | | | | | Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: add generic mmc spi driverThomas Chou2011-04-13-20/+354
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch supports mmc/sd card with spi interface. It is based on the generic mmc framework. It works with SDHC and supports multi blocks read/write. The crc checksum on data packet is enabled with the def, There is a subcomamnd "mmc_spi" to setup spi bus and cs at run time. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: constify & localize dataMike Frysinger2011-04-13-2/+2
| | | | | | | | | | | | | | These local vars need not be writable nor exported. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * drivers/mmc/fsl_esdhc.c: reordered testsFrans Meulenbroeks2011-04-13-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | As DATA_ERROR includes the value IRQSTAT_DTOE, a timeout error would yield the first error return instead of TIMEOUT. By swapping the test TIMEOUTs are reported as such An alternate solution would be to remove the IRQSTAT_DTOE from the DATA_ERROR define but as that one might be less desired I've opted for the simplest solution Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * add CONFIG_SPI_IDLE_VAL for cf_spi.c to allow use of spi_mmcWolfgang Wegner2011-04-13-3/+11
| | | | | | | | | | | | | | | | | | | | This patch adds CONFIG_SPI_IDLE_VAL to cf_spi.c The default setting is 0x0 to behave same as current version, in case CONFIG_SPI_MMC is set, the value is set to 0xFFFF (all ones). In either case, the value can be overwritten by board configuration. Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * MMC: Max blocks value adjustableMatt Waddel2011-04-13-10/+9
| | | | | | | | | | | | | | | | | | | | The maximum blocks value was hardcoded to 65535 due to a 16 bit register length. The value can change for different platforms. This patch makes the default the current value of 65535, but it is configurable for other platforms. Signed-off-by: Matt Waddel <matt.waddel@linaro.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * SD1.00 wide-bus fixAlagu Sankar2011-04-13-3/+3
| | | | | | | | | | | | Fixed a bug wherein SD version 1.0 cards were not configured for 4-bit mode Signed-off-by: Alagu Sankar <alagusankar@embwise.com>
* | Merge branch 'sf' of git://git.denx.de/u-boot-blackfinWolfgang Denk2011-04-13-75/+71
|\ \
| * | sf: sst: add support for SST25VF064CJames Kosin2011-04-13-0/+4
| | | | | | | | | | | | | | | Signed-off-by: James Kosin <jkosin@intcomgrp.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | sf: use print_size() for sector_size outputMike Frysinger2011-04-12-2/+2
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | sf: localize erase funcsMike Frysinger2011-04-12-9/+9
| | | | | | | | | | | | | | | | | | | | | No need for these to be exported as they are only accessed indirectly via function pointers. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | sf: sst: setup read funcMike Frysinger2011-04-12-0/+1
| | | | | | | | | | | | | | | | | | The previous unification patch missed setting up the sst read func. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | sf: add struct spi_flash.sector_size parameterRichard Retanubun2011-04-12-64/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a new member to struct spi_flash (u16 sector_size) and updates the spi flash drivers to start populating it. This parameter can be used by spi flash commands that need to round up units of operation to the flash's sector_size. Having this number in one place also allows duplicated code to be further collapsed into one common location (such as erase parameter and the detected message). Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | sf: atmel: undo unification of status pollingMike Frysinger2011-04-11-2/+29
| | | | | | | | | | | | | | | | | | | | | | | | The AT45 flashes are completely different (at the command set and status register level) from all other SPI flashes, so we can't unify their logic with common code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | cfi_flash: Fix CONFIG_SYS_FLASH_AUTOPROTECT_LIST usagePeter Tyser2011-04-13-6/+8
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 6ee1416e8184b4d9ebe6087d396a60bcecf3551c (mtd, cfi: introduce void flash_protect_default(void)) introduced a bug which resulted in boards that define CONFIG_SYS_FLASH_AUTOPROTECT_LIST not compiling with the the following errors and warning: ptyser@petert u-boot $ make -s xpedite520x Configuring for xpedite520x board... cfi_flash.c: In function 'flash_protect_default': cfi_flash.c:2118: error: 'i' undeclared (first use in this function) cfi_flash.c:2118: error: (Each undeclared identifier is reported only once cfi_flash.c:2118: error: for each function it appears in.) cfi_flash.c:2118: error: 'apl' undeclared (first use in this function) cfi_flash.c:2118: error: invalid application of 'sizeof' to incomplete type 'struct apl_s' cfi_flash.c: In function 'flash_init': cfi_flash.c:2137: warning: unused variable 'apl' Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Reported-by: Kumar Gala <galak@kernel.crashing.org> Cc: Heiko Schocher <hs@denx.de>
* | ftwdt010_wdt: move header to include/faraday and enhanceMacpaul Lin2011-04-12-108/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | 1. Move header to include/faraday 2. Fix include path in ftwdt010_wdt.c 3. Fix function prototype and declaration to - ftwdt010_wdt_settimeout - ftwdt010_wdt_reset - ftwdt010_wdt_disable 4. Add "#if definde (CONFIG_HW_WATCHDOG)" let user have flexibilty to choose which better to his product. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* | Fix misc spelling errors found by lintianLoïc Minier2011-04-12-1/+1
|/ | | | Signed-off-by: Loïc Minier <loic.minier@linaro.org>
* ftwdt010_wdt: support faraday ftwdt010 watchdogMacpaul Lin2011-04-11-0/+206
| | | | | | | | Faraday ftwdt010 watchdog is an architecture independant watchdog. It is usually used in SoC chip design. Signed-off-by: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* Net: Add Intel E1000 82574L PCIe card supportRoy Zang2011-04-11-8/+31
| | | | | | | | | Add Intel E1000 82574L PCIe card support. Test on MPC8544DS and MPC8572 board. Add the missing contact information for future support. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* ea20: fix undefined PHY_* errorsBen Gardiner2011-04-11-3/+3
| | | | | | | | | | | This patch fixes ea20 after 8ef583a0351590a91394499eb5ca2ab8a703d959 where the u-boot custom PHY_ macros were replaced with those of linux/mii.h MII_ definitions except in the RMII support for davinci_emac. Probably also due to the merge path of changes in 2010.12. Signed-off-by: Ben Gardiner<bengardiner@nanometrics.ca> CC: Mike Frysinger <vapier@gentoo.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify read functionsMike Frysinger2011-04-11-157/+22
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify erase functionsMike Frysinger2011-04-11-335/+83
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify status polling for ready bitMike Frysinger2011-04-11-283/+81
| | | | | | | | All of the spi flash drivers implement the status register polling for detecting the device ready state, so unify them all in a new helper function -- spi_flash_wait_ready. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify read/write helpersMike Frysinger2011-04-11-48/+19
| | | | | | | These functions largely do the same exact thing, so unify them all into one basic function. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-04-10-5/+40
|\
| * fsl_esdhc: Deal with watermark level register related changesPriyanka Jain2011-04-10-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | P1010 and P1014 has v2.3 version of FSL eSDHC controller in which watermark level register description has been changed: 9-15 bits represent WR_WML[0:6], Max value = 128 represented by 0x00 25-31 bits represent RD_WML[0:6], Max value = 128 represented by 0x00 Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add P1021 specific QE and UEC supportHaiying Wang2011-04-05-1/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | P1021 has some QE pins which need to be set in pmuxcr register before using QE functions. In this patch, pin QE0 and QE3 are set for UCC1 and UCC5 in Eth mode. QE9 and QE12 are set for MII management. QE12 needs to be released after MII access because QE12 pin is muxed with LBCTL signal. Also added relevant QE support defines unique to P1021. The P1021 QE is shared on P1012, P1016, and P1025. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2011-04-10-6/+9
|\ \
generated by cgit v1.1 at 2024-11-10 02:28:48 +0000