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* mtd: nand: pxa3xx: use nand_set_controller_dataChris Packham2016-09-01-0/+1
| | | | | | | | | In commit 17cb4b8f327e ("mtd: nand: Add+use mtd_to/from_nand and nand_get/set_controller_data") the assignment of mtd->priv was removed but was not replaced. This adds the required nand_set_controller_data() call. Signed-off-by: Chris Packham <judge.packham@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2016-08-28-70/+80
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| * ARM: uniphier: change UNIPHIER_SERIAL to default y optionMasahiro Yamada2016-08-28-0/+1
| | | | | | | | | | | | | | This is very likely to be necessary for normal use cases. Set its default to 'y' for shorter defconfig files. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mmc: uniphier-sd: just return if already set to desired clock rateMasahiro Yamada2016-08-28-2/+5
| | | | | | | | | | | | With this, we can save unnecessary udelay(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mmc: uniphier-sd: return error code if unsupported width is givenMasahiro Yamada2016-08-28-5/+9
| | | | | | | | | | | | | | | | With the CONFIG_DM_MMC_OPS migration, the .set_ios callback can return an integer now. Return an appropriate error value rather than sudden death by BUG(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mmc: uniphier-sd: move uniphier_sd_init() belowMasahiro Yamada2016-08-28-21/+19
| | | | | | | | | | | | | | | | No more reason to define this function above the ops structure. Move it near the caller. Also, change its return type to void because it never fails. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mmc: uniphier-sd: migrate to CONFIG_DM_MMC_OPSMasahiro Yamada2016-08-28-47/+51
| | | | | | | | | | | | | | | | | | Catch up with the DM migration. As struct dm_mmc_ops does not have .init callback, call the init function directly from the probe function. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mmc: uniphier-sd: add static qualifiers to probe and remove callbacksMasahiro Yamada2016-08-28-2/+2
| | | | | | | | | | | | They are both only referenced in this file. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | sunxi: display: Use PWM to drive backlight where applicableHans de Goede2016-08-26-0/+11
|/ | | | | | | | | | | | | | | | | | | | | When the backlight's pwm input is connected to a pwm output of the SoC, actually use pwm to drive the backlight. The mean reason for doing this is to fix the backlight turning off for aprox. 1 second while the kernel is booting. This is caused by the kernel actually using pwm to drive the backlight, so that it can dim the backlight. First the pwm driver loads and switches the pinmux for the pin driving the backlight's pwm input to the pwm controller. Then about 1s later the actual backlight driver loads and tells the pwm driver to actually update the pwm settings, which have a power-on-reset value of "off". An additional advantage is that this allows us to initatiate the backlight at 80%, which is the kernel default, avoiding a brightness change while the kernel loads. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed by: Peter Korsgaard <peter@korsgaard.com>
* Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2016-08-26-2/+2
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| * i2c: mvtwsi: Fix order of address bytes (high to low)Stefan Roese2016-08-26-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Patch f8a10ed1 [i2c: mvtwsi: Make address length variable] accidentally inverted the sequence of address bytes sent to the I2C device. This patch corrects this by sending the highest byte first and the lowest byte last again. Tested on theadorable Armada-XP board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Mario Six <mario.six@gdsys.cc> Cc: Heiko Schocher <hs@denx.de>
* | spi: tegra: fix hang in set_mode()Stephen Warren2016-08-25-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In tegra20_slink.c, the set_mode() function may be executed before the SPI bus is claimed the first time, and hence the clocks to the SPI controller may not be running. If so, any register read/write at this time will hang the CPU. Fix this by ensuring the clock is running as soon as the driver is probed. This is observed on the Tegra30 Beaver board. Apply the same clock initialization fix to all other Tegra SPI drivers so that if set_mode() is ever implemented there, the same bug will not appear. Note that tegra114_spi.c already operates in this fashion. The clock manipulation code is copied from claim_bus() to probe() rather than moved. This ensures that any calls to set_speed() take effect; the clock can't be set once during probe and left unchanged. Fixes: 5cb1b7b395c0 ("spi: tegra20: Add support for mode selection") Cc: Mirza Krak <mirza.krak@hostmobility.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: remove stale nvidia, bpmp I2C DT propertyStephen Warren2016-08-25-10/+0
| | | | | | | | | | | | | | | | | | | | The nvidia,bpmp property is left over from an old BPMP I2C binding, and shouldn't be present. Remove it from the SoC DT file, and update the I2C driver not to parse it; the value wasn't used for anything any more anyway. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: fix Tegra186 SDHCI clock/reset namesStephen Warren2016-08-25-3/+3
| | | | | | | | | | | | | | | | | | The Tegra SDHCI binding dictates that the reseet name for the Tegra SDHCI clock be "sdhci" not "sdmmc", and that the clock is accessed by index rather than by name. Fix the Tegra186 DT and MMC driver to honor this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: fix Tegra186 I2C clock nameStephen Warren2016-08-25-1/+1
|/ | | | | | | | The Tegra I2C binding dictates that the clock name for the Tegra I2C clock be "div-clk" not "i2c". Fix the Tegra186 DT and I2C driver to honor this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* net: davinci_emac: Restore the internal MDIO accessors return valueskarl beldan2016-08-22-7/+6
| | | | | | | | | | | | | | | | | The spatch series converting legacy drivers from miiphy_register to mdio_register changed the return convention of the davinci_emac internal MDIO accessors, making the internal code relying on it misbehaving: no mdiodev get registered and U-Boot crashes when using net cmds in the context of the old legacy net API. ATM davinci_emac_initialize and cpu_eth_init don't return a proper value in that case but fixing them would not avoid the crash. This change is just a follow-up to the spatch pass, the MDIO accessors of the mdiodev introduced by the spatch pass retain their proper values. Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net/fm: Remove unused code of FMan QMIHou Zhiqiang2016-08-22-3/+0
| | | | | | | | The QMan is not used in FMan IM mode, so no QMI enqueue or QMI dequeue are performed. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: davinci_emac: Invalidate only the received portion of a bufferkarl beldan2016-08-22-5/+5
| | | | | | | | | | ATM when receiving a packet the whole buffer is invalidated, this change optimizes this behaviour. Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
* net: davinci_emac: Round up top tx buffer boundaries for dcache opskarl beldan2016-08-22-1/+1
| | | | | | | | | | | | | | check_cache_range() warns that the top boundaries are not properly aligned when flushing or invalidating the buffers and make these operations fail. This gets rid of the remaining warnings: CACHE: Misaligned operation at range Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
* net: davinci_emac: Remove useless dcache ops on descriptorskarl beldan2016-08-22-28/+0
| | | | | | | | | | | | ATM the rx and tx descriptors are handled as cached memory while they lie in a dedicated RAM of the SoCs, which is an uncached area. Removing the said dcache ops, while optimizing the logic and clarifying the code, also gets rid of most of the check_cache_range() incurred warnings: CACHE: Misaligned operation at range Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2016-08-20-19/+21
|\ | | | | | | | | [trini: Drop CMD_BOOTI as it's now on by default on ARM64] Signed-off-by: Tom Rini <trini@konsulko.com>
| * arm: rmobile: Add BLANCHE board supportmasakazu.mochizuki.wd@hitachi.com2016-08-17-22/+20
| | | | | | | | | | | | | | | | | | | | BLANCHE is development board based on R-Car V2H SoC (R8A7792) This commit supports the following periherals: - SCIF, Ethernet, QSPI, MMC Signed-off-by: Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * mmc: rmobile: add a compiler barrierYannick Gicquel2016-08-17-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Building w/ GCC v5.2, the SD card access is broken due to invalid data in the response command reconstructed at the end of sh_sdhci_get_response(). Add a memory barrier between the two main steps of this function to ensure the resp[] table content is consistent before bits reordering. This fix has been tested Ok on Porter board rev1.0 using v2016.03 release. Signed-off-by: Yannick Gicquel <yannick.gicquel@iot.bzh>
| * serial: sh: Add support R8A7795Hiroyuki Yokoyama2016-08-17-1/+2
| | | | | | | | | | | | | | This can be used in the same way as other R-CAR serial setting. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: Rmobile: Rename CONFIG_RMOBILE to CONFIG_ARCH_RMOBILENobuhiro Iwamatsu2016-08-17-1/+1
| | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | pinctrl: fix typos in comment blocks of pinconfig_post_bind()Masahiro Yamada2016-08-20-2/+2
| | | | | | | | | | | | '-' is never used in function names. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | fastboot: implement KconfigSteve Rae2016-08-20-0/+5
| | | | | | | | | | | | implement Kconfig for the 'fastboot' feature set Signed-off-by: Steve Rae <steve.rae@raedomain.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-08-16-21/+334
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| * | i2c: intel_i2c: SMBus driver PCI addition (e.g. BayTrail)Stefan Roese2016-08-16-21/+269
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the SMBus block read/write functionality. Other protocols like the SMBus quick command need to get added if this is needed. This patch also removed the SMBus related defines from the Ivybridge pch.h header. As they are integrated in this driver and should be used from here. This change is added in this patch to avoid compile breakage to keep the source git bisectable. Tested on a congatec BayTrail board to configure the SMSC2513 USB hub. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Cc: George McCollister <george.mccollister@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | misc: Add simple driver for some Nuvoton NCT6102D devicesStefan Roese2016-08-16-0/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This simple driver provides some functions to control some of the integrated devices. The watchdog is enabled per default. This driver adds a function to disable the watchdog. Also the internal legacy UART (io address 0x3f8/0x2f8) is enabled per default. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org>
* | | mmc: mmc_legacy: fix the compiler error with disabled CONFIG_DM_MMC_OPSJaehoon Chung2016-08-16-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To prevent the compiler error, split the checking condition whether cfg->ops is NULL or not. It's more clearly, because it's not included in mmc_config structure when CONFIG_DM_MMC_OPS is disabled. drivers/mmc/mmc_legacy.c: In function ‘mmc_create’: drivers/mmc/mmc_legacy.c:118:31: error: ‘const struct mmc_config’ has no member named ‘ops’ drivers/mmc/mmc_legacy.c:118:58: error: ‘const struct mmc_config’ has no member named ‘ops’ make[1]: *** [drivers/mmc/mmc_legacy.o] Error 1 Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | mmc: send CMD0 before CMD1 for some MMC cardsYangbo Lu2016-08-16-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the MMC framework was added in u-boot, the mmc_go_idle was added before mmc_send_op_cond_iter in function mmc_send_op_cond annotating that some cards seemed to need this. Actually, we still need to do this in function mmc_complete_op_cond for those cards. This has been verified on Micron MTFC4GACAECN eMMC chip. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
* | | drivers: mmc: omap_hsmmc: fix build breakageSekhar Nori2016-08-16-0/+2
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | structure member 'cd_inverted' of omap_hsmmc_data is available only when OMAP_HSMMC_USE_GPIO is defined. When CONFIG_DM_MMC is defined, but not CONFIG_OMAP_GPIO, this will cause build breakage in omap_hsmmc driver of the sort: CC drivers/mmc/omap_hsmmc.o ../drivers/mmc/omap_hsmmc.c: In function 'omap_hsmmc_ofdata_to_platdata': ../drivers/mmc/omap_hsmmc.c:1763:6: error: 'struct omap_hsmmc_data' has no member named 'cd_inverted' priv->cd_inverted = fdtdec_get_bool(fdt, node, "cd-inverted"); ^ Fix this by accessing cd_inverted only when OMAP_HSMMC_USE_GPIO is defined. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | xtensa: add support for the 'xtfpga' evaluation boardChris Zankel2016-08-15-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'xtfpga' board is actually a set of FPGA evaluation boards that can be configured to run an Xtensa processor. - Avnet Xilinx LX60 - Avnet Xilinx LX110 - Avnet Xilinx LX200 - Xilinx ML605 - Xilinx KC705 These boards share the same components (open-ethernet, ns16550 serial, lcd display, flash, etc.). Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2016-08-15-74/+1794
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| * | mmc: atmel_sdhci: Convert to the driver model supportWenyou Yang2016-08-15-0/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the driver to the driver model while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | dm: atmel: Add driver model support for the ehci driverWenyou Yang2016-08-15-0/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver model support while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | pinctrl: at91-pio4: Add pinctrl driverWenyou Yang2016-08-15-0/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AT91 PIO4 controller is a combined gpio-controller, pin-mux and pin-config module. The peripheral's pins are assigned through per-pin based muxing logic. The pin configuration is performed on specific registers which are shared along with the gpio controller. So regard the pinctrl device as a child of atmel_pio4 device. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
| * | gpio: atmel_pio4: Rework to support DM & DTWenyou Yang2016-08-15-23/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rework the driver to support driver model and device tree, and support to regard the pio4 pinctrl device as a child of atmel_pio4 device. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | gpio: atmel_pio4: Move PIO4 definitions to head fileWenyou Yang2016-08-15-53/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | In order to make these PIO4 definitions shared with AT91 PIO4 pinctrl driver, move them from the existing gpio driver to the head file, and rephrase them. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | clk: at91: Add clock driverWenyou Yang2016-08-15-0/+776
| | | | | | | | | | | | | | | | | | | | | | | | The patch is referred to at91 clock driver of Linux, to make the clock node descriptions in DT aligned with the Linux's. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | tpm: atmel_twi: Make compatible with DM I2C bussesmario.six@gdsys.cc2016-08-15-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 302c5db ("dm: tpm: Add Driver Model support for tpm_atmel_twi driver") converted the Atmel TWI TPM driver itself to driver model, but kept the legacy-style i2c_write/i2c_read calls. Commit 3e7d940 ("dm: tpm: Every TPM drivers should depends on DM_TPM") then made DM_I2C a dependency of the driver, effectively forcing users to turn on CONFIG_DM_I2C_COMPAT to get it to work. This patch adds the necessary dm_i2c_write/dm_i2c_read calls to make the driver compatible with DM, but also keeps the legacy calls in ifdefs, so that the driver is now compatible with both DM and non-DM setups. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
| * | i2c: atmel: add i2c driverSongjun Wu2016-08-15-0/+426
| | | | | | | | | | | | | | | | | | | | | | | | Add i2c driver. Signed-off-by: Songjun Wu <songjun.wu@atmel.com> Reviewed-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2016-08-15-369/+980
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| * | | net: mii: Changes not made by spatchJoe Hershberger2016-08-15-50/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the functions passed to the registration function are not in the same C file (extern) then spatch will not handle the dependent changes. Make those changes manually. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> For the 4xx related files: Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | net: mii: Fix changes made by spatchJoe Hershberger2016-08-15-37/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the changes were a bit too complex. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | net: mii: Use spatch to update miiphy_registerJoe Hershberger2016-08-15-145/+381
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Run scripts/coccinelle/net/mdio_register.cocci on the U-Boot code base. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | net/ethoc: implement MDIO bus and support phylibMax Filippov2016-08-15-6/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement MDIO bus read/write functions, initialize the bus and scan for the PHY when phylib is enabled. Limit PHY speeds to 10/100 Mbps. Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net/ethoc: support private memory configurationsMax Filippov2016-08-15-5/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ethoc device can be configured to have a private memory region instead of having access to the main memory. In that case egress packets must be copied into that memory for transmission and pointers to that memory need to be passed to net_process_received_packet or returned from the recv callback. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net/ethoc: don't mix virtual and physical addressesMax Filippov2016-08-15-10/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Addresses used in buffer descriptors and passed in platform data or device tree are physical. Addresses used by CPU to access packet data and registers are virtual. Don't mix these addresses and use virt_to_phys for translation. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
generated by cgit v1.1 at 2024-11-07 12:58:35 +0000