summaryrefslogtreecommitdiff
path: root/drivers
Commit message (Collapse)AuthorAgeLines
* net: e1000: Fix build warnings for 32-bitBin Meng2015-08-26-4/+5
| | | | | | | | | | | | | | | | commit 6497e37 "net: e1000: Support 64-bit physical address" causes compiler warnings on 32-bit U-Boot build below. drivers/net/e1000.c: In function 'e1000_configure_tx': drivers/net/e1000.c:4982:2: warning: right shift count >= width of type [enabled by default] drivers/net/e1000.c: In function 'e1000_configure_rx': drivers/net/e1000.c:5126:2: warning: right shift count >= width of type [enabled by default] This commit fixes the build warnings. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* lcd: pxa: clean-up include file orderMarcel Ziswiler2015-08-24-5/+4
| | | | | | | Cleaning up order of include files by sorting them alphabetically keeping in mind to leave common.h on top. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
* usb: pxa27x_udc: clean-up include file orderMarcel Ziswiler2015-08-24-3/+2
| | | | | | | Cleaning up order of include files by sorting them alphabetically keeping in mind to leave common.h on top. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
* serial: pxa: clean-up include file orderMarcel Ziswiler2015-08-24-2/+2
| | | | | | | Cleaning up order of include files by sorting them alphabetically keeping in mind to leave common.h on top. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
* arm: pxa: mmc: clean-up include file orderMarcel Ziswiler2015-08-24-5/+3
| | | | | | | Cleaning up order of include files by sorting them alphabetically keeping in mind to leave common.h on top. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
* Merge git://git.denx.de/u-boot-socfpgaTom Rini2015-08-23-2/+177
|\ | | | | | | | | | | | | | | | | | | | | Conflicts: configs/socfpga_arria5_defconfig configs/socfpga_cyclone5_defconfig configs/socfpga_socrates_defconfig Merged these by hand and re-ran savedefconfig on them. Signed-off-by: Tom Rini <trini@konsulko.com>
| * gpio: Add DW APB GPIO driverMarek Vasut2015-08-23-0/+175
| | | | | | | | | | | | | | | | Add driver for the DesignWare APB GPIO IP block. This driver is DM capable and probes from DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
| * ddr: altera: Repair uninited variableMarek Vasut2015-08-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following problem: drivers/ddr/altera/sequencer.c: In function 'sdram_calibration_full': drivers/ddr/altera/sequencer.c:1943:25: warning: 'found_failing_read' may be used uninitialized in this function [-Wmaybe-uninitialized] if (found_passing_read && found_failing_read) ^ drivers/ddr/altera/sequencer.c:1803:26: note: 'found_failing_read' was declared here u32 found_passing_read, found_failing_read, initial_failing_dtap; ^ Signed-off-by: Marek Vasut <marex@denx.de>
| * ddr: altera: Replace float multiplication with integer oneMarek Vasut2015-08-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This gem is really really rare, there was an actual float used in the Altera DDR init code, which pulled in floating point ops from the libgcc, just wow. Since we don't support floating point operations the same way Linux does not support them, replace this with an integer multiplication and division combo. This removes some 2kiB of size from the SPL as the floating point ops are no longer pulled in from libgcc. This was detected by enabling CONFIG_USE_PRIVATE_LIBGCC=y , which does not contain the floating point bits. Signed-off-by: Marek Vasut <marex@denx.de>
* | net: e1000: Add Kconfig optionsSimon Glass2015-08-21-7/+32
| | | | | | | | | | | | | | Add Kconfig options in preparation for moving boards to use Kconfig. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: e1000: Convert to driver modelSimon Glass2015-08-21-0/+142
| | | | | | | | | | | | | | | | | | Update this driver to support driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Apalis T30 2GB on Apalis Evaluation Board
* | net: e1000: Prepare for driver model conversionSimon Glass2015-08-21-200/+245
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since struct eth_device does not exist with CONFIG_DM_ETH defined, avoid using it in the driver unless necessary. Most of the time it is better to pass the private driver pointer anyway. Also refactor the code so that code that the driver model implementation will share are available in functions that can be called. Add stubs where necessary. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Apalis T30 2GB on Apalis Evaluation Board
* | net: e1000: Move #include of common.h to the C filesSimon Glass2015-08-21-1/+2
| | | | | | | | | | | | | | | | | | | | | | We cannot currently include any header files in the C files since common.h needs to be included first, and it is in the header file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Apalis T30 2GB on Apalis Evaluation Board
* | net: e1000: Support 64-bit physical addressMingkai Hu2015-08-21-4/+4
|/ | | | | | | | | High 32-bit address is needed when u-boot runs in 64-bit space. Tested on armv8-based LS2085ARDB. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* usb: dwc2: Rename to dwc2_usbMarek Vasut2015-08-19-1/+1
| | | | | | | This driver is not used only on exynos, but also on Altera SoCFPGA, HiSilicon SoCs, RPi etc, so rename it accordingly to prevent confusion. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: dwc2: Add original Synopsys compat stringMarek Vasut2015-08-19-0/+1
| | | | | | Add the Synopsys compatible string. This is used in SoCFPGA DT files. Signed-off-by: Marek Vasut <marex@denx.de>
* usb: gadget: ether: populate _reset_ callbackKishon Vijay Abraham I2015-08-19-0/+1
| | | | | | | | | | | populate _reset_ callback to the USB ethernet gadget since UDC core expects every gadget driver to have the reset callback. This shouldn't be needed once the ethernet gadget driver is adapted to use the composite driver. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: host: xhci-omap: invoke board_usb_cleanup in xhci_hcd_stopKishon Vijay Abraham I2015-08-19-0/+1
| | | | | | | | | | | | xhci omap driver has board_usb_init in xhci_hcd_init but doesn't have the corresponding cleanup function in xhci_hcd_stop. Fix it here by invoking board_usb_cleanup() in xhci_hcd_stop(). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: gadget: ether: Perform board initialization from ethernet gadget driverKishon Vijay Abraham I2015-08-19-0/+4
| | | | | | | | | | | Ethernet gadget driver can be used both by both SPL and u-boot. Since usb_eth_init() is the entry point for ethernet gadget driver, perform board initialization there. Also perform the cleanup in usb_eth_halt. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: xhci: Fix a potential NULL pointer dereferenceSergey Temerkhanov2015-08-19-5/+14
| | | | | | | | | This patch fixes a potential NULL pointer dereference arising on non-present/non-initialized xHCI controllers and adds some error handling to xHCI code Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
* usb: spear: Add support for both SPEAr600 EHCI controllersStefan Roese2015-08-19-3/+35
| | | | | | | | | | | USB EHCI on SPEAr600 has not been tested for a while. The base controller addresses are missing. This patch adds the defines to the header. And adds the missing code. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Vipin Kumar <vk.vipin@gmail.com> Cc: Marek Vasut <marex@denx.de>
* imx: usb: ehci-mx6: wait_for_bit to check reg statusAdrian Alonso2015-08-19-4/+33
| | | | | | | Add wait_for_bit to check reg bit status and replace unbounded loops to check usb command status Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* imx: usb: ehci-mx6: add usb support for imx7d socAdrian Alonso2015-08-19-19/+82
| | | | | | Extend ehci-mx6 usb driver to support imx7d usb Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* imx: usb: ehci-mx6: document board specific functionsAdrian Alonso2015-08-19-0/+31
| | | | | | | | | | Document target board specific functions board_ehci_hcd_init - override usb phy mode board_ehci_hcd_init - set usb vbus voltage board_ehci_power - enables/disables usb vbus voltage Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* imx: usb: ehci-mx6: reg accessor cleanupsAdrian Alonso2015-08-19-33/+18
| | | | | | Cleanup read/write register access, use clr/set bits_le32 Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* of: clean up OF_CONTROL ifdef conditionalsMasahiro Yamada2015-08-18-47/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* dm: drop CONFIG_DM_DEVICE_REMOVE from uncmd listMasahiro Yamada2015-08-18-6/+6
| | | | | | | | | | | | | | | We do not want to compile the DM remove code for SPL. Currently, we undef it in include/config_uncmd_spl.h (for C files) and in scripts/Makefile.uncmd_spl (for Makefiles). This is really ugly. This commit demonstrates how we can deprecate those two files. Use $(SPL_) for the entry in the Makfile and CONFIG_IS_ENABLED() in C files. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* led: unify obj-$(CONFIG_LED) and obj-$(CONFIG_SPL_LED) entriesMasahiro Yamada2015-08-18-2/+1
| | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* led: rename CONFIG_SPL_LED_SUPPORT to CONFIG_SPL_LEDMasahiro Yamada2015-08-18-2/+2
| | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ram: unify obj-$(CONFIG_RAM) and obj-$(CONFIG_SPL_RAM) entriesMasahiro Yamada2015-08-18-2/+1
| | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ram: rename CONFIG_SPL_RAM_SUPPORT to CONFIG_SPL_RAMMasahiro Yamada2015-08-18-2/+2
| | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* clk: unify obj-$(CONFIG_CLK) and obj-$(CONFIG_SPL_CLK) entriesMasahiro Yamada2015-08-18-2/+1
| | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* clk: rename CONFIG_SPL_CLK_SUPPORT to CONFIG_SPL_CLKMasahiro Yamada2015-08-18-2/+2
| | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: unify obj-$(CONFIG_DM) and obj-$(CONFIG_SPL_DM) entriesMasahiro Yamada2015-08-18-2/+2
| | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* spl: move SPL driver entries to driver/MakefileMasahiro Yamada2015-08-18-0/+37
| | | | | | | | | | | | | Just preparing for upcoming cleaning. The board-specific linker script board/vpac270/u-boot-spl.lds has been touched to avoid build error. It does not change the size of spl/u-boot-spl.bin for this board, so it should be OK. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* i2c: lpc32xx: correct sanity check for requested bus speedVladimir Zapolskiy2015-08-18-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | LPC32xx has 3 I2C bus controllers, 2 of them are used as generic ones and their parent clock is HCLK and CLK_HI/CLK_LO registers are 10 bit wide. This means that if HCLK is 104MHz, then minimal configurable I2C clock speed is about 51KHz. Only USB OTG I2C bus controller CLK registers are 8 bit wide, thus in assumption that peripheral clock is 13MHz it allows to set the minimal bus speed about 25.5KHz. Check for negative half clock value is removed since it is always false. The change fixes the following problem for I2C busses 0 and 1: => i2c dev 0 Setting bus to 0 => i2c speed 100000 Setting bus speed to 100000 Hz Failure changing bus speed (-22) Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
* usb: lpc32xx: add host USB driverSylvain Lemieux2015-08-18-0/+232
| | | | | | | | | | | | | Incorporate USB driver from legacy LPCLinux NXP BSP. The files taken from the legacy patch are: - lpc32xx USB driver - lpc3250 header file USB registers definition. The legacy driver was updated and clean-up as part of the integration with the latest u-boot. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Vladimir Zapolskiy <vz@mleia.com>
* i2c: lpc32xx: add support for OTG I2CSylvain Lemieux2015-08-18-3/+17
| | | | | | | | Updated the LPC32xx I2C driver to support the OTG I2C that is part of the USB module. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Acked-by: Marek Vasut <marex@denx.de>
* nand: lpc32xx: add ECC layout for small page NANDSylvain Lemieux2015-08-18-1/+17
| | | | | | | | | | Incorporate ECC layout for small page NAND from legacy LPCLinux NXP BSP. The code taken from the legacy patch is: - lpc32xx SLC NAND driver (ECC layout for small page) This layout is matching the lpc32xx NAND SLC Linux Kernel driver. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
* nand: lpc32xx: add hardware ECC supportSylvain Lemieux2015-08-18-4/+409
| | | | | | | | | | | | Incorporate NAND SLC hardware ECC support from legacy LPCLinux NXP BSP. The code taken from the legacy patch is: - lpc32xx SLC NAND driver (hardware ECC support) - lpc3250 header file missing SLC NAND registers definition The legacy driver was updated and clean-up as part of the integration with the existing NAND SLC driver. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Tested-by: Vladimir Zapolskiy <vz@mleia.com>
* dma: lpc32xx: add DMA driverSylvain Lemieux2015-08-18-0/+148
| | | | | | | | | | | | | Incorporate DMA driver from legacy LPCLinux NXP BSP. The files taken from the legacy patch are: - lpc32xx DMA driver - lpc3250 header file DMA registers definition. The legacy driver was updated and clean-up as part of the integration with the latest u-boot. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Vladimir Zapolskiy <vz@mleia.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-08-18-2/+130
|\
| * spi: ti_qspi: Use DMA to read from qspi flashVignesh R2015-08-17-0/+25
| | | | | | | | | | | | | | | | ti_qspi uses memory map mode for faster read. Enabling DMA will increase read speed by 3x @48MHz on DRA74 EVM. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * dma: ti-edma3: Add helper function to support edma3 transferVignesh R2015-08-17-0/+78
| | | | | | | | | | Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * sf: ops: Add spi_flash_copy_mmap functionTom Rini2015-08-17-1/+7
| | | | | | | | | | | | | | | | | | | | When doing a memory mapped copy we may have DMA available and thus need to have this copy abstracted so that the driver can do it, rather than a simple memcpy. Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * ti: qspi: set flash quad bit based on quad support flagvishalm@ti.com2015-08-17-1/+1
| | | | | | | | | | | | | | | | Update op_mode_rx flag based on CONFIG_QSPI_QUAD_SUPPORT flag, instead of platform. Signed-off-by: Vishal Mahaveer <vishalm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * sf: Make 4K sector support configurableMarek Vasut2015-08-17-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the support for 4K subpage I/O on a SPI NOR flash configurable. A board which requires the SPI NOR to be accessed in larger 32KiB or 64KiB pages can disable the 4K subpage support, but by default, the support for 4K subpage I/O is enabled. The functionality of this option is the same as CONFIG_MTD_SPI_NOR_USE_4K_SECTORS in Linux. This is extremely useful in case one uses UBI on a SPI NOR flash. UBI needs at least 15k EBs and can not work on a flash which uses 4k ones, so disabling the support for 4k subpages lets UBI work on such flash. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini2015-08-18-1/+1
|\ \
| * | ARM: exynos: move SoC sources to mach-exynosThomas Abraham2015-08-17-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | Move arch/arm/cpu/armv7/exynos/* to arch/arm/mach-exynos/* to allow reuse of existing code for ARMv8 based Exynos platforms. Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | pci: mvebu: Add PCIe driverAnton Schubert2015-08-17-0/+424
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a PCI driver for the controllers found on Marvell MVEBU SoCs. Besides the driver, this patch also removes the statically defined PCI MBUS windows. As they are not needed anymore, since this PCIe driver now creates the windows dynamically. Tested on Armada XP db-mv784mp-gp eval board using an Intel E1000 PCIe card in all 3 PCIe slots. And on the Armada 38x db-88f6820-gp eval board using this Intel E1000 PCIe card in the PCIe 0 slot. This port was done in cooperation with Anton Schubert. Signed-off-by: Anton Schubert <anton.schubert@gmx.de> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <eibach@gdsys.de>
generated by cgit v1.1 at 2024-12-03 09:36:49 +0000