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* fsl_elbc_nand: redirect the pointer of bbt pattern to RAMMingkai Hu2009-07-07-0/+4
| | | | | | | | | | | The bbt descriptors contains the pointer to the bbt pattern which are statically initialized memory struct. When relocated to RAM, these pointers will continue point to NOR flash(or L2 SRAM, or other boot device). If the contents of NOR flash changed or L2 SRAM disabled, it'll hang the system. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Bug-fix in drivers mtd nand Makefilekevin.morfitt@fearnside-systems.co.uk2009-07-07-1/+1
| | | | | | | | The S3C2410 NAND driver source file is included in the makefile instead of the object file. Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Scott Wood <scottwood@freescale.com>
* mtd: nand: use loff_t for offsetJean-Christophe PLAGNIOL-VILLARD2009-07-07-10/+10
| | | | | | | | nand_util currently uses size_t which is arch dependent and not always a unsigned long. Now use loff_t, as does the linux mtd layer. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* mtd: nand: new base driver for memory mapped nand devicesMike Frysinger2009-07-07-0/+54
| | | | | | | | | The BF537-STAMP Blackfin board had a driver for working with NAND devices that are simply memory mapped. Since there is nothing Blackfin specific about this, generalize the driver a bit so that everyone can leverage it. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
* davinci_nand chipselect/init cleanupDavid Brownell2009-07-07-20/+8
| | | | | | | | | | | | | | | | | Update chipselect handling in davinci_nand.c so that it can handle 2 GByte chips the same way Linux does: as one device, even though it has two halves with independent chip selects. For such chips the "nand info" command reports: Device 0: 2x nand0, sector size 128 KiB Switch to use the default chipselect function unless the board really needs its own. The logic for the Sonata board moves out of the driver into board-specific code. (Which doesn't affect current build breakage if its NAND support is enabled...) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
* davinci_nand: cleanup II (CONFIG_SYS_DAVINCI_BROKEN_ECC)David Brownell2009-07-07-205/+13
| | | | | | | | | | | | | | | | | | | | | | Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option. It's not just nasty; it's also unused by any current boards, and doesn't even match the main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC on newer chips that support it). DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30, match non-BROKEN code paths for 1-bit HW ECC. The BROKEN code paths do seem to partially match what MontaVista/TI kernels (4.0/2.6.10, and 5.0/2.6.18) do ... but only for small pages. Large page support is really broken (and it's unclear just what software it was trying to match!), and the ECC layout was making three more bytes available for use by filesystem (or whatever) code. Since this option itself seems broken, remove it. Add a comment about the MV/TI compat issue, and the most straightforward way to address it (should someone really need to solve it). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
* davinci_nand: cleanup I (minor)David Brownell2009-07-07-33/+22
| | | | | | | | | | | | | | | | | | | | | | | | Minor cleanup for DaVinci NAND code: - Use I/O addresses from nand_chip; CONFIG_SYS_NAND_BASE won't be defined when there are multiple chipselect lines in use (as with common 2 GByte chips). - Cleanup handling of EMIF control registers * Only need one pointer pointing to them * Remove incorrect and unused struct supersetting them - Use the standard waitfunc; we don't need a custom version - Partial legacy cleanup: * Don't initialize every board like it's a DM6446 EVM * #ifdef a bit more code for BROKEN_ECC Sanity checked with small page NAND on dm355 and dm6446 EVMs; and large page on dm355 EVM (packaged as two devices, not one). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-videoWolfgang Denk2009-07-07-2/+5
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| * Atmel LCD driver GUARDTIME fixMark Jackson2009-06-30-2/+5
| | | | | | | | | | | | | | | | | | | | This patch allows the guard time parameter to be set in the Atmel LCDC driver. By default, the previous value of 1 is used, unless the setting is defined elsewhere. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
* | Coding style cleanup; update CHANGELOGWolfgang Denk2009-07-07-2/+0
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-07-07-10/+215
|\ \ | | | | | | | | | | | | | | | | | | Conflicts: drivers/spi/Makefile Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | net: merge bugfix: Marvell Kirkwood gigabit ethernet driverPrafulla Wadaskar2009-07-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This patch looks okay on u-boot-net.git/next branch but when it was merged to u-boot.git/master the last line is missing Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Ben Warren <biggerbadderben@gmail.com>
| * | ARM DaVinci: EMIF settingsThomas Lange2009-07-06-9/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NAND module should not modify EMIF registers unrelated to CS2 that is used for NAND, i.e. do not modify EWAIT config register or registers for other Chip Selects. Without this patch, EMIF configurations made in board_init() will be invalidated. Signed-off-by: Thomas Lange <thomas@corelatus.se>
| * | arm: Kirkwood: Basic SOCs supportPrafulla Wadaskar2009-07-06-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kirkwood family controllers are highly integrated SOCs based on Feroceon-88FR131/Sheeva-88SV131/arm926ejs cpu core. SOC versions supported:- 1) 88F6281-A0 define CONFIG_KW88F6281_A0 2) 88F6192-A0 define CONFIG_KW88F6192_A0 Other supported features:- 1) get_random_hex() fucntion 2) PCI Express port initialization 3) NS16550 driver support Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed-by: Ronen Shitrit <rshitrit@marvell.com> Acked-by: Stefan Rose <sr@denx.de> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * | spi: Add Marvell Kirkwood SPI driverPrafulla Wadaskar2009-06-26-0/+186
| | | | | | | | | | | | | | | | | | This patch adds a SPI driver for the Marvell Kirkwood SoC's. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * | serial_mx31: allow it to work with mx27 too and rename to serial_mxcIlya Yanok2009-06-21-1/+22
| |/ | | | | | | | | | | | | UART hardware on i.MX27 is the same as on the i.MX31 so we just need to provide the driver with correct address of the registers. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxxWolfgang Denk2009-07-07-0/+110
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| * | mpc52xx: Add SPI driver.Grzegorz Bernacki2009-06-14-0/+110
| | | | | | | | | | | | Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-ubiWolfgang Denk2009-07-07-1/+1
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| * | | UBI: Fix build problem noticed on Apollon (arm/testing repo)Stefan Roese2009-07-07-1/+1
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | This patch fixes a build problem noticed on Apollon by using mtd_dev_by_eb() instead of "/" as done in the Linux UBI version. So this brings the U-Boot UBI version more in sync with the Linux version again. Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge branch 'sf' of git://git.denx.de/u-boot-blackfinWolfgang Denk2009-07-07-16/+57
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| * | | sf: Macronix additional chips supportedPrafulla Wadaskar2009-07-06-12/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | new chips supported:- MX25L1605D, MX25L3205D, MX25L6405D, MX25L12855E out of which MX25L6405D and MX25L12855E tested on Kirkwood platforms Modified the Macronix flash support to use 2 bytes of device id instead of 1 This was required to support MX25L12855E Signed-off-by: Piyush Shah <spiyush@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | sf: sst: add sst25vf###b idsMike Frysinger2009-07-06-0/+16
| | | | | | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | sf: sst: fix sector sizeMike Frysinger2009-07-06-4/+4
| |/ / | | | | | | | | | | | | | | | | | | | | | Looks like when I was encoding the sector sizes, I forgot to divide by 8 (due to the stupid marketing driven process that declares all sizes in useless megabits and not megabytes). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2009-07-07-0/+179
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| * | | 83xx: Add support for fsl_dma driverPeter Tyser2009-07-02-15/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Reviewed-by: Ira W. Snyder <iws@ovro.caltech.edu> Tested-by: Ira W. Snyder <iws@ovro.caltech.edu> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | fsl_dma: Make DMA transactions snoopablePeter Tyser2009-07-01-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make DMA transactions snoopable so that CPUs can keep caches up-to-date. This allows dma transactions to be used for operations such as memory copies without any additional cache control operations. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | fsl_dma: Break out common memory initialization functionPeter Tyser2009-07-01-0/+32
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | 8xxx: Rename dma_xfer() to dmacpy()Peter Tyser2009-07-01-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also update dmacpy()'s argument order to match memcpy's and use phys_addr_t/phy_size_t for address/size arguments Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | fsl_dma: Fix Channel Start bug in dma_check()Peter Tyser2009-07-01-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Channel Start (CS) bit in the Mode Register (MR) should actually be cleared as the comment in the code suggests. Previously, CS was being set, not cleared. Assuming normal operation of the DMA engine, this change shouldn't have any real affect. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | fsl_dma: Add support for arbitrarily large transfersPeter Tyser2009-07-01-12/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support DMA transfers larger than the DMA controller's limit of (2 ^ 26 - 1) bytes Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | fsl_dma: Use proper I/O access functionsPeter Tyser2009-07-01-14/+18
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | fsl_dma: Add bitfield definitions for common registersPeter Tyser2009-07-01-6/+6
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | 8xxx: Break out DMA code to a common filePeter Tyser2009-07-01-0/+93
| |/ / | | | | | | | | | | | | | | | | | | | | | DMA support is now enabled via the CONFIG_FSL_DMA define instead of the previous CONFIG_DDR_ECC Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | Blackfin: TWI/I2C: fix pure writesPeter Meerwald2009-06-30-2/+2
|/ / | | | | | | | | | | | | | | | | | | | | If doing a pure write with register address and data (not a read/write combo transfer), we don't set the initial transfer length properly which ends up causing only the register address to be transferred. While we're here, fix the i2c_write() parameter description of the buffer. Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Convert DM9000 driver for CONFIG_NET_MULTIRemy Bohmer2009-06-15-17/+27
| | | | | | | | | | | | | | | | | | All drivers need to be converted to CONFIG_NET_MULTI. This patch converts the dm9000 driver. Signed-off-by: Thomas Smits <ts.smits@gmail.com> Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | net: Add Marvell Kirkwood gigabit ethernet driverPrafulla Wadaskar2009-06-15-0/+1168
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a egiga driver for the Marvell Kirkwood SoC's. Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed-by: Ronen Shitrit <rshitrit@marvell.com> Acked-by: Stefan Rose <sr@denx.de> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Subject: [PATCH] [repost] Standardize the use of MCFFEC_TOUT_LOOP as a ↵Richard Retanubun2009-06-15-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | udelay(1) loop counter. From 584b5fbd4abfc43f920cc1c329633e03816e28be Mon Sep 17 00:00:00 2001 From: Richard Retanubun <RichardRetanubun@RuggedCom.com> Date: Wed, 20 May 2009 18:26:01 -0400 Subject: [PATCH] Standardize the use of MCFFEC_TOUT_LOOP as a udelay(1) loop counter. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Remove support for non-CONFIG_NET_MULTI on PPC4xx EMACBen Warren2009-06-15-54/+0
| | | | | | | | Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Switched davinci_emac Ethernet driver to use newer APIBen Warren2009-06-15-46/+24
| | | | | | | | | | | | | | | | Added CONFIG_NET_MULTI to all Davinci boards Removed all calls to Davinci network driver from board code Added cpu_eth_init() to cpu/arm926ejs/cpu.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Initial cleanup of Davinci Ethernet driverBen Warren2009-06-15-77/+69
| | | | | | | | | | | | | | Removed pointless #ifdefs Moved functions around in file in preparation for switch to newer API Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Moved Davinci Ethernet driver to drivers/netBen Warren2009-06-15-0/+656
| | | | | | | | | | | | This driver has been renamed davinci_emac.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Marvell MV88E61XX Switch Driver supportPrafulla Wadaskar2009-06-15-0/+476
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Chips supported:- 1. 88E6161 6 port gbe swtich with 5 integrated PHYs 2. 88E6165 6 port gbe swtich with 5 integrated PHYs 2. 88E6132 3 port gbe swtich with 2 integrated PHYs Platform specific configuration supported for:- default or router port vlan configuration led_init configuration mdip/n polarity reversal configuration Note: This driver is supported and tested against kirkwood egiga interface Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | tsec: Add support for BCM5482S PHYZach LeRoy2009-06-15-0/+41
|/ | | | | | Signed-off-by: Zach LeRoy <zleroy@xes-inc.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Merge branch 'next' of ../masterWolfgang Denk2009-06-14-978/+3227
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| * drivers/qe: add sgmii support in for UEC driverHaiying Wang2009-06-12-2/+46
| | | | | | | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * qe: Pass in uec_info struct through uec_initializeHaiying Wang2009-06-12-188/+58
| | | | | | | | | | | | | | | | | | | | | | The uec driver contains code to hard code configuration information for the uec ethernet controllers. This patch creates an array of uec_info structures, which are then parsed by the corresponding driver instance to determine configuration. It also creates function uec_standard_init() to initialize all UEC interfaces for 83xx and 85xx. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * drivers/qe: Add more SNUM number for QEHaiying Wang2009-06-12-4/+12
| | | | | | | | | | | | | | | | | | Some QE chips like 8569 need more SNUM numbers for supporting 4 UECs in RGMII- 1000 mode. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * drivers/qe: Change QE RISC ALLOCATION to support 4 RISCsHaiying Wang2009-06-12-12/+44
| | | | | | | | | | | | | | | | | | Also define the QE_RISC_ALLOCATION_RISCs to MACROs instead of using enum, and define MAX_QE_RISC for QE based silicons. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * drivers/qe: Rename the camel-case identifiers in uecHaiying Wang2009-06-12-18/+18
| | | | | | | | | | | | Rename riscRx/riscTx to risc_rx/risc_tx to comply with Codingstyle. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
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