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* dm: core: Provide uclass_find_device_by_phandle() only when neededSimon Glass2016-01-20-0/+4
| | | | | | | This function cannot be used unless support is enabled for device tree control. Adjust the code to reflect that. Signed-off-by: Simon Glass <sjg@chromium.org>
* spi: ti_qspi: Use 4-byte opcode for mmap readVignesh R2016-01-20-3/+3
| | | | | | | | | | | | ti-qspi driver currently uses 3-byte addressing mode(and opcodes) for memory-mapped read. This restricts maximum addressable flash size to 16MB. Enable the 4-byte addressing(and use 4-byte opcode) for memory-mapped read to allow access to addresses above 16MB. Signed-off-by: Ravi Babu <ravibabu@ti.com> [vigneshr@ti.com: Re-word commit description] Signed-off-by: Vignesh R <vigneshr@ti.com>
* arm: serial: Add Kconfig entries to facilitate usage of the pl01x driver for ↵Sergey Temerkhanov2016-01-19-0/+22
| | | | | | | | | | | | early debug output This patch adds Kconfig entries to facilitate usage of pl01x as a debug UART. Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Acked-by: Simon Glass <sjg@chromium.org>
* arm: serial: Add debug UART capability to the pl01x driverSergey Temerkhanov2016-01-19-0/+28
| | | | | | | | | | | This patch adds an ability to use pl01x as a debug UART. It must be configured like other types of debug UARTs Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> [trini: Update for _debug_uart_init change] Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2016-01-19-26/+26
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| * video: Typo cleanup in drivers/video/da8xx-fb.cRobert P. J. Day2015-12-16-5/+5
| | | | | | | | Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
| * video: Clean up formatting, spelling mistakes in exynos_dp*Robert P. J. Day2015-12-16-21/+21
| | | | | | | | | | | | Aesthetic cleanup in drivers/video/exynos_dp*.[ch] files. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* | power: regulator: max77686: Don't use switch() on boolsTom Rini2016-01-19-20/+8
| | | | | | | | | | | | | | | | | | | | | | With gcc-5.3 we get a warning for using switch() on a bool type. Rewrite these sections as if/else and update the one section that was using 1/0 instead of true/false. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
* | spi: rk_spi: Fix debug format warningTom Rini2016-01-19-1/+1
| | | | | | | | | | | | | | We need to use %lx not %x to describe a fdt_addr_t Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* | pci_rom.c: Fix may be used uninitialized warningTom Rini2016-01-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With gcc-5.x we get: drivers/pci/pci_rom.c: In function 'dm_pci_run_vga_bios': drivers/pci/pci_rom.c:352:3: warning: 'ram' may be used uninitialized in this function [-Wmaybe-uninitialized] While unconvinced that this can happen in practice (if we malloc we set alloced to true, it will be false otherwise), silence the compiler. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Add more SPDX-License-Identifier tagsTom Rini2016-01-19-561/+47
| | | | | | | | | | | | | | | | | | In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert all of these to the correct SPDX-License-Identifier tag. Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-01-16-7/+21
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| * | net: pcnet: refactor mapping of virtual addresses to physical onesDaniel Schwierzeck2016-01-16-7/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pci_virt_to_mem() uses virt_to_phys() to get the physical address. But pci_virt_to_mem() is also called with uncached addresses which is wrong according to the documentation of virt_to_phys(). Refactor the PCI_TO_MEM() macro to optionally map an uncached address back to a cached one before calling pci_virt_to_mem(). Currently pcnet works because virt_to_phys() is incorrectly implemented on MIPS. With the upcoming asm header file update for MIPS, the virt_to_phys() implementation will be fixed. Thus this patch is needed to keep pcnet working on MIPS Malta board. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2016-01-16-1/+2
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| * | | arm: socfpga: set the fpga global bit to disable HPS to FPGA signalsDinh Nguyen2016-01-16-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We should be setting the FPGA Interface Group global bit that will correctly disable all interfaces between the FPGA and HPS. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | | ddr: altera: Init the rule ID in debug codeMarek Vasut2016-01-16-0/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | Init the rule ID, otherwise the debug code will always dump the protection settings entry 0. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com>
* | | usb: host: ehci-vf: Implement board_usb_phy_mode weak functionSanchayan Maity2016-01-16-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add board_usb_phy_mode weak function on similar lines to ehci-mx6. However since Vybrid USB does not have a true OTG, make this weak functon just return 0. The function is supposed to be implemented by the individual boards using a GPIO for providing the OTG pin functionality. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
* | | usb: host: ehci-vf: Remove hardcoded USB host client configurationSanchayan Maity2016-01-16-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | The current ehci-vf USB driver for Vybrid hardcodes the USB host and client functionality. Remove this. Reported-by: Santhosh Kumar Janardhanam <santhosh.kj@hcl.com> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
* | | usb:ci_udc: Remove ULPI setting for i.MX OTG controllerYe.Li2016-01-16-11/+3
|/ / | | | | | | | | | | | | | | | | All the i.MX6, i.MX23 and i.MX28 OTG controllers only support UTMI interface. Set to ULPI is not correct, even the controller will reject this setting in PORTSC register. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | Merge git://git.denx.de/u-boot-rockchipTom Rini2016-01-15-1/+9
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| * | dm: spi_flash: Allow the uclass to work without printf()Simon Glass2016-01-15-1/+7
| | | | | | | | | | | | | | | | | | | | | For SPL we don't really need sprintf() and with tiny-printf this is not available. Allow this to be dropped in SPL when using tiny-printf. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | mmc: rockchip: the non-removable property must point to emmchuang lin2016-01-15-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | the non-removable property point to sdcard before, it is wrong, it must point to emmc, correct it. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | | dm: pci: Avoid a memory leak when allocating the ROMSimon Glass2016-01-15-12/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adjust pci_rom_load() to return an indication of whether it allocated memory or not. Adjust the caller to free it. This fixes a memory leak when PCI_VGA_RAM_IMAGE_START is not used. Reported-by: Coverity (CID: 134194) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | dm: pci: Add a 'fall through' commentSimon Glass2016-01-15-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | For this class it is intended to set up the PCI device, so add a comment to indicate this. This avoids a coverity warning. Reported-by: Coverity (CID: 134194) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | Fix GCC format-security errors and convert sprintfs.Ben Whitten2016-01-14-30/+30
|/ / | | | | | | | | | | | | | | | | | | | | With format-security errors turned on, GCC picks up the use of sprintf with a format parameter not being a string literal. Simple uses of sprintf are also converted to use strcpy. Signed-off-by: Ben Whitten <ben.whitten@gmail.com> Acked-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-01-14-188/+1384
|\ \ | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig Signed-off-by: Tom Rini <trini@konsulko.com>
| * | mvebu: axp: Rename MV_DDR_32BIT to CONFIG_DDR_32BITPhil Sutter2016-01-14-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | This should make it clear that this symbol is meant to be defined by board headers. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | drivers/pci/pci_mvebu: Fix for boards with X4 lanesPhil Sutter2016-01-14-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Armada XP has support for X4 lanes, boards specify this in their serdes_cfg. During PEX init in high_speed_env_lib.c, the configuration is stored in GEN_PURP_RES_2_REG. When enumerating PEX, subsequent interfaces of an X4 lane must be skipped. Otherwise the enumeration hangs up the board. The way this is implemented here is not exactly beautiful, but it mimics how Marvell's BSP does it. Alternatively we could get the information using board_serdes_cfg_get(), but that won't lead to clean code, either. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | axp: Fix debugging support in DDR3 write levelingPhil Sutter2016-01-14-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If MV_DEBUG_WL is defined, DEBUG_WL_S and DEBUG_WL_D macros are missing. In addition to that, get rid of debug output printing non-existent counter variable. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | drivers/pci: Fix for debug builds without CONFIG_PCI_ENUM_ONLYPhil Sutter2016-01-14-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The debug printing references bar_res, which exists only if CONFIG_PCI_ENUM_ONLY is not defined. Therefore move it into the ifdef'd area. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | arm: mvebu: Move SoC selection (A38X vs AXP) into KconfigStefan Roese2016-01-14-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until now, the SoC selection for the ARCH_MVEBU platforms has been done in the config header. Using CONFIG_ARMADA_XP in a non-clear way. As it needed to get selected for AXP and A38x based boards. This patch now changes this to move the SoC selection to Kconfig. And also uses CONFIG_ARCH_MVEBU as a common define for both AXP and A38x. This makes things a bit clearer - especially for new board additions. Additionally the defines CONFIG_SYS_MVEBU_DDR_AXP and CONFIG_SYS_MVEBU_DDR_A38X are replaced with the already available CONFIG_ARMADA_38X and CONFIG_ARMADA_XP. And CONFIG_DDR3 is removed, as its not referenced anywhere. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
| * | arm: mvebu: Make ECC support configurable on Armada XPStefan Roese2016-01-14-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, ECC support is enabled for all Armada XP boards. So the DDR3 driver tries to configure the controller with ECC support, even on boards without ECC. This patch makes this ECC optional which now can be configured on a board-per-board basis. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Phil Sutter <phil@nwl.cc>
| * | sata: Add SATA driver with DMA support for Marvell Kirkwood and Armada XPTor Krill2016-01-14-0/+1046
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a new SATA driver for the Marvell Kirkwood and Armada 370 / XP SoC's. This driver supports the SATA controller of some Mavell SoC's. Here a (most likely incomplete) list of the supported SoC's: - Kirkwood - Armada 370 - Armada XP This driver implementation is an alternative to the already available driver via the "ide" commands interface (drivers/block/mvsata_ide.c). But this driver only supports PIO mode and as this new driver also supports transfer via DMA, its much faster. Please note, that the newer SoC's (e.g. Armada 38x) are not supported by this driver. As they have an AHCI compatible SATA controller integrated. The original version of this driver was sent by Tor Krill to the U-Boot list a few years ago. Here the link: http://lists.denx.de/pipermail/u-boot/2010-June/073147.html Changes by Stefan: - Coding-style cleanup - Support for Armada XP added - MBUS window setup added - D-cache flush and invalidation added - works with dcache enabled on Armada XP - Removed mdelay() from ata_wait_register() and add timer based timeout detection to speed up the transfer Signed-off-by: Tor Krill <tor@excito.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Tom Rini <trini@konsulko.com>
| * | net: mvneta: Convert to driver modelStefan Roese2016-01-14-98/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update this driver to support driver model. As all MVEBU boards using this driver are converted with this patch, the non-driver-model code can be removed completely. This is also the reason why this patch is quite big and includes a) the driver change and b) the platform change. As its not git-bisect save otherwise. With this conversion, some parameters are now extracted from the DT instread of using the config header defines. The supported properties right now are: PHY-mode ("phy-mode") and PHY-address ("reg"). The base addresses for the ethernet controllers can be removed from the header files as well. Please note that this patch also removes the E1000 network driver from some MVEBU config headers. This is necessary, as with DM_ETH configured and the e1000 driver enabled, the PCI driver also needs to support DM. But the MVEBU PCI(e) driver still needs to get ported to DM. When this is done, the E1000 driver can be enabled again. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Simon Glass <sjg@chromium.org>
| * | spi: kirkwood_spi.c: Add driver model supportStefan Roese2016-01-14-63/+159
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds driver model support to the kirkwood SPI driver. Which is also used on the MVEBU SoC's, now being converted to DM. Non-DM support is still available for the "older" platforms using this driver, like kirkwood. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Jagan Teki <jteki@openedev.com> Cc: Simon Glass <sjg@chromium.org>
| * | spi: kirkwood_spi.c: Prepare for driver model supportStefan Roese2016-01-14-13/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch prepares the Kirkwood SPI driver, also used on the MVEBU board (Armada XP / 38x), for the conversion to driver model. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Jagan Teki <jteki@openedev.com> Cc: Simon Glass <sjg@chromium.org>
| * | arm: mvebu: ddr: Fix compilation warningStefan Roese2016-01-14-17/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc 5.1 generates this new warning (for Armada 38x platforms): drivers/ddr/marvell/a38x/ddr3_debug.c: In function 'hws_ddr3_tip_read_training_result': drivers/ddr/marvell/a38x/ddr3_debug.c:177:40: warning: 'sizeof' on array function parameter 'result' will return size of 'enum hws_result (*)[1]' [-Wsizeof-array-argument] memcpy(result, training_result, sizeof(result)); ^ drivers/ddr/marvell/a38x/ddr3_debug.c:171:31: note: declared here u32 dev_num, enum hws_result result[MAX_STAGE_LIMIT][MAX_INTERFACE_NUM]) ^ Since this functions is not referenced anywhere, lets just remove it. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* | | net: lpc32xx: fix ignored MDIO busy wait status on readVladimir Zapolskiy2016-01-13-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The change fixes PHY write operation, which incorrectly waits for released busy state before issuing a write operation, this breaks sequential write/read operation logic, because read operation starts immediately on request and it completes, when busy state is gone. Instead of adding the second preceding busy state check to read function, do busy state release check after issuing a write operation, this method of operation is also recommended by the LPC32xx User's Manual, see MII Mgmt Indicators Register notes: For PHY Write if scan is not used: 1. Write 0 to MCMD 2. Write PHY address and register address to MADR 3. Write data to MWTD 4. Wait for busy bit to be cleared in MIND Reported-by: Alexandre Messier <amessier@tycoint.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Alexandre Messier <amessier@tycoint.com>
* | | serial: lpc32xx hsuart: port driver to driver modelVladimir Zapolskiy2016-01-13-39/+64
| | | | | | | | | | | | | | | | | | | | | | | | The change ports NXP LPC32xx 14-clock UART device driver to driver model. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | ums: support multiple LUNs at onceStephen Warren2016-01-13-13/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extend the ums command to accept a list of block devices. Each of these will be exported as a separate LUN. An example use-case would be: ums 0 mmc 0,0.1,0.2 ... which would export LUNs for eMMC 0's user data, boot0, and boot1 HW partitions. This is useful since it allows the host access to everything on the eMMC without having to somehow stop the ums command from executing and restart it with different parameters. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | mmc: store hwpart in the block deviceStephen Warren2016-01-13-27/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will allow us to have multiple block device structs each referring to the same eMMC device, yet different HW partitions. For now, there is still a single block device per eMMC device. As before, this block device always accesses whichever HW partition was most recently selected. Clients wishing to make use of multiple block devices referring to different HW partitions can simply take a copy of this block device once it points at the correct HW partition, and use each one as they wish. This feature will be used by the next patch. In the future, perhaps get_device() could be enhanced to return a dynamically allocated block device struct, to avoid the client needing to copy it in order to maintain multiple block devices. However, this would require all users to be updated to free those block device structs at some point, which is rather a large change. Most callers of mmc_switch_part() wish to permanently switch the default MMC block device's HW partition. Enhance mmc_switch_part() so that it does this. This removes the need for callers to do this. However, common/env_mmc.c needs to save and restore the current HW partition. Make it do this more explicitly. Replace use of mmc_switch_part() with mmc_select_hwpart() in order to remove duplicate code that skips the call if that HW partition is already selected. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | block: pass block dev not num to read/write/erase()Stephen Warren2016-01-13-26/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-01-13-1/+10
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| * | | spl: dm: Add SPL_DM_SEQ_ALIAS config optionNathan Rossi2016-01-13-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Device Model sequence alias feature is required by some Uclasses. Instead of disabling the feature for all SPL targets allow it to be configured. The config option is disabled by default to reduce code size for targets that are not interested or do not require this feature. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Michal Simek <michal.simek@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Marek Vasut <marex@denx.de> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | Merge git://git.denx.de/u-boot-netTom Rini2016-01-13-112/+5
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| * | | net: e1000: Mark _disable_wr() and _write_status() as __maybe_unusedBin Meng2015-12-21-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Per the comments, e1000_spi_eeprom_disable_wr() and e1000_spi_eeprom_write_status() have been tested. Remove the #if 0, #endif and mark them as __maybe_unused. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net: e1000: Remove CONFIG_MVBC_1GBin Meng2015-12-21-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_MVBC_1G is not referenced anywhere, hence remove it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net: e1000: Remove dead codes wrapped by #if 0Bin Meng2015-12-21-105/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove those dead codes wrapped by #if 0 and #endif. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | dm: core: Add a new api to get indexed device addressMugunthan V N2016-01-13-4/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add new api to get device address based on index. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: Jagan Teki <jteki@openedev.com> [Rebased on master] Signed-off-by: Jagan Teki <jteki@openedev.com>
* | | | drivers: spi: ti_qspi: convert driver to adopt device driver modelMugunthan V N2016-01-13-0/+187
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | adopt ti_qspi driver to device driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
generated by cgit v1.1 at 2024-11-05 16:46:47 +0000