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* ENGR00315894-78 vadc: Add vadc moduleYe.Li2016-03-25-0/+603
| | | | | | | | | | | Add vadc module. Both PAL and NTSC mode can work. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 03c31ae30c1e81c99f6824221e4801433445e04a) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit b5d776ffc1519c16091736445b3217ffb7fcd7db)
* MLK-10655 Video: Fix second line string display issueYe.Li2016-03-25-4/+5
| | | | | | | | | | | The string display on second line repeats the last word of first line and does not show full. This is the bug introduced by the fixing to MLK-10542. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit ac430cee8c42f0acad9e126631d772b99f1166ea) (cherry picked from commit ff62c5b275a9b5e47d570d3eb10622799bf12070) (cherry picked from commit bd265a064c8f797e542955352d170e7f20f7b0d1)
* MLK-10542 video: Support multiple lines version string displayYe.Li2016-03-25-7/+23
| | | | | | | | | | | | | The caculation of left space for version string is not correct, should use VIDEO_COLS not VIDEO_LINE_LEN / 2, otherwise we will get larger space than actual have and cause string to overlay logo picture. Also current version string display only supports two lines words at max. This also causes overlay when the LCD pixel colume size is not enough. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit ed53487d36a886fb4557088804a4b5232b168889) (cherry picked from commit 253936bb920c5bb8e7d26e0425d155fb2576ab77)
* ENGR00315894-70 iMX6SX:Video Update MXS LCDIF driverYe.Li2016-03-25-10/+61
| | | | | | | | | | | | | | Add a new interface "mxs_lcd_panel_setup" to setup fb parameters and specifies the LCDIF controller for multiple controllers of iMX6SX. Pass fb parameters via "videomode" env remains work if the new interface is not called before video initialization. Modify LCDIF clock interface "mxs_set_lcdclk" to support multiple LCDIF controllers on iMX6SX. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit d7f49b9378547c3a57b96bcdb907fc44616beb3d)
* MLK-12425-2: video: epdc: introduce epdc supportPeng Fan2016-03-25-0/+465
| | | | | | | | | | | | | | | | | | | | | | | | Support EPDC. E-Ink feature is supported by i.MX6DL/SL and i.MX7D. For now this driver only supports i.MX6DL/SL, because the i.MX7D EPDC driver needs pxp support which is not included in U-Boot. Support user defined logo file, if there is no logo file, it will draw a black border around a white screen. If need to enable EPDC, a waveform file is required to let all work. Since we need LCD_MONOCHROME mode for EPDC, we introduce LCD_MONOCHROME support. Please refer to Linux Reference Manual for how to flash WAVEFORM file. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Robby Cai <R63905@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-11952 Video: IPU: Fix dereferencing NULL pointer problemYe.Li2016-03-25-0/+4
| | | | | | | | | By Coverity check, the clk_set_rate function dereferences the clk pointer without checking whether it is NULL. This may cause problem when clk is NULL. Fix the problem by adding NULL check. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit ded2f2958d568411274eeecd265fcc1181638335)
* MLK-10747-2 video: ipu: Enable/disable LDB_DI clock when necessaryLiu Ying2016-03-25-8/+67
| | | | | | | | This patch adds enable/disable hooks support for ldb_di[0/1] clocks and enables/disables them when necessary. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 615d4c51679a6c2ee0ed4c5e3922eec76646eef1)
* MLK-10747-1 video: ipu: Build ldb_di clock relevant code only for MX6 and MX53Liu Ying2016-03-25-1/+13
| | | | | | | | The LDB is found in MX6 variants and MX53, so this patch makes the ldb_di clock relevant code be built only for them. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 3e40c7466ae7d1d6ca74011bfe69ae059d412a3b)
* MLK-10774-2 HDMI: splash screen function enhancementPeng Fan2016-03-25-19/+50
| | | | | | | | | | | | | | | -Change HDMI video mode to VGA. -Add pixel clock fraction part setting in IPU driver, fix video mode timing issue. -Add overflow state clear workaround, fix kernel hang in HDMI driver issue. -Correct IPU clock to 264MHz. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 5028519b434d5dfbe53c48ac4b115ff8b69bbac7)
* MLK-12214 NAND:apbh_dma: Fix logically dead code issueYe.Li2016-03-25-3/+3
| | | | | | | | | | The list_first_entry always assumes the list is not empty, it won't return NULL pointer when the list is empty. So the "if (pdesc == NULL)" becomes a dead code. Fix the issue by calling the list_empty before the list_first_entry. (Coverity CID 29934) Signed-off-by: Ye.Li <ye.li@nxp.com>
* MLK-11718-2: mtd: nand: change the BCH layout setting for large oob NANDHan Xu2016-03-25-38/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | The cod change updated the NAND driver BCH ECC layout algorithm to support large oob size NAND chips(oob > 1024 bytes). Current implementation requires each chunk size larger than oob size so the bad block marker (BBM) can be guaranteed located in data chunk. The ECC layout always using the unbalanced layout(Ecc for both meta and Data0 chunk), but for the NAND chips with oob larger than 1k, the driver cannot support because BCH doesn’t support GF 15 for 2K chunk. The change keeps the data chunk no larger than 1k and adjust the ECC strength or ECC layout to locate the BBM in data chunk. General idea for large oob NAND chips is 1.Try all ECC strength from the minimum value required by NAND spec to the maximum one that works, any ECC makes the BBM locate in data chunk can be chosen. 2.If none of them works, using separate ECC for meta, which will add one extra ecc with the same ECC strength as other data chunks. This extra ECC can guarantee BBM located in data chunk, of course, we need to check if oob can afford it. Signed-off-by: Han Xu <b45815@freescale.com>
* ENGR00315894-60 GPIO: Modify driver mxc_gpio to support RDC SemaphoresYe.Li2016-03-25-0/+53
| | | | | | | | | | | | | | | | | | | | | For GPIO group which shared by multiple masters, it may set in RDC to shared and semaphore required. Before access the GPIO register, the GPIO driver must get the RDC semaphore, and release the semaphore after the GPIO register access. When CONFIG_MXC_RDC is set, the features related to RDC semaphores is enabled in mxc_gpio driver. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 84d63e2e2ce12f714e88baad8b2325684614a7c1) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: drivers/gpio/mxc_gpio.c (cherry picked from commit c9943b9c8a78bb2c9886bfe582e82978387d8dee) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit faf94726cac8316c4342e19936f1e03ef283ace3)
* MLK-12416-5: spi: qspi: align to 2015.04Peng Fan2016-03-25-914/+670
| | | | | | | | | | Switch to use 2015.04 qspi driver. Change header file to adapt to the driver. To i.mx6sx, move config to header file. Tested read/write/erase on 6ulevk/sxai/sxsdb. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-10931 imx: wdog: Turn off internal reset signal for mx7dYe.Li2016-03-25-1/+5
| | | | | | | Set wdog WCR register SRS bit to turn off internal reset signal WDOG_RESET_B_DEB for mx7d. So that the warm reset is disabled. Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-12417 fsl_esdhc: Update clock enable bits for USDHCYe Li2016-03-25-2/+7
| | | | | | | | | | | | | | | | The USDHC move the 4 clock bits CARD_CLK_SOFT_EN, IPG_PERCLK_SOFT_EN, HCLK_SOFT_EN, and IPG_CLK_SOFT_EN from sysctl register to vendorspec register. The community driver uses RSTA to replace the clock gate off operation. But this is not a good solution. This is because: 1. when using RSTA, we should wait this bit to clear by itself. This is not implemeneted in the codes. 2. After RSTA is set, it is recommended that the Host Driver reset the external card and reinitialize it. So in this patch, we change to use the vendorspec registers for these bits operation. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12102 mmc: fsl: introduce wp_enablePeng Fan2016-03-25-3/+6
| | | | | | | | | | | | | | | | | | Introudce wp_enable. If want to check WPSPL, then in board code, need to set wp_enable to 1. Take i.MX6UL for example, to some boards, they do not use WP singal, so they does not configure USDHC1_WP_SELECT_INPUT, and its default value is 0(GPIO1_IO02). However GPIO1_IO02 is muxed for i2c usage and SION bit set. So USDHC controller can always get wp signal and WPSPL shows write protect and blocks driver continuing. This is not what we want to see, so add wp_enable, and if set to 0, just omit the WPSPL checking and this does not effect normal working of usdhc controller. Suggested-by: Ye.Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 327dad065f6f9a2b29bd646efc7a08a4c01a4ad3)
* MLK-12001 MMC:USDHC: Clear DLL_CTRL delay line settings at driver initYe.Li2016-03-25-0/+3
| | | | | | | | | | | | | Clear DLL_CTRL delay line settings at USDHC initialization to eliminate the pre-settings from boot rom. U-boot should re-init the USDHC not reply on the value set by boot from. On MX6DL, the ROM has set the default delay line(DLLCTRL) to 0x1000021, when eMMC works on DDR mode in kernel, it will possibly cause data CRC errors. Even u-boot always use eMMC in SDR mode, for safety sake, it is better to clear it too. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit f355f117a6d735b0c3cba79f1cb24829cf8cae25)
* ENGR00315499-19 Fix eMMC fast boot hang issueYe.Li2016-03-25-10/+29
| | | | | | | | | | | | | | | When booting in eMMC fast boot, the uboot v2013.04 always hangs. The root cause is that MMC host does not exit from boot mode after bootrom loading image. So the first command 'CMD0' sent in uboot will pull down the CMD line to low and cause errors. This patch cleans the MMC boot register in "mmc_init" to put the MMC host back to normal mode. Signed-off-by: Ye Li <b37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit cf77f982b9969eda4cb5af2a78d3d40e17290756)
* MLK-11035 imx: mx6 update thermal slope factorsPeng Fan2016-03-25-2/+2
| | | | | | | | | | | | | | | | | | | | | From temp sensor guys: " I confirmed the math with him(had do the accuracy study) today. The new, final equation is: Tmeas = (Nmeas - n1) / slope + t1 + offset n1= fused room count t1= 25 offset=3.580661 slope= 0.4148468 – 0.0015423*n1 " 87723f903454aaf17336e0fe9098ea7911c19f3c update the thermal with not accurate slope parameters. This patch fix it. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 0d4904f5929cecd66f0b60cf8ebdcb0e6a2f733e)
* MLK-10827 imx: mx6 update thermal driver according new equationPeng Fan2016-03-25-17/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From IC guys: " After a thorough accuracy study of the Temp sense circuit, we found that with our current equation, an average part can read 7 degrees lower than a known forced temperature. We also found out that the standard variance was around 2C; which is the tightest distribution that we could create. We need to change the temp sense equation to center the average part around the target temperature. Old Equation: Temp = Troom,cal – slope*(Count measured – Count room fuse) Where Troom,cal = 25C and Slope = 0.4297157 – (0.0015974 * Count room fuse) New Equation: Temp = Troom,cal – slope*(Count measured – Count room fuse) +offset Where Troom,cal = 25C and Slope = 0.4445388 – (0.0016549 * Count room fuse) Offset = 3.580661 " According the new equation, update the thermal driver. c1 and c2 changed to u64 type and update comments. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 87723f903454aaf17336e0fe9098ea7911c19f3c)
* sf: Correct data types in stm_is_locked_sr()Marek Vasut2016-03-12-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | The stm_is_locked_sr() function is picked from Linux kernel. For reason unknown, the 64bit data types used by the function and present in Linux were replaced with 32bit unsigned ones, which causes trouble. The testcase performed was done using ST M25P80 chip. The command used was: => sf protect unlock 0 0x10000 The call chain starts in stm_unlock(), which calls stm_is_locked_sr() with negative ofs argument. This works fine in Linux, where the "ofs" is loff_t, which is signed long long, while this fails in U-Boot, where "ofs" is u32 (unsigned int). Because of this signedness problem, the expression past the return statement to be incorrectly evaluated to 1, which in turn propagates back to stm_unlock() and results in -EINVAL. The correction is very simple, just use the correctly sized data types with correct signedness in the function to make it work as intended. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
* dm: ti_qspi: Fix conversion of address to a pointerLokesh Vutla2016-03-12-3/+7
| | | | | | | | | | | | | | TI QSPI driver directly typecasts fdt_addr_t to a pointer. This is not strictly correct, as it gives a build warning when fdt_addr_t is u64. So, use map_physmem for a proper typecasts. This is inspired by commit 167efe01bc5a9 ("dm: ns16550: Use an address instead of a pointer for the uart base") Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
* pinctrl: uniphier: guard uniphier directory with CONFIG_PINCTRL_UNIPHIERMasahiro Yamada2016-03-09-9/+9
| | | | | | | | | | CONFIG_PINCTRL_UNIPHIER is more suitable than CONFIG_ARCH_UNIPHIER to guard the drivers/pinctrl/uniphier directory. The current CONFIG_PINCTRL_UNIPHIER_CORE is a bit long, so rename it into CONFIG_PINCTRL_UNIPHIER. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* pinctrl: uniphier: set input-enable before pin-muxingMasahiro Yamada2016-03-09-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | While IECTRL is disabled, input signals are pulled-down internally. If pin-muxing is set up first, glitch signals (Low to High transition) might be input to hardware blocks. Bad case scenario: [1] The hardware block is already running before pinctrl is handled. (the reset is de-asserted by default or by a firmware, for example) [2] The pin-muxing is set up. The input signals to hardware block are pulled-down by the chip-internal biasing. [3] The pins are input-enabled. The signals from the board reach the hardware block. Actually, one invalid character is input to the UART blocks for such SoCs as PH1-LD4, PH1-sLD8, where UART devices start to run at the power on reset. To avoid such problems, pins should be input-enabled before muxing. [ ported from Linux commit bac7f4c1bf5e7c6ccd5bb71edc015b26c77f7460 ] Fixes: 5dc626f83619 ("pinctrl: uniphier: add UniPhier pinctrl core support") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-03-04-2/+12
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| * usb: dwc2: disable erroneous overcurrent conditionDinh Nguyen2016-03-05-1/+5
| | | | | | | | | | | | | | | | | | | | | | For the case where an external VBUS is used, we should enable the external VBUS comparator in the driver. This would prevent an unnecessary overcurrent error which would then disable the host port. The overcurrent condition was happening on the SoCFPGA Cyclone5 devkit, thus USB was not working on the devkit. This patch fixes that problem. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * usb: gadget: composite: Correct recovery path for registerSam Protsenko2016-03-01-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case when usb_composite_register() failed once (for whatever reason), it will fail further even if all conditions are correct. Example: => fastboot 2 Invalid Controller Index couldn't find an available UDC g_dnl_register: failed!, error: -19 exit not allowed from main input shell. => fastboot 0 g_dnl_register: failed!, error: -22 exit not allowed from main input shell. Despite that 0 is correct index for USB controller, "fastboot 0" command will fail, because "composite" structure wasn't cleared properly on previous fail (on "fastboot 2" command). This patch fixes that erroneous behavior, allowing us to use composite even after previous failure. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2016-02-29-0/+912
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| * | mmc: uniphier: add driver for UniPhier SD/MMC host controllerMasahiro Yamada2016-02-29-0/+758
| | | | | | | | | | | | | | | | | | | | | Add a driver for the on-chip SD/eMMC host controller used by UniPhier SoC family. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | gpio: uniphier: add driver for UniPhier GPIO controllerMasahiro Yamada2016-02-29-0/+154
| |/ | | | | | | | | | | | | This GPIO controller device is used on UniPhier SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Revert "dm: ns16550: Add support for reg-offset property"Tom Rini2016-02-29-4/+2
|/ | | | | | | | | | | This reverts commit d9a3bec682f9756621615f4306718a356a3230e3. While this is a correct change to do long term it unfortunately breaks a number of platforms that are using pdata and not named struct members so they are getting all of their data after 'base' incorrect. Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-usbTom Rini2016-02-26-1/+1
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| * usb: ehci: Fix warning on aarch64Marek Vasut2016-02-26-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following warning on aarch64 introduced by using p2v/v2p functions in the code: In file included from ./arch/arm/include/asm/byteorder.h:29:0, from include/compiler.h:125, from include/image.h:19, from include/common.h:88, from drivers/usb/host/ehci-hcd.c:10: drivers/usb/host/ehci-hcd.c: In function ‘ehci_td_buffer’: drivers/usb/host/ehci-hcd.c:250:49: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr)); ^ include/linux/byteorder/little_endian.h:34:51: note: in definition of macro ‘__cpu_to_le32’ #define __cpu_to_le32(x) ((__force __le32)(__u32)(x)) ^ drivers/usb/host/ehci-hcd.c:250:24: note: in expansion of macro ‘cpu_to_hc32’ td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr)); Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Tom Rini <trini@konsulko.com>
* | Merge git://git.denx.de/u-boot-dmTom Rini2016-02-26-15/+41
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| * | pci: Fix compiler warnings in dm_pciauto_setup_device()Bin Meng2016-02-26-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following compiler warnings when DEBUG is on. warning: 'bar_res' may be used uninitialized in this function. drivers/pci/pci_auto.c:101:21: if (!enum_only && pciauto_region_allocate(bar_res, bar_size, ^ Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | spi: Correct two error return valuesSimon Glass2016-02-26-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When an error number is provided we should use it, not change it. This fixes the SPI and SPI flash tests. One of these is long-standing. The other seems to have been introduced by commit 1e90d9fd (sf: Move read_id code to sf_ops). Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 1e90d9fd (sf: Move read_id code to sf_ops) Reviewed-by: Jagan Teki <jteki@openedev.com> Tested-by: Jagan Teki <jteki@openedev.com>
| * | sandbox: spi: Remove an incorrect free()Simon Glass2016-02-26-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We must not free data that is managed by driver mode. Remove this line, which is a hangover from the pre-driver-model code. This fixes a problem where 'sf probe' crashes U-Boot if the backing file for the SPI flash cannot be found. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | sandbox: spi: Add more debugging to SPI emulationSimon Glass2016-02-26-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | Add a little more debugging to help when things go wrong. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com> Tested-by: Jagan Teki <jteki@openedev.com>
| * | sandbox: timer: Support the early timerSimon Glass2016-02-26-3/+15
| | | | | | | | | | | | | | | | | | Add support for the early timer so we can use tracing with sandbox again. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | timer: Provide an early timerSimon Glass2016-02-26-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In some cases the timer must be accessible before driver model is active. Examples include when using CONFIG_TRACE to trace U-Boot's execution before driver model is set up. Enable this option to use an early timer. These functions must be supported by your timer driver: timer_early_get_count() and timer_early_get_rate(). Signed-off-by: Simon Glass <sjg@chromium.org>
| * | timer: Support tracing fullySimon Glass2016-02-26-3/+3
| |/ | | | | | | | | | | | | A few of the functions in the timer uclass are not marked with 'notrace'. Fix this so that tracing can be used with CONFIG_TRACE. Signed-off-by: Simon Glass <sjg@chromium.org>
* | net: phy: atheros: Fix problem with phy_reset() clearing BMCRAlison Wang2016-02-26-0/+3
|/ | | | | | | | | | | | | | | In commit <a058052c358c> [net: phy: do not read configuration register on reset], phy_reset() will clear the BMCR register. Bit 12(AUTO_NEGOTIATION) is cleared too. It causes auto-negotiation timeout error on Atheros's PHY AR8033. To fix this problem, genphy_config_aneg() and genphy_restart_aneg() needs to be called in ar8035_config() to enable and restart auto-negotiation. Signed-off-by: Alison Wang <alison.wang@nxp.com> Acked-by: Stefan Agner <stefan@agner.ch> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* serial: dcc: Move driver to DMMichal Simek2016-02-25-25/+49
| | | | | | | | | | | | | | | | | | | | | | Enabling this driver requires some DT changes. Adding DCC to root or main bus: dcc: dcc { compatible = "arm,dcc"; u-boot,dm-pre-reloc; }; Extend alias list to link DCC: serial0 = &uart0; serial1 = &uart1; serial2 = &dcc; Change stdout-path to point to dcc port. stdout-path = "serial2:115200n8"; Also add support for debug uart to help with early debug. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-02-24-27/+26
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| * fastboot: update error and warning messagesSteve Rae2016-02-24-5/+5
| | | | | | | | | | | | | | Fix the formatting in error messages, and demote one error message to a warning, as it is only informational. Signed-off-by: Steve Rae <srae@broadcom.com>
| * usb: eth: fix memalign() parameter orderStephen Warren2016-02-24-1/+1
| | | | | | | | | | | | | | | | | | | | The alignment and size were swapped, leading to malloc heap corruption. On my system, this sometimes caused U-Boot to crash during or after certain USB Ethernet operations. Fixes: c8c2797c3810 ("dm: usb: eth: Support driver model with USB Ethernet") Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * dfu: usb: f_dfu: Set deferred call for dfu_flush() functionLukasz Majewski2016-02-24-8/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes situation when one would like to write large file into medium with the file system (fat, ext4, etc). This change sets file size limitation to the DFU internal buffer size. Since u-boot is not supporting interrupts and seek on file systems, it becomes challenging to store large file appropriately. To reproduce this error - create large file (around 26 MiB) and sent it to the target board. Lets examine the flow of USB transactions: 0. DFU uses EP0 with 64B MPS [Max Packet Size] 1. Send file - OUT (PC->target) - dat_26MiB.img is sent with 4096 B transactions 2. Get status - OUT (PC->target) - wait for DFU_STATE_dfuDNLOAD_IDLE (0x05) sent from target board - IN transaction (target->PC) 3. The whole file content is sent to target - OUT (PC->target) with ZLP [Zero Length Packet] Now the interesting part starts: 4. OUT (PC->target) Setup transaction (request to share DFU state) 5. IN (target->PC) - reply the current DFU state - In the UDC driver the req->completion (with dfu_flush) is called after successful IN transfer. - The dfu_flush() (called from req->completion callback) saves the whole file at once (u-boot doesn't support seek on fs). Such operation takes considerable time. When the file is large - e.g. 26MiB - this time may be more than 5 seconds. 6. OUT (PC->target) - ZLP, is send in the same time when dfu_flush() writes data to eMMC memory. The dfu-util application has hard coded timeout on USB transaction completion set to 5 seconds (it uses libusb calls). When the file to store is large (e.g. 26 MiB) the time needed to write it may excess the dfu-util timeout and following error message will be displayed: "unable to read DFU status" on the HOST PC console. This change is supposed to leverage DFU's part responsible for storing files on file systems. Other DFU operations - i.e. raw/partition write to NAND and eMMC should work as before. The only functional change is the error reporting. When dfu_flush() fails the u-boot prompt will exit with error information and dfu-util application exits afterwards as well. Test HW: - Odroid XU3 (Exynos5433) - test with large file - Trats (Exynos4210) - test for regression - eMMC, raw, Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Reported-by: Alex Gdalevich <agdalevich@axion-biosystems.com> Tested-by: Stephen Warren <swarren@nvidia.com> Tested-by: Heiko Schocher <hs@denx.de>
| * usb: ehci: Be explicit about the BE IO accessorsMarek Vasut2016-02-24-2/+3
| | | | | | | | | | | | | | | | | | | | Add explicit cpu_to_be32()/be32_to_cpu() conversion to BE EHCI I/O accessors to align them with their LE counterpart. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Hans de Goede <hdegoede@redhat.com>
| * usb: ehci: Clear USBMODE_BE on LE MMIOMarek Vasut2016-02-24-0/+2
| | | | | | | | | | | | | | | | | | If the USB EHCI is configured for little endian MMIO, make sure to clear the USBMODE_BE flag from the USBMODE register. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Hans de Goede <hdegoede@redhat.com>
| * usb: ehci: Implement V2P mappingMarek Vasut2016-02-24-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | Certain processor architectures, like MIPS, require that the USB structures and transfer buffers are passed with their PA to the USB controller. If VA is passed, the USB will not work. Add the necessary virt_to_phys() calls into the USB EHCI code to make it work. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Hans de Goede <hdegoede@redhat.com>
generated by cgit v1.1 at 2024-12-21 17:25:00 +0000