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* net: zynq: Add support for different PHY interface typesMichal Simek2015-11-19-1/+8
| | | | | | | | | | | | | MII is setup by default for all cases. The most of boards are using RGMII but PHY drivers are not doing any specific setting that's why MII setting was working fine. With TI DP83867 is necessary to setup paramaters based on interface type. Use one setting per board for it which is something what will be removed when driver is moved to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: zynq: Add debug message to phyread/phywriteMichal Simek2015-11-19-1/+12
| | | | | | | Add debug messages to phyread/write to help with PHY debug. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: phy: Add support for Texas Instruments DP83867Edgar E. Iglesias2015-11-19-0/+204
| | | | | | | | | Code is taken from Linux kernel driver (v4.2). Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* spl: change return values of spl_*_load_image()Nikita Kiryanov2015-11-18-5/+12
| | | | | | | | | | | | | | | | | | | | | | | Make spl_*_load_image() functions return a value instead of hanging if a problem is encountered. This enables main spl code to make the decision whether to hang or not, thus preparing it to support alternative boot devices. Some boot devices (namely nand and spi) do not hang on error. Instead, they return normally and SPL proceeds to boot the contents of the load address. This is considered a bug and is rectified by hanging on error for these devices as well. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Hans De Goede <hdegoede@redhat.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Jagan Teki <jteki@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* altera_pio: change ioremap to map_physmemThomas Chou2015-11-18-2/+3
| | | | | | | Change ioremap() to map_physmem(), as it is more used in u-boot. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* altera_qspi: change ioremap to map_physmemThomas Chou2015-11-18-1/+1
| | | | | | | Change ioremap() to map_physmem(), as it is more used in u-boot. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* altera_tse: change ioremap to map_physmemThomas Chou2015-11-18-1/+1
| | | | | | | Change ioremap() to map_physmem(), as it is more used in u-boot. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* altera_sysid: change ioremap to map_physmemThomas Chou2015-11-18-2/+3
| | | | | | | Change ioremap() to map_physmem(), as it is more used in u-boot. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* altera_spi: change ioremap to map_physmemThomas Chou2015-11-18-2/+3
| | | | | | | Change ioremap() to map_physmem(), as it is more used in u-boot. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* altera_timer: change ioremap to map_physmemThomas Chou2015-11-18-2/+3
| | | | | | | Change ioremap() to map_physmem(), as it is more used in u-boot. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* altera_uart: change ioremap to map_physmemThomas Chou2015-11-18-2/+3
| | | | | | | Change ioremap() to map_physmem(), as it is more used in u-boot. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* altera_jtag_uart: change ioremap to map_physmemThomas Chou2015-11-18-2/+3
| | | | | | | Change ioremap() to map_physmem(), as it is more used in u-boot. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* arm: mvebu: Fix SAR1_CPU_CORE_MASKDirk Eibach2015-11-17-5/+2
| | | | | | | | SAR1_CPU_CORE_MASK was wrong, probably copy/paste from another architecture. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Reviewed-by: Stefan Roese <sr@denx.de>
* arm: mvebu: a38x: Remove unsupported topologiesKevin Smith2015-11-17-77/+0
| | | | | | | | | | | | | | A lot of extra configuration information was left over in the Marvell serdes and DDR3 initialization code for boards that U-boot does not support. Remove this extra config information, and the concept of fixing up board topologies with information loaded from an EEPROM. If this needs to be done, it should be handled in the board file, not in core code. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Acked-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-11-16-1/+25
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| * video: mxsfb: introduce lcdif_power_downPeng Fan2015-11-12-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introudce a new function lcdif_power_down. 1. Waits for a VSYNC interrupt to guarantee the reset is done at the VSYNC edge, which somehow makes the LCDIF consume the display FIFO(?) and helps the LCDIF work normally at the kernel stage. 2. Add power down function to stop lcdif. The reason to introduce lcdif_power_down is that we want lcdif to be in initial state when doing uboot reset or before kernel boot to make system stable, otherwise system may hang. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
| * mxs: add parameter base_addr for mxs_set_lcdclkPeng Fan2015-11-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | Change mxs_set_lcdclk prototype to add a new parameter base_addr. There are two LCD interfaces for i.MX6SX, we may support LCDIF1 or LCDIF2. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
| * Merge git://git.denx.de/u-bootStefano Babic2015-11-12-576/+2638
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| * | driver: misc: add MXC_OCOTP Kconfig entryPeng Fan2015-10-30-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add MXC_OCOTP Kconfig entry. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* | | Merge branch 'series1_v2' of git://git.denx.de/u-boot-sparcTom Rini2015-11-13-3/+22
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| * | | sparc: leon3: Add debug_uart support to LEON3 serial driver.Francois Retief2015-11-13-0/+8
| | | | | | | | | | | | | | | | Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
| * | | sparc: leon3: Moved GRLIB core header files to common include/grlib directoryDaniel Hellstrom2015-11-13-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
| * | | sparc: leon3: Reimplemented AMBA Plug&Play scanning routines.Daniel Hellstrom2015-11-13-2/+13
| | | | | | | | | | | | | | | | Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
* | | | sf: Fix NULL pointer exception for flashes without lock methodsBin Meng2015-11-13-6/+12
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit c3c016c "sf: Add SPI NOR protection mechanism" introduced flash_lock()/flash_unlock()/flash_is_locked() methods for SPI flash, but not every flash driver supplies these. We should test these methods against NULL before actually calling them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2015-11-12-6/+502
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| * | | Tegra: T210: Add QSPI driverTom Warren2015-11-12-0/+425
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the normal Tegra SPI driver modified to work with the QSPI controller in Tegra210. It does not do 2x/4x transfers or any other QSPI protocol. Signed-off-by: Yen Lin <yelin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | | pci: tegra: add/enable support for Tegra210Stephen Warren2015-11-12-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | pci: tegra: call tegra_pcie_board_init() earlierStephen Warren2015-11-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board PCI setup code may control regulators that are required simply to bring up the PCI controller itself (or PLLs, IOs, ... it uses). Move the call to this function earlier so that all board-provided resources are ready early enough for everything to work. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | pci: tegra: implement PCA enable workaroundStephen Warren2015-11-12-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra210's PCIe controller has a bug that requires the PCA (performance counter) feature to be enabled. If this isn't done, accesses to device configuration space will hang the chip for tens of seconds. Implement the workaround. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | pci: tegra: use #address-/size-cells from DTStephen Warren2015-11-12-3/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The number of cells used by each entry in the DT ranges property is determined by the #address-cells/#size-cells properties. Fix the code to respect this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | pci: tegra: clip RAM size to 32-bitsStephen Warren2015-11-12-1/+9
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | Tegra peripherals can generally access a 32-bit physical address space, and I believe this applies to PCIe. Clip the PCI region that refers to DRAM so it fits into 32-bits to avoid issues. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | pengwyn: nand and ethernet fixesVincent BENOIT2015-11-12-2/+43
| | | | | | | | | | | | | | | | | | -> Add National instrument ethernet transceiver configuration used (DP83848) -> Change cpsw slave phy address -> modify nand configuration to use the correct ECC and correct nand features
* | | block: ahci: Remove dead codeFabio Estevam2015-11-12-36/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_AHCI_SETFEATURES_XFER is not selected by any user, so delete the dead code. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | i2c: Fix pca953x endianess issueDirk Eibach2015-11-12-1/+3
| | | | | | | | | | | | | | | | | | | | | By reading 2 consecutive bytes from i2c to an u16 value we have an endianess issue. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* | | i2c: soft_i2c: Fix bus indizesDirk Eibach2015-11-12-10/+10
| | | | | | | | | | | | | | | | | | | | | Since busses are sorted in alphabetical order, introducing more than nine busses led to unexpected behaviour. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* | | hrcon: Add fan controllersDirk Eibach2015-11-12-0/+28
| | | | | | | | | | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* | | hrcon: Add support for the DH variantDirk Eibach2015-11-12-0/+28
| | | | | | | | | | | | | | | | | | hrcon DH(dual head) has two video outputs per FPGA. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* | | i2c: ihs_i2c: Fix hold_bus controlDirk Eibach2015-11-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Bus has to be held for repeated start regardless of read/write access. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de>
* | | i2c: ihs_i2c: Use macro bestpracticesDirk Eibach2015-11-12-10/+14
| | | | | | | | | | | | | | | | | | | | | Reinhard Pfau complained that macros in ihs_i2c do not follow best practices. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de>
* | | i2c: ihs_i2c: Dual channel supportDirk Eibach2015-11-12-13/+63
| | | | | | | | | | | | | | | | | | | | | Support two i2c masters per FPGA. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de>
* | | driver: net: Fix pointer conversion warnings for xilinx_zynqmp_epPrabhakar Kushwaha2015-11-12-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix below warnings happening for xilinx_zynqmp_ep_defconfig drivers/net/zynq_gem.c: In function ‘zynq_gem_init’: drivers/net/zynq_gem.c:330:7: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] ((u32)(priv->rxbuffers) + ^ In file included from drivers/net/zynq_gem.c:19:0: drivers/net/zynq_gem.c:336:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] writel((u32)priv->rx_bd, &regs->rxqbase); ^ ./arch/arm/include/asm/io.h:146:34: note: in definition of macro ‘writel’ #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; }) ^ drivers/net/zynq_gem.c: In function ‘zynq_gem_send’: drivers/net/zynq_gem.c:399:9: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] writel((u32)priv->tx_bd, &regs->txqbase); ^ ./arch/arm/include/asm/io.h:146:34: note: in definition of macro ‘writel’ #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; }) ^ drivers/net/zynq_gem.c:404:22: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] priv->tx_bd->addr = (u32)ptr; ^ drivers/net/zynq_gem.c:409:9: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] addr = (u32) ptr; ^ drivers/net/zynq_gem.c:414:9: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] addr = (u32)priv->rxbuffers; ^ drivers/net/zynq_gem.c: In function ‘zynq_gem_recv’: drivers/net/zynq_gem.c:454:31: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] net_process_received_packet((u8 *)addr, frame_len); ^ drivers/net/zynq_gem.c: In function ‘zynq_gem_initialize’: drivers/net/zynq_gem.c:533:35: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] priv->rx_bd = (struct emac_bd *)((u32)bd_space + BD_SEPRN_SPACE); ^ drivers/net/zynq_gem.c:533:16: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] priv->rx_bd = (struct emac_bd *)((u32)bd_space + BD_SEPRN_SPACE); Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* | | driver: usb: Fix pointer conversion warnings for hikeyPrabhakar Kushwaha2015-11-12-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix below compilation warings happening for hikey_defconfig drivers/usb/eth/smsc95xx.c:698:56: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] debug("** %s(), len %d, buf %#x\n", __func__, length, (int)msg); ^ include/common.h:109:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^ drivers/usb/eth/smsc95xx.c:698:2: note: in expansion of macro ‘debug’ debug("** %s(), len %d, buf %#x\n", __func__, length, (int)msg); ^ drivers/usb/eth/smsc95xx.c:718:2: warning: format ‘%u’ expects argument of type ‘unsigned int’, but argument 2 has type ‘long unsigned int’ [-Wformat=] debug("Tx: len = %u, actual = %u, err = %d\n", ^ drivers/usb/eth/smsc95xx.c: In function ‘smsc95xx_recv’: drivers/usb/eth/smsc95xx.c:802:19: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] cur_buf_align = (int)buf_ptr - (int)recv_buf; ^ drivers/usb/eth/smsc95xx.c:802:34: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] cur_buf_align = (int)buf_ptr - (int)recv_buf; Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* | | driver: dwmmc: Fix pointer conversion warnings for hikeyPrabhakar Kushwaha2015-11-12-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix below compilation warings happening for hikey_defconfig drivers/mmc/dw_mmc.c: In function ‘dwmci_set_idma_desc’: drivers/mmc/dw_mmc.c:43:20: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] desc->next_addr = (unsigned int)desc + sizeof(struct dwmci_idmac); ^ drivers/mmc/dw_mmc.c: In function ‘dwmci_prepare_data’: drivers/mmc/dw_mmc.c:61:35: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] dwmci_writel(host, DWMCI_DBADDR, (unsigned int)cur_idmac); ^ drivers/mmc/dw_mmc.c:73:9: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] (u32)bounce_buffer + (i * PAGE_SIZE)); ^ CC drivers/mmc/hi6220_dw_mmc.o drivers/mmc/hi6220_dw_mmc.c: In function ‘hi6220_dwmci_add_port’: drivers/mmc/hi6220_dw_mmc.c:51:17: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] host->ioaddr = (void *)regbase; Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* | | pci: fix checking PCI_REGION_MEM in pci_hose_phys_to_bus()Cheng Gu2015-11-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When converting between PCI bus and phys addresses, a two pass search was introduced with preference to non-PCI_REGION_SYS_MEMORY regions. See commit 2d43e873a29ca4959ba6a30fc7fb396d3fd0dccf. However, since PCI_REGION_MEM is defined as 0, the if statement was always asserted true: ((flags & PCI_REGION_MEM) == PCI_REGION_MEM) This patch uses PCI_REGION_TYPE bit to check if the region is PCI_REGION_MEM: ((flags & PCI_REGION_TYPE) == PCI_REGION_MEM) Signed-off-by: Cheng Gu <chenggu@marvell.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | fastboot: Implement NAND backendMaxime Ripard2015-11-12-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | So far the fastboot code was only supporting MMC-backed devices for its flashing operations (flash and erase). Add a storage backend for NAND-backed devices. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | | fastboot: Implement flashing session counterMaxime Ripard2015-11-12-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fastboot flash command that writes an image to a partition works in several steps: 1 - Retrieve the maximum size the device can download through the "max-download-size" variable 2 - Retrieve the partition type through the "partition-type:%s" variable, that indicates whether or not the partition needs to be erased (even though the fastboot client has minimal support for that) 3a - If the image is smaller than what the device can handle, send the image and flash it. 3b - If the image is larger than what the device can handle, create a sparse image, and split it in several chunks that would fit. Send the chunk, flash it, repeat until we have no more data to send. However, in the 3b case, the subsequent transfers have no particular identifiers, the protocol just assumes that you would resume the writes where you left it. While doing so works well, it also means that flashing two subsequent images on the same partition (for example because the user made a mistake) would not work withouth flashing another partition or rebooting the board, which is not really intuitive. Since we have always the same pattern, we can however maintain a counter that will be reset every time the client will retrieve max-download-size, and incremented after each buffer will be flashed, that will allow us to tell whether we should simply resume the flashing where we were, or start back at the beginning of the partition. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | fastboot: Move fastboot response functions to fastboot coreMaxime Ripard2015-11-12-8/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functions and a few define to generate a fastboot message to be sent back to the host were so far duplicated among the users. Move them all to a common place. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | mtd: uboot: Add meaningful error messageMaxime Ripard2015-11-12-1/+1
|/ / | | | | | | | | | | | | | | | | | | The current error message in get_part if CONFIG_MTDPARTS is disabled is "offset is not a number" which is confusing and doesn't help at all. Change that for something that might give a hint on what's going on. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | net: altera_tse: add mSG-DMA supportThomas Chou2015-11-12-0/+191
| | | | | | | | | | | | | | | | | | | | | | The Modular Scatter-Gather DMA core is a new DMA core to work with the Altera Triple-Speed Ethernet MegaCore. It replaces the legacy Scatter-Gather Direct Memory Access (SG-DMA) controller core. Please find details on the "Embedded Peripherals IP User Guide" of Altera. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* | net: altera_tse: add priv ops to prepare msgdma supportThomas Chou2015-11-12-25/+81
| | | | | | | | | | | | | | | | Add priv ops to prepare msgdma support. These ops are dma type specific. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
generated by cgit v1.1 at 2024-11-12 22:18:34 +0000