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* spi: add altera spi controller supportThomas Chou2010-05-28-0/+166
| | | | | | | | | | | | | This patch adds the driver of altera spi controller, which is used as epcs/spi flash controller. It also works with mmc_spi driver. This driver support more than one spi bus, with base list declared #define CONFIG_SYS_ALTERA_SPI_LIST { BASE_0,BASE_1,... } Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Tested-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
* misc: add gpio based status led driverThomas Chou2010-05-28-0/+31
| | | | | | | | | This patch adds a status led driver followed the GPIO access conventions of Linux. The led mask is used to specify the gpio pin. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Tested-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
* Coding style cleanup, update CHANGELOG.Wolfgang Denk2010-05-26-10/+12
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* dm9000x.c: fix compile problemsWolfgang Denk2010-05-26-6/+6
| | | | | | | Use readX() / writeX() accessors instead of inX() / outX(). Suggested-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-ubiWolfgang Denk2010-05-21-2/+7
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| * UBI: Ensure that "background thread" operations are really executedStefan Roese2010-05-19-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | The current U-Boot UBI implementation is copied from Linux. In this porting the UBI background thread was not handled correctly. Upon write operations ubi_wl_flush() makes sure, that all queued operations, like page-erase, are completed. But this is missing for read operations. This patch now makes sure that such operations (like scrubbing upon bit-flip errors) are not queued, but executed directly. Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-05-21-93/+458
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| * | MX31: Added support for the Casio COM57H5M10XRC to QONGStefano Babic2010-05-19-16/+31
| | | | | | | | | | | | | | | | | | | | | The patch adds setup to connect a CASIO COM57H5M10XRC (640x480 TFT display) to the QONG module. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | SPI: added support for MX51 to mxc_spiStefano Babic2010-05-05-20/+211
| | | | | | | | | | | | | | | | | | This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | MX: RTC13783 uses general function to access PMICStefano Babic2010-05-05-57/+15
| | | | | | | | | | | | | | | | | | | | | | | | The RTC is part of the Freescale's PMIC controller. Use general function to access to PMIC internal registers. Signed-off-by: Stefano Babic <sbabic@denx.de> Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
| * | MX: Added Freescale Power Management DriverStefano Babic2010-05-05-0/+201
| | | | | | | | | | | | | | | | | | | | | | | | | | | The patch add supports for the Freescale's Power Management Controller (known as Atlas) used together with i.MX31/51 processors. It was tested with a MC13783 (MX31) and MC13892 (MX51). Signed-off-by: Stefano Babic <sbabic@denx.de>
* | | lan91c96, smc911x: remove useless free(ptr) calls on NULL ptrSerge Ziryukin2010-05-17-2/+0
| | | | | | | | | | | | Signed-off-by: Serge Ziryukin <ftrvxmtrx@gmail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-05-17-1/+13
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| * | 85xx/fsl-sata: Use is_serdes_configured() to determine if SATA is enabledKumar Gala2010-05-12-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the MPC85xx platform if we have SATA its connected on SERDES. Determing if SATA is enabled via sata_initialize should not be board specific and thus we move it out of the MPC8536DS board code. Additionally, now that we have is_serdes_configured() we can determine if the given SATA port is enabled and error out if its not in the driver. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | drivers/mmc/fsl_esdhc.c: fix compiler warningsWolfgang Denk2010-05-15-17/+17
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 77c1458d caused the following compiler warnings: fsl_esdhc.c: In function 'esdhc_pio_read_write': fsl_esdhc.c:142: warning: assignment discards qualifiers from pointer target type fsl_esdhc.c: In function 'esdhc_setup_data': fsl_esdhc.c:169: warning: unused variable 'wml_value' fsl_esdhc.c: In function 'esdhc_pio_read_write': fsl_esdhc.c:164: warning: control reaches end of non-void function Fix these. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Dipen Dudhat <dipen.dudhat@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2010-05-06-61/+108
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| * | Blackfin: TWI/I2C: implement multibus supportMike Frysinger2010-05-05-61/+108
| |/ | | | | | | | | | | | | In order to do this cleanly, the register accesses have to be converted to a C struct (base pointer), so do that in the process. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | drivers/*/Makefile: fix conditional compile rule.Ender.Dai2010-05-06-6/+4
| | | | | | | | | | | | Fix conditional compile rule for twl4030.c and videomodes.c. Signed-off-by: Ender.Dai <ender.dai@gmail.com>
* | SERIAL: Enable port-mapped accessGraeme Russ2010-05-06-30/+39
|/ | | | | | | | | The x86 architecture exclusively uses Port-Mapped I/O (inb/outb) to access the 16550 UARTs. This patch mimics how Linux selects between Memory-Mapped and Port-Mapped I/O. This allows x86 boards to use CONFIG_SERIAL_MUTLI and drop the custom serial port driver Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-netWolfgang Denk2010-05-04-162/+2078
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| * Blackfin: bfin_mac: hook up new write_hwaddr functionMike Frysinger2010-05-03-15/+16
| | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * net: ethoc: add write_hwaddr supportThomas Chou2010-05-03-3/+3
| | | | | | | | | | Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * net: altera_tse: add write_hwaddr supportThomas Chou2010-05-03-28/+35
| | | | | | | | | | Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * net: fec_mxc: add write_hwaddr supportHeiko Schocher2010-05-03-1/+1
| | | | | | | | | | | | | | tested on the magnesium board. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * net:kirkwood_egiga.c: MAC addresses programming using write_hwaddrPrafulla Wadaskar2010-05-03-0/+11
| | | | | | | | | | | | | | | | | | Added a new function kwgbe_write_hwaddr for programming egiga controller's hardware address. This function will be called for each egiga port being used Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * net: add altera triple speeds ethernet mac driverThomas Chou2010-05-03-0/+1430
| | | | | | | | | | | | | | | | This driver supports the Altera triple speeds 10/100/1000 ethernet mac. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * net: add opencore 10/100 ethernet mac driverThomas Chou2010-05-03-0/+512
| | | | | | | | | | | | | | | | This patch ports the opencore 10/100 ethernet mac driver ethoc.c from linux kernel to u-boot. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * smc911x driver frame alignment patchValentin Yakovenkov2010-05-03-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SMSC911x chips have alignment function to allow frame payload data (which comes after 14-bytes ethernet header) to be aligned at some boundary when reading it from fifo (usually - 4 bytes boundary). This is done by inserting fake zeros bytes BEFORE actual frame data when reading from SMSC's fifo. This function controlled by RX_CFG register. There are bits that represents amount of fake bytes to be inserted. Linux uses alignment of 4 bytes. Ethernet frame header is 14 bytes long, so we need to add 2 fake bytes to get payload data aligned at 4-bytes boundary. Linux driver does this by adding IP_ALIGNMENT constant (defined at skb.h) when calculating fifo data length. All network subsystem of Linux uses this constant too when calculating different offsets. But u-boot does not use any packet data alignment, so we don't need to add anything when calculating fifo data length. Moreover, driver zeros the RX_CFG register just one line up, so chip does not insert any fake data at the beginig. So calculated data length is always bigger by 1 word. It seems that at almost every packet read we get an underflow condition at fifo and possible corruption of data. Especially at continuous transfers, such as tftp. Just after removing this magic addition, I've got tftp transfer speed as it aught to be at 100Mbps. It was really slow before. It seems that fifo underflow occurs only when using byte packing on 32-bit blackfin bus (may be because of very small delay between reads). Signed-off-by: Valentin Yakovenkov <yakovenkov@niistt.ru> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * net: Kirkwood_egiga.c bugfixes for rx pathPrafulla Wadaskar2010-05-03-4/+5
| | | | | | | | | | | | | | | | | | Cosmetic changes: Few comments updated Functionality: Rx packet frame size is programming should be done when port is in disabled state. this is corrected Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * fec_mxc.c: Fix MX27 FEC MAC validity checkEric Jarrige2010-05-03-1/+1
| | | | | | | | | | | | | | | | Fix MX27 FEC logic to check validity of the MAC address in fuse. Only null (empty fuse) or invalid MAC address was retrieved from mx27 fuses before this change. Signed-off-by: Eric Jarrige <jorasse@armadeus.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * tsec: Wait for both RX and TX to stopAndy Fleming2010-05-03-1/+2
| | | | | | | | | | | | | | | | | | When gracefully stopping the controller, the driver was continuing if *either* RX or TX had stopped. We need to wait for both, or the controller could get into an invalid state. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * net: dm9000x: use standard I/O accessorsMike Frysinger2010-05-03-6/+6
| | | | | | | | | | | | | | | | | | | | The current dm9000x driver accesses its memory mapped registers directly instead of using the standard I/O accessors. This can cause problems on Blackfin systems as the accesses can get out of order. So convert the direct volatile dereferences to use the normal in/out macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * mpc512x_fec: Move PHY initialization from probe into init routine.Detlev Zundel2010-05-03-22/+7
| | | | | | | | | | | | | | This saves the autonegotation delay when not using ethernet in U-Boot Signed-off-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * fec_mxc don't use internal eeprom on MX25John Rigby2010-05-03-2/+2
| | | | | | | | | | | | | | Avoid using the internal eeprom on MX25 like MX51 already does. Signed-off-by: John Rigby <jcrigby@gmail.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * fix lockup in mcfmii/mii_discover_phy() in case communication failsWolfgang Wegner2010-05-03-22/+23
| | | | | | | | | | Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * 83xx: UEC: Added support for bitBang MII driver access to PHYsRichard Retanubun2010-05-03-4/+49
| | | | | | | | | | | | | | | | | | | | | | This patch enabled support for having PHYs on bitBang MII and uec MII operating at the same time. Modeled after the MPC8360ADS implementation. Added the ability to specify which ethernet interfaces have bitbang SMI on the board header file. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * Remove unused "local_crc32" function.Detlev Zundel2010-05-03-80/+2
| | | | | | | | | | | | | | For code archeologists, this is a nice example of copy and paste history. Signed-off-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * net: Kirkwood_egiga.c: fixed build warningsPrafulla Wadaskar2010-05-03-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | This patch fixes following build warnings for kirkwood_egiga.c kirkwood_egiga.c: In function "kwgbe_init": kirkwood_egiga.c:448: warning: dereferencing type-punned pointer will break strict-aliasing rules kirkwood_egiga.c: In function "kwgbe_recv": kirkwood_egiga.c:609: warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | MX31: add accessor function to get a gpioStefano Babic2010-04-30-0/+15
| | | | | | | | | | | | The patch adds an accessor function to get the value of a gpio. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | SAMSUNG: make s5p common gpio functionsMinkyu Kang2010-04-30-0/+144
| | | | | | | | | | | | | | | | Because of s5pc1xx gpio is same as s5p seires SoC, move gpio functions to drvier/gpio/ and modify structure's name from s5pc1xx_ to s5p_. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | SAMSUNG: serial: modify name from s5pc1xx to s5pMinkyu Kang2010-04-30-16/+16
|/ | | | | | | Because of other s5p series SoC will use these serial functions, modify function's name and structure's name. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* MX31: Added LCD support for QONG moduleStefano Babic2010-04-27-0/+17
| | | | | | | Added support for LCD and splash image to the QONG module. The supported display is VBEST-VGG322403. Signed-off-by: Stefano Babic <sbabic@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-04-27-2/+28
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| * fsl_sata: Move the snoop bit to another placeDave Liu2010-04-26-2/+6
| | | | | | | | | | | | | | | | For P1022 SATA host controller, the data snoop bit of DW3 in PRDT is moved to bit28. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * fsl_sata: Add the workaround for errata SATA-A001Dave Liu2010-04-26-0/+22
| | | | | | | | | | | | | | | | | | | | | | After power on, the SATA host controller of P1022 Rev1 is configured in legacy mode instead of the expected enterprise mode. Software needs to clear bit[28] of HControl register to change to enterprise mode after bringing the host offline. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge branch 'next' of git://git.denx.de/u-boot-niosWolfgang Denk2010-04-27-2/+10
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| * | altera_jtag_uart: bypass when no jtag connectionThomas Chou2010-04-24-2/+10
| |/ | | | | | | | | | | | | | | | | | | | | This patch adds an option to bypass output waiting when there is no jtag connection. This allows the jtag uart work similar to a serial uart, ie, boot even without connection. This option is enabled with CONFIG_ALTERA_JTAG_UART_BYPASS Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
* | serial: struct serial_device: add uninit() entry for driversAnatolij Gustschin2010-04-24-0/+6
|/ | | | | | | | | | | | | | | Subsequent patch extends mpc512x serial driver to support multiple PSC ports. The driver will provide an uninit() function to stop the serial controller and to disable the controller's clock. Adding uninit() entry to struct serial_device allows disabling the serial controller after usage of a stdio serial device. This patch adds uninit() entry to the struct serial_device and fixes initialization of this structure in the code accordingly. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mmcWolfgang Denk2010-04-24-2/+85
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| * ppc/85xx: PIO Support for FSL eSDHC Controller DriverDipen Dudhat2010-04-23-2/+85
| | | | | | | | | | | | | | On some Freescale SoC Internal DMA of eSDHC controller has bug. So PIO Mode has been introduced to do data transfer using CPU. Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
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